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Author SHA1 Message Date
Akira Hatanaka
f8aabd951e Use sltiu instead of sltu when a register operand and immediate are compared. 
llvm-svn: 141708
 2011-10-11 20:44:43 +00:00
Jim Grosbach
313a74d565 Update test for r141704. 
llvm-svn: 141705
 2011-10-11 20:18:50 +00:00
Jim Grosbach
66bf42f4bb ARM addressing mode cleanup for LDC/STC. 
We parse at least some forms of the instructions now. Encoding is
pretty screwed up, still, though.

llvm-svn: 141704
 2011-10-11 20:17:35 +00:00
Daniel Dunbar
48c24625fe Clean up a few references to System/. We still have docs/SystemLibrary.html 
lying around...

llvm-svn: 141703
 2011-10-11 20:02:52 +00:00
Daniel Dunbar
2b6c2310cd Support/DataTypes.h: Clean up some types and add matching (but presumably 
unused) code from .cmake to DataTypes.h.in so that the files are essentially in
sync module differences in autoconf/cmake replacement syntax.

llvm-svn: 141702
 2011-10-11 20:02:49 +00:00
Eli Friedman
0a06205b37 Remove extra semicolon. 
llvm-svn: 141699
 2011-10-11 19:53:40 +00:00
Akira Hatanaka
27c0f84dce Add patterns for conditional branches with 64-bit register operands. 
llvm-svn: 141696
 2011-10-11 19:09:09 +00:00
Akira Hatanaka
1594be76f8 Add support for 64-bit set-on-less-than instructions. 
llvm-svn: 141695
 2011-10-11 18:53:46 +00:00
Akira Hatanaka
9df92e48e1 Add support for conditional branch instructions with 64-bit register operands. 
llvm-svn: 141694
 2011-10-11 18:49:17 +00:00
Devang Patel
3811b42be0 Add dominance check for the instruction being hoisted. 
For example, MachineLICM should not hoist a load that is not guaranteed to be executed.
Radar 10254254.

llvm-svn: 141689
 2011-10-11 18:09:58 +00:00
Lang Hames
77c4f6fc53 Fixed docs to reflect the proper default value and behaviour of the natural stack alignment. 
llvm-svn: 141687
 2011-10-11 17:50:14 +00:00
Owen Anderson
85292f7b5d Expose MachOObjectFile externally, like we do for COFF. First step in reducing the amount of special-purpose code needed for llvm-objdump. 
llvm-svn: 141684
 2011-10-11 17:32:27 +00:00
Jim Grosbach
a4d00441c7 ARM parse alignment specifier for NEON load/store instructions. 
llvm-svn: 141682
 2011-10-11 17:29:55 +00:00
Duncan Sands
9f61f160f8 Mention the cmake build guide on the main docs page. 
llvm-svn: 141674
 2011-10-11 16:35:07 +00:00
Jim Grosbach
556c9f6f6c ARM Rename operand sub-structure 'Mem' to 'Memory' for a bit more clarity. 
llvm-svn: 141671
 2011-10-11 15:59:20 +00:00
Nadav Rotem
6ddbd1308b Add support for legalization of vector SHL/SRA/SRL instructions 
llvm-svn: 141667
 2011-10-11 14:36:35 +00:00
Richard Osborne
ca9b871ab7 Implement the emitFrameIndexDebugValue and getDebugValueLocation hooks. 
This fixes an assert due to the operands of the DBG_VALUE instruction not
being as expected (PR11105).

llvm-svn: 141666
 2011-10-11 12:55:35 +00:00
Kalle Raiskila
19b09a39e2 Fix a iterator out of bounds error, that triggers rarely. 
llvm-svn: 141665
 2011-10-11 12:55:18 +00:00
NAKAMURA Takumi
bf2fb9b9e2 llvm-objdump.cpp: Use PRIx64 as format specifier for int64_t. 
llvm-svn: 141664
 2011-10-11 12:51:50 +00:00
NAKAMURA Takumi
162abf56c1 Add -D__STDC_FORMAT_MACROS to use PRIx64. 
llvm-svn: 141663
 2011-10-11 12:51:44 +00:00
NAKAMURA Takumi
aebe963472 cmake/modules/HandleLLVMOptions.cmake: Reorder __STDC_CONSTANT_MACROS and __STDC_LIMIT_MACROS. 
llvm-svn: 141662
 2011-10-11 12:51:36 +00:00
Nadav Rotem
451cacafa0 Add support for legalization of vector trunc-store where the saved scalar type is illegal (for example, v2i16 on systems where the smallest store size is i32) 
llvm-svn: 141661
 2011-10-11 11:25:16 +00:00
Nadav Rotem
45b5fc0012 Cleanup the trunc-store legalization code and add asserts. 
llvm-svn: 141659
 2011-10-11 10:04:25 +00:00
Bill Wendling
bdbb880377 Update to a newer doxygen version. PR8214. Patch by Jeremy Huddleston. 
llvm-svn: 141657
 2011-10-11 07:25:38 +00:00
Craig Topper
881d972428 Add HasPOPCNT predicate to the POPCNT instructions. Also mark POPCNT as modifying EFLAGS. 
llvm-svn: 141656
 2011-10-11 07:13:09 +00:00
Bill Wendling
aeb63260c7 Minor modifications to make the Hello World example resemble the Hello World 
pass in the tree. Also some minor formatting changes.
PR9413

llvm-svn: 141655
 2011-10-11 07:03:52 +00:00
Craig Topper
db2d702bff Make Ivy Bridge 16-bit floating point conversion instructions require AVX. 
llvm-svn: 141654
 2011-10-11 07:01:37 +00:00
Nick Lewycky
6bd023fab9 Apparently, sometimes llvm-nm doesn't put the undefined symbol at the top. Take 
that into account and test for no U's showing up in the middle, which is what
we really wanted to test for.

llvm-svn: 141653
 2011-10-11 06:58:11 +00:00
Craig Topper
f95d9bd513 Test case for X86 LZCNT instruction selection. 
llvm-svn: 141652
 2011-10-11 06:47:01 +00:00
Craig Topper
c498c5c0e6 Add X86 LZCNT instruction. Including instruction selection support. 
llvm-svn: 141651
 2011-10-11 06:44:02 +00:00
Bill Wendling
093fd0ca05 Use the proper name for "externally visible" linkage -- 'external'. This is the 
keyword in LLVM for externally visible linkage.
PR10636

llvm-svn: 141649
 2011-10-11 06:41:28 +00:00
Bill Wendling
2d42685bf0 Reword the SetVector description to reflect reality. 
Patch by Michael Ilseman!

llvm-svn: 141648
 2011-10-11 06:33:56 +00:00
Cameron Zwarich
211901eb9f Add a test for PR10565. 
llvm-svn: 141647
 2011-10-11 06:10:37 +00:00
Cameron Zwarich
a34d748f83 Remove a lot of the fancy scalar replacement code for dealing with llvm-gcc's 
lowering of NEON code. It provides little-to-no benefit now and only introduces
additional complexity.

llvm-svn: 141646
 2011-10-11 06:10:30 +00:00
Bill Wendling
2606813218 Test simplification that Ana Pazos noticed. 
llvm-svn: 141644
 2011-10-11 04:43:15 +00:00
Craig Topper
7ae42fbd7e Fix disassembling of popcntw. Also remove some code that says it accounts for 64BIT_REXW_XD not existing, but it does exist. 
llvm-svn: 141642
 2011-10-11 04:34:23 +00:00
Nick Lewycky
509687695f Also create a shndx even if there are no symbols. This lets us test 
.symtab_shndx reading and writing together, and finally we have a testcase for
r141440.

llvm-svn: 141641
 2011-10-11 03:54:50 +00:00
NAKAMURA Takumi
00636555f2 test/CodeGen/X86/movbe.ll: Give explicit -mtriple=x86_64-linux, to unbreak win32 hosts. 
llvm-svn: 141640
 2011-10-11 03:41:03 +00:00
Nick Lewycky
7cea83d5a5 Reapply r141605 with fixes for appropriate handling of reserved section numbers 
in st_shndx fields.

llvm-svn: 141639
 2011-10-11 03:18:58 +00:00
Nick Lewycky
c8160ebc71 Add support for .symtab_shnidx. Unfortunately, doing this required breaking a 
layer of abstraction around SymbolRef where you can read its private
SymbolPimpl member.

llvm-svn: 141636
 2011-10-11 02:57:48 +00:00
Andrew Trick
23866a5e65 Add experimental -enable-lsr-phielim option. 
I'm not sure we will need it in the long run, but the option is
currently useful for checking if the output of LSR is "clean".

llvm-svn: 141634
 2011-10-11 02:30:45 +00:00
Andrew Trick
d36852e6b1 Move replaceCongruentIVs into SCEVExapander and bias toward "expanded" 
IVs.

Indvars previously chose randomly between congruent IVs. Now it will
bias the decision toward IVs that SCEVExpander likes to create. This
was not done to fix any problem, it's just a welcome side effect of
factoring code.

llvm-svn: 141633
 2011-10-11 02:28:51 +00:00
Akira Hatanaka
2da85501f4 Test cases for 64-bit load and store instructions. 
llvm-svn: 141631
 2011-10-11 01:52:31 +00:00
Lang Hames
386b01379a Added a testcase for r141599, rdar://problem/10063881. 
llvm-svn: 141628
 2011-10-11 01:32:10 +00:00
Akira Hatanaka
20808df5a0 Make changes necessary for supporting floating point load and store instructions 
that have 64-bit pointers or access the 32 x 64-bit floating pointer register
file. Update functions in MipsInstrInfo.cpp too.

llvm-svn: 141623
 2011-10-11 01:12:52 +00:00
Jakob Stoklund Olesen
81dd697279 Move -widen-vmovs to ARMBaseInstrInfo::expandPostRAPseudo(). 
The VMOVS widening needs to look at the implicit COPY operands.  Trying
to dig out the COPY instruction from an iterator in copyPhysReg() is the
wrong approach.

The expandPostRAPseudo() hook gets to look at COPY instructions before
they are converted to copyPhysReg() calls.

llvm-svn: 141619
 2011-10-11 00:59:06 +00:00
Akira Hatanaka
3f89f9bc37 Modify lowering of GlobalAddress so that correct code is emitted when target is 
Mips64.

llvm-svn: 141618
 2011-10-11 00:55:05 +00:00
Lang Hames
41b4ff724d Fixed natural stack alignment for Linux x86-32. Thanks Eli. 
llvm-svn: 141616
 2011-10-11 00:51:36 +00:00
Akira Hatanaka
1913a9abc0 Modify MipsDAGToDAGISel::SelectAddr so that it can handle 64-bit pointers too. 
llvm-svn: 141615
 2011-10-11 00:44:20 +00:00
Nick Lewycky
76c927f5bd Revert r141605 as it broke tests for llvm-nm. 
llvm-svn: 141614
 2011-10-11 00:38:56 +00:00