Commit Graph

36128 Commits

Author SHA1 Message Date
Mehdi Amini
1c6de55063 ThinLTO: do not import function whose linkage prevents inlining.
There is not point in importing a "weak" or a "linkonce" function
since we won't be able to inline it anyway.
We already had a targeted check for WeakAny, this is using the
same check on GlobalValue as the inline, i.e.
isMayBeOverriddenLinkage()

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 268341
2016-05-03 00:27:28 +00:00
Wolfgang Pieb
a34c1258af Moved test case for r268323 to DebugInfo/X86 to unbreak aarch64.
llvm-svn: 268339
2016-05-03 00:22:09 +00:00
Reid Kleckner
75b594b1e8 [MC] Create unique .pdata sections for every .text section
Summary:
This adds a unique ID to the COFF section uniquing map, similar to the
one we have for ELF.  The unique id is not currently exposed via the
assembler because we don't have a use case for it yet. Users generally
create .pdata with the .seh_* family of directives, and the assembler
internally needs to produce .pdata and .xdata sections corresponding to
the code section.

The association between .text sections and the assembler-created .xdata
and .pdata sections is maintained as an ID field of MCSectionCOFF. The
CFI-related sections are created with the given unique ID, so if more
code is added to the same text section, we can find and reuse the CFI
sections that were already created.

Reviewers: majnemer, rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D19376

llvm-svn: 268331
2016-05-02 23:22:18 +00:00
Quentin Colombet
cf0d20f78c [MachineBlockPlacement] Let the target optimize the branches at the end.
After the layout of the basic blocks is set, the target may be able to get rid
of unconditional branches to fallthrough blocks that the generic code does not
catch. This happens any time TargetInstrInfo::AnalyzeBranch is not able to
analyze all the branches involved in the terminators sequence, while still
understanding a few of them.

In such situation, AnalyzeBranch can directly modify the branches if it has been
instructed to do so.

This patch takes advantage of that.

llvm-svn: 268328
2016-05-02 22:58:59 +00:00
Quentin Colombet
6b53c89899 [X86] Model FAULTING_LOAD_OP as a terminator and branch.
This operation may branch to the handler block and we do not want it
to happen anywhere within the basic block.
Moreover, by marking it "terminator and branch" the machine verifier
does not wrongly assume (because of AnalyzeBranch not knowing better)
the branch is analyzable. Indeed, the target was seeing only the
unconditional branch and not the faulting load op and thought it was
a simple unconditional block.
The machine verifier was complaining because of that and moreover,
other optimizations could have done wrong transformation!

In the process, simplify the representation of the handler block in
the faulting load op. Now, we directly reference the handler block
instead of using a label. This has the benefits of:
1. MC knows how to issue a label for a BB, so leave that to it.
2. Accessing the target BB from its label is painful, whereas it is
   direct from a MBB operand.

Note: The 2 bytes offset in implicit-null-check.ll comes from the
fact the unconditional jumps are not removed anymore, as the whole
terminator sequence is not analyzable anymore.

Will fix it in a subsequence commit.

llvm-svn: 268327
2016-05-02 22:58:54 +00:00
Wolfgang Pieb
4f51f08e11 DebugInfo: Avoid propagating incorrect debug locations in SelectionDAG via CSE.
Summary:
When SelectionDAG performs CSE it is possible that the context's source
location is different from that of the selected node. This can lead to
incorrect line number records. We update the debug location to the
one that occurs earlier in the instruction sequence.

This fixes PR21006.

Reviewers: echristo, sdmitrouk

Subscribers: jevinskie, asl, llvm-commits

Differential Revision: http://reviews.llvm.org/D12094

llvm-svn: 268323
2016-05-02 22:50:51 +00:00
Mehdi Amini
d877456f6c Revert "ThinLTO: do not import function whose linkage prevents inlining."
This reverts commit r268315, the tests are not passing.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 268317
2016-05-02 22:26:04 +00:00
Mehdi Amini
4326fb70ef ThinLTO: do not import function whose linkage prevents inlining.
There is not point in importing a "weak" or a "linkonce" function
since we won't be able to inline it anyway.
We already had a targeted check for WeakAny, this is using the
same check on GlobalValue as the inline, i.e.
isMayBeOverriddenLinkage()

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 268315
2016-05-02 22:11:27 +00:00
Kevin Enderby
961a187a7a Fix llvm-size to exit with non zero when it can’t open a file.
rdar://26027819

llvm-svn: 268313
2016-05-02 21:41:03 +00:00
Rafael Espindola
e51691ab66 Don't try to create thin bsd archives.
Not such variant has been specified yet.

llvm-svn: 268305
2016-05-02 21:06:57 +00:00
Frederic Riss
bf4e97e3be [dsymutil] Create the temporary files in the system temp directory.
llvm-dsymutil used to create the temporary files in the output directory.
This works fine except when the output directory contains a '%' char, which
is then replaced by llvm::sys::fs::createUniqueFile() generating an invalid
path.
Just use the default temp dir for those files.

llvm-svn: 268304
2016-05-02 21:06:14 +00:00
Kevin Enderby
f7223e444c Thread Expected<...> up from libObject’s getType() for symbols to allow llvm-objdump to produce a good error message.
Produce another specific error message for a malformed Mach-O file when a symbol’s
section index is more than the number of sections.  The existing test case in test/Object/macho-invalid.test
for macho-invalid-section-index-getSectionRawName now reports the error with the message indicating
that a symbol at a specific index has a bad section index and that bad section index value.

Again converting interfaces to Expected<> from ErrorOr<> does involve
touching a number of places. Where the existing code reported the error with a
string message or an error code it was converted to do the same.

Also there some were bugs in the existing code that did not deal with the
old ErrorOr<> return values.  So now with Expected<> since they must be
checked and the error handled, I added a TODO and a comment:
"// TODO: Actually report errors helpfully" and a call something like
consumeError(NameOrErr.takeError()) so the buggy code will not crash
since needed to deal with the Error.

llvm-svn: 268298
2016-05-02 20:28:12 +00:00
Matt Arsenault
dfb613a88d AMDGPU: Custom lower v2i32 loads and stores
This will allow us to split up 64-bit private accesses when
necessary.

llvm-svn: 268296
2016-05-02 20:13:51 +00:00
Tom Stellard
d541008932 AMDGPU/SI: Use v_readfirstlane_b32 when restoring SGPRs spilled to scratch
We were using v_readlane_b32 with the lane set to zero, but this won't
work if thread 0 is not active.

Differential Revision: http://reviews.llvm.org/D19745

llvm-svn: 268295
2016-05-02 20:11:44 +00:00
Matt Arsenault
7932e530a0 AMDGPU: Make i64 loads/stores promote to v2i32
Now that unaligned access expansion should not attempt
to produce i64 accesses, we can remove the hack in
PreprocessISelDAG where this is done.

This allows splitting i64 private accesses while
allowing the new add nodes indexing the vector components
can be folded with the base pointer arithmetic.

llvm-svn: 268293
2016-05-02 20:07:26 +00:00
Simon Pilgrim
6c3bbc1c10 [X86][AVX2] Added 128-bit wide shuffle test
Demonstrate missing 128-bit wide shuffle combine support

llvm-svn: 268290
2016-05-02 19:46:58 +00:00
Reid Kleckner
d481f126d3 Revert "[SimplifyCFG] Extend TryToSimplifyUncondBranchFromEmptyBlock for empty block including lifetime intrinsics"
This reverts commit r268254.

This change causes assertion failures while building Chromium. Reduced
test case coming soon.

llvm-svn: 268288
2016-05-02 19:43:22 +00:00
Tim Northover
d33c3d2654 ARM: fix handling of SUB immediates in peephole opt.
We were negating an immediate that was going to be used in a SUBri form
unnecessarily. Since ADD/SUB are very similar we *can* do that, but we have to
change the SUB to an ADD at the same time. This also applies to ADD, and allows
us to handle a slightly larger range of immediates for those two operations.

rdar://25992245

llvm-svn: 268276
2016-05-02 18:30:08 +00:00
Justin Holewinski
9cc32d1b1b [NVPTX] Fix sign/zero-extending ldg/ldu instruction selection
Summary:
We don't have sign-/zero-extending ldg/ldu instructions defined,
so we need to emulate them with explicit CVTs. We were originally
handling the i8 case, but not any other cases.

Fixes PR26185

Reviewers: jingyue, jlebar

Subscribers: jholewinski

Differential Revision: http://reviews.llvm.org/D19615

llvm-svn: 268272
2016-05-02 18:12:02 +00:00
Zachary Turner
21d372c456 Parse PDB Name Hash Table
PDB has a lot of similar data structures.  We already have code
for parsing a Name Map, but PDB seems to have a different but
very similar structure that is a hash table.  This is the
beginning of code needed in order to parse the name hash table,
but it is not yet complete.  It parses the basic metadata of
the hash table, the bucket array, and the names buffer, but
doesn't use any of these fields yet as the data structure
requires a non-trivial amount of work to understand.

llvm-svn: 268268
2016-05-02 18:09:14 +00:00
Tom Stellard
179b86b996 AMDGPU/SI: Use the hazard recognizer to break SMEM soft clauses
Summary:
Add support for detecting hazards in SMEM soft clauses, so that we only
break the clauses when necessary, either by adding s_nop or re-ordering
other alu instructions.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18870

llvm-svn: 268260
2016-05-02 17:39:06 +00:00
Nicolai Haehnle
634941ba37 AMDGPU: llvm.SI.fs.constant is a source of divergence
Summary:
This intrinsic is used to get flat-shaded fragment shader inputs. Those are
uniform across a primitive, but a fragment shader wave may process pixels from
multiple primitives (as indicated by the prim_mask), and so that's where
divergence can arise.

Reviewers: arsenm, tstellarAMD

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19747

llvm-svn: 268259
2016-05-02 17:37:01 +00:00
Derek Schuff
f0cc027b2e [WebAssembly] Rename memory_size intrinsic to current_memory
This follows the recent renaming in the wasm spec.

llvm-svn: 268255
2016-05-02 17:25:22 +00:00
Hans Wennborg
b1d0774f3f [SimplifyCFG] Extend TryToSimplifyUncondBranchFromEmptyBlock for empty block including lifetime intrinsics
Make it possible that TryToSimplifyUncondBranchFromEmptyBlock merges empty
basic block including lifetime intrinsics as well as phi nodes and
unconditional branch into its successor or predecessor(s).

If successor of empty block has single predecessor, all contents including
lifetime intrinsics are sinked into the successor. Otherwise, they are
hoisted into its predecessor(s) and then merged into the predecessor(s).

Patch by Josh Yoon <josh.yoon@samsung.com>!

Differential Revision: http://reviews.llvm.org/D19257

llvm-svn: 268254
2016-05-02 17:22:54 +00:00
Mehdi Amini
7b2daaaedb Move createReversePostOrderFunctionAttrsPass right after the inliner is done
This is where it was originally, until LoopVersioningLICM was
inserted before in r259986, I don't believe it was on purpose.

Differential Revision: http://reviews.llvm.org/D19809

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 268252
2016-05-02 16:53:16 +00:00
Pete Cooper
11e1eedc38 Add llvm-pdbdump to the tool substitutions list in lit. NFC.
This adds llvm-pdbdump to the list of tools which get printed with
the full path in verbose mode.  This makes it easier to take the
whole run line from verbose output and run it again without prepending
with the builds bin directory.

llvm-svn: 268250
2016-05-02 16:51:26 +00:00
Chad Rosier
3e660d9f35 Remove extra whitespace. NFC.
llvm-svn: 268248
2016-05-02 16:45:00 +00:00
Tom Stellard
7f58d124e5 AMDGPU/SI: Use hazard recognizer to detect DPP hazards
Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18603

llvm-svn: 268247
2016-05-02 16:23:09 +00:00
Sanjay Patel
b2a67e59db remove blank lines
llvm-svn: 268246
2016-05-02 15:49:09 +00:00
Sanjay Patel
e2d5365777 [InstCombine] regenerate checks
llvm-svn: 268245
2016-05-02 15:32:10 +00:00
Sanjay Patel
a63214a88b [InstCombine] regenerate checks
llvm-svn: 268244
2016-05-02 15:25:49 +00:00
Sanjay Patel
bf009dccb0 [InstCombine] regenerate checks
llvm-svn: 268242
2016-05-02 15:21:41 +00:00
Sanjay Patel
552b31c626 [InstCombine] regenerate checks
llvm-svn: 268241
2016-05-02 15:18:13 +00:00
Sanjay Patel
125a1032ac [InstCombine] regenerate checks
llvm-svn: 268239
2016-05-02 15:06:55 +00:00
Sanjay Patel
feadfdaa37 [InstCombine] regenerate checks
llvm-svn: 268232
2016-05-02 14:21:55 +00:00
David L Kreitzer
5e9178eeb3 Enable the X86 call frame optimization for the 64-bit targets that allow it.
Fixes PR27241.

Differential Revision: http://reviews.llvm.org/D19688

llvm-svn: 268227
2016-05-02 13:45:25 +00:00
Jonas Paulsson
ee848f9766 [SystemZ] Temporarily disable codegen test int-add-12.ll.
This checks for AGSI transformation, which is temporarily disabled.

llvm-svn: 268219
2016-05-02 10:42:47 +00:00
Davide Italiano
92ff603010 [llvm-readobj] Dump hash as part of -version-info.
llvm-svn: 268210
2016-05-02 02:30:18 +00:00
Davide Italiano
4d35211d79 [GlobalDCE] Modernize. Use FileCheck instead of grep.
llvm-svn: 268207
2016-05-01 22:51:14 +00:00
Simon Pilgrim
b50a7dc851 [InstCombine][SSE] Added support to VPERMD/VPERMPS to shuffle combine to accept UNDEF elements.
llvm-svn: 268206
2016-05-01 20:43:02 +00:00
Simon Pilgrim
e0944ffa06 Dropped FIXME comment
llvm-svn: 268205
2016-05-01 20:33:25 +00:00
Simon Pilgrim
a6ec426d4d [InstCombine][SSE] Added support to VPERMILVAR to shuffle combine to accept UNDEF elements.
llvm-svn: 268204
2016-05-01 20:22:42 +00:00
Simon Pilgrim
1834e02fd6 [InstCombine][AVX] Fixed PERMILVAR identity tests and added additional decode tests
llvm-svn: 268203
2016-05-01 20:06:47 +00:00
Simon Pilgrim
f29cf3f78c [InstCombine][SSE] Added support to PSHUFB to shuffle combine to accept UNDEF elements.
llvm-svn: 268202
2016-05-01 19:26:21 +00:00
Simon Pilgrim
a064ae65ee [InstCombine][SSE] Regenerate MOVSX/MOVZX tests
llvm-svn: 268201
2016-05-01 18:28:45 +00:00
Craig Topper
721f6428df [AVX512] VPACKUSWB/VPACKSSWB should not be encoded with EVEX.W=1. While there fix the execution domain for VPACKSSDW/VPACKUSDW.
llvm-svn: 268200
2016-05-01 17:38:32 +00:00
Simon Pilgrim
b8dbbcff7b [InstCombine][AVX2] Combine VPERMD/VPERMPS intrinsics with constant masks to shufflevector.
llvm-svn: 268199
2016-05-01 16:41:22 +00:00
Igor Breger
fa752e801d getelementptr instruction, support index vector of EVT.
Differential Revision: http://reviews.llvm.org/D19775

llvm-svn: 268195
2016-05-01 13:29:12 +00:00
Igor Breger
a0208b4462 Change AVX512 braodcastsd/ss patterns interaction with spilling . New implementation take a scalar register and generate a vector without COPY_TO_REGCLASS (turn it into a VR128 register ) .The issue is that during register allocation we may spill a scalar value using 128-bit loads and stores, wasting cache bandwidth.
Differential Revision: http://reviews.llvm.org/D19579

llvm-svn: 268190
2016-05-01 08:40:00 +00:00
Craig Topper
5387c11293 [AVX512] Prefer AVX512 VPACK instructions over AVX/AVX2 instructions when VLX and BWI are supported.
llvm-svn: 268189
2016-05-01 06:52:19 +00:00