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435 Commits

Author SHA1 Message Date
Devang Patel
1fbf5e861e Print InlinedAt location. 
llvm-svn: 107208
 2010-06-29 21:51:32 +00:00
Dan Gohman
823dff64cd Teach regular and fast isel to set dead flags on unused implicit defs 
on calls and similar instructions.

llvm-svn: 106353
 2010-06-18 23:28:01 +00:00
Jakob Stoklund Olesen
f0226fee37 Slightly change the meaning of the reMaterialize target hook when the original 
instruction defines subregisters.

Any existing subreg indices on the original instruction are preserved or
composed with the new subreg index.

Also substitute multiple operands mentioning the original register by using the
new MachineInstr::substituteRegister() function. This is necessary because there
will soon be <imp-def> operands added to non read-modify-write partial
definitions. This instruction:

  %reg1234:foo = FLAP %reg1234<imp-def>

will reMaterialize(%reg3333, bar) like this:

  %reg3333:bar-foo = FLAP %reg333:bar<imp-def>

Finally, replace the TargetRegisterInfo pointer argument with a reference to
indicate that it cannot be NULL.

llvm-svn: 105358
 2010-06-02 22:47:25 +00:00
Jakob Stoklund Olesen
98290734b0 Properly compose subregister indices when coalescing. 
The comment about ordering of subreg indices is no longer true.
This exposed a bug in the new substVirtReg method that is also fixed.

llvm-svn: 105294
 2010-06-01 22:39:25 +00:00
Jakob Stoklund Olesen
6a3738d96a Add a TargetRegisterInfo::composeSubRegIndices hook with a default 
implementation that is correct for most targets. Tablegen will override where
needed.

Add MachineOperand::subst{Virt,Phys}Reg methods that correctly handle existing
subreg indices when sustituting registers.

llvm-svn: 104985
 2010-05-28 18:18:53 +00:00
Jakob Stoklund Olesen
9210d3b189 Print symbolic SubRegIndex names on machine operands. 
llvm-svn: 104628
 2010-05-25 19:49:38 +00:00
Evan Cheng
3c850aecf6 - Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs 
that are aliases of the specified register.
- Rename modifiesRegister to definesRegister since it's looking a def of the
specific register or one of its super-registers. It's not looking for def of a
sub-register or alias that could change the specified register.
- Added modifiesRegister to look for defs of aliases.

llvm-svn: 104377
 2010-05-21 20:53:24 +00:00
Jakob Stoklund Olesen
0f1087b284 Add MachineInstr::readsWritesVirtualRegister() to determine if an instruction 
reads or writes a register.

This takes partial redefines and undef uses into account.

Don't actually use it yet. That caused miscompiles.

llvm-svn: 104372
 2010-05-21 20:02:01 +00:00
Jakob Stoklund Olesen
a3cca88b41 Revert "Use MachineInstr::readsWritesVirtualRegister to determine if a register is read." 
This reverts r104322. I think it was causing miscompilations.

llvm-svn: 104323
 2010-05-21 17:36:32 +00:00
Jakob Stoklund Olesen
edf8136011 Use MachineInstr::readsWritesVirtualRegister to determine if a register is read. 
This correctly handles partial redefines and undef uses.

llvm-svn: 104322
 2010-05-21 16:42:30 +00:00
Jakob Stoklund Olesen
6c22635216 If the first definition of a virtual register is a partial redef, add an 
<imp-def> operand for the full register. This ensures that the full physical
register is marked live after register allocation.

llvm-svn: 104320
 2010-05-21 16:32:16 +00:00
Jakob Stoklund Olesen
56998cc8aa Add MachineInstr::readsVirtualRegister() in preparation for proper handling of 
partial redefines.

We are going to treat a partial redefine of a virtual register as a
read-modify-write:

  %reg1024:6 = OP

Unless the register is fully clobbered:

  %reg1024:6 = OP, %reg1024<imp-def>

MachineInstr::readsVirtualRegister() knows the difference. The first case is a
read, the second isn't.

llvm-svn: 104149
 2010-05-19 20:36:22 +00:00
Dan Gohman
33e9c347bf Teach MachineLICM and MachineSink how to clear kill flags conservatively 
when they move instructions.

llvm-svn: 103737
 2010-05-13 20:34:42 +00:00
Evan Cheng
fb33f168e0 Pretty print DBG_VALUE machine instructions. 
Before:
DBG_VALUE %RSI, 0, !-1; dbg:SimpleRegisterCoalescing.cpp:2707
Now:
DBG_VALUE %RSI, 0, !"this"; dbg:SimpleRegisterCoalescing.cpp:2707

llvm-svn: 102518
 2010-04-28 20:03:13 +00:00
Bob Wilson
1fa38ca6fd Use getNumImplicitDefs() and getNumImplicitUses(). 
llvm-svn: 100850
 2010-04-09 04:46:43 +00:00
Bob Wilson
ed50c79a3a Fix up some comments. 
llvm-svn: 100849
 2010-04-09 04:34:03 +00:00
Evan Cheng
619f1b8a94 Coalescer should not delete copy instructions whose defs are partially dead. e.g. 
%RDI<def,dead> = MOV64rr %RAX<kill>, %EDI<imp-def>

llvm-svn: 100804
 2010-04-08 20:02:37 +00:00
Chris Lattner
60e5f55565 fix a latent bug my inline asm stuff exposed: 
MachineOperand::isIdenticalTo wasn't handling metadata operands.

llvm-svn: 100636
 2010-04-07 18:03:19 +00:00
Chris Lattner
0da97990f6 stop using DebugLoc::getUnknownLoc() 
llvm-svn: 100215
 2010-04-02 20:17:23 +00:00
Chris Lattner
305c84b8ee Switch the code generator (except the JIT) onto the new DebugLoc 
representation.  This eliminates the 'DILocation' MDNodes for 
file/line/col tuples from -O0 -g codegen.

This remove the old DebugLoc class, making it a typedef for DebugLoc,
I'll rename NewDebugLoc next.

I didn't update the JIT to use the new apis, so it will continue to
work, but be as slow as before.  Someone should eventually do this
or, better yet, rip out the JIT debug info stuff and build the JIT
on top of MC.

llvm-svn: 100209
 2010-04-02 19:42:39 +00:00
Chris Lattner
533e5c8ffd add support for MCSymbols as operands to MachineInstrs. 
llvm-svn: 98433
 2010-03-13 08:14:18 +00:00
Devang Patel
176dc29a62 Avoid using DIDescriptor.isNull(). 
This is a first step towards eliminating checks in Descriptor constructors.

llvm-svn: 97975
 2010-03-08 20:52:55 +00:00
Devang Patel
a716e313d6 Revert r97947. 
llvm-svn: 97963
 2010-03-08 19:20:38 +00:00
Devang Patel
1527b2657b Avoid using DIDescriptor.isNull(). 
This is a first step towards eliminating unncessary constructor checks in light weight DIDescriptor wrappers.

llvm-svn: 97947
 2010-03-08 18:25:48 +00:00
Evan Cheng
8c608dffd5 Move MachineInstrExpressionTrait::getHashValue() out of line so it can skip over only virtual register defs. This matches what isEqual() is doing. 
llvm-svn: 97680
 2010-03-03 23:37:30 +00:00
Evan Cheng
57064125c4 Fix funky indentation and add comments. 
llvm-svn: 97670
 2010-03-03 21:54:14 +00:00
Evan Cheng
70b7ecdef9 - Change MachineInstr::isIdenticalTo to take a new option that determines whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality. 
- Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools).

llvm-svn: 97628
 2010-03-03 01:44:33 +00:00
Evan Cheng
a93cb01841 Swap parameters of isSafeToMove and isSafeToReMat for consistency. 
llvm-svn: 97578
 2010-03-02 19:03:01 +00:00
David Greene
0ed0396052 Add non-temporal flags to MachineMemOperand. 
llvm-svn: 96226
 2010-02-15 16:48:31 +00:00
Dan Gohman
92b6122204 Fix "the the" and similar typos. 
llvm-svn: 95781
 2010-02-10 16:03:48 +00:00
Dale Johannesen
59679b7966 Add isDebug argument to ChangeToRegister; this prevents 
the field from being used uninitialized later in some cases.

llvm-svn: 95735
 2010-02-10 00:41:49 +00:00
Chris Lattner
7acf9be6c4 move target-independent opcodes out of TargetInstrInfo 
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.

llvm-svn: 95687
 2010-02-09 19:54:29 +00:00
Jakob Stoklund Olesen
b93c3b9624 Identify predicate and optional-def operands when printing machine 
instructions.

llvm-svn: 93925
 2010-01-19 22:08:34 +00:00
Devang Patel
3bbca51dcd Replace DebugLocTuple with DILocation. 
llvm-svn: 93630
 2010-01-16 06:09:35 +00:00
Dale Johannesen
1738d7d11a Further progration of metadata operands. The 
dumper doesn't really do what I want yet, but
at least it doesn't crash now.

llvm-svn: 93272
 2010-01-13 00:00:24 +00:00
Jakob Stoklund Olesen
03dea01d94 Add <imp-def> and <imp-kill> operands when replacing virtual sub-register defs and kills. 
An instruction like this:

  %reg1097:1<def> = VMOVSR %R3<kill>, 14, %reg0

Must be replaced with this when substituting physical registers:

  %S0<def> = VMOVSR %R3<kill>, 14, %reg0, %D0<imp-def>

llvm-svn: 92812
 2010-01-06 00:29:28 +00:00
David Greene
1f1c9c4164 Change errs() to dbgs(). 
llvm-svn: 92545
 2010-01-04 23:48:20 +00:00
Chris Lattner
2f436b213d snip one more #include from Metadata.h 
llvm-svn: 92214
 2009-12-28 08:30:43 +00:00
Bill Wendling
f3d0708729 Remove dead store. 
llvm-svn: 92159
 2009-12-25 13:45:50 +00:00
Bill Wendling
8273efdd31 Remove dead store from copy-pasto. 
llvm-svn: 92158
 2009-12-25 13:44:36 +00:00
Jim Grosbach
483afaa7f7 Add @earlyclobber TableGen constraint 
llvm-svn: 91554
 2009-12-16 19:43:02 +00:00
Evan Cheng
fe32f969cd Follow up to 90488. Turn a check into an assertion. 
llvm-svn: 90815
 2009-12-07 23:10:34 +00:00
Dan Gohman
309e2283ab Don't print the debug directory; it's often long and uninteresting. Omit 
the column number if it is not known. Handle the case of a missing filename
better.

llvm-svn: 90630
 2009-12-05 00:20:51 +00:00
Evan Cheng
d350df127e Watch out for PHI instruction with no source operands. 
llvm-svn: 90488
 2009-12-03 21:50:58 +00:00
Evan Cheng
1c3edb4fa8 Fill out codegen SSA updater. It's not yet tested. 
llvm-svn: 90395
 2009-12-03 02:31:43 +00:00
Dan Gohman
dc068e9517 Devang pointed out that this code should use DIScope instead of 
DICompileUnit. This code now prints debug filenames successfully.

llvm-svn: 90181
 2009-12-01 00:45:56 +00:00
Dan Gohman
e5ed49c40d Print the debug info line and column in MachineInstr::print even when there's 
no filename. This situation is apparently fairly common right now.

llvm-svn: 89701
 2009-11-23 21:29:08 +00:00
Dan Gohman
04717dcf0a Initialize the new AsmPrinterFlags field to 0, fixing uses of 
uninitialized memory.

llvm-svn: 88985
 2009-11-16 22:49:38 +00:00
Dan Gohman
c64e578e5a Print "..." instead of all the uninteresting register clobbers on call 
instructions. This makes CodeGen dumps significantly less noisy.

Example before:
  BL <ga:@bar>, %R0<imp-def>, %R1<imp-def,dead>, %R2<imp-def,dead>, %R3<imp-def,dead>, %R12<imp-def,dead>, %LR<imp-def,dead>, %D0<imp-def,dead>, %D1<imp-def,dead>, %D2<imp-def,dead>, %D3<imp-def,dead>, %D4<imp-def,dead>, %D5<imp-def,dead>, %D6<imp-def,dead>, %D7<imp-def,dead>, %D16<imp-def,dead>, %D17<imp-def,dead>, %D18<imp-def,dead>, %D19<imp-def,dead>, %D20<imp-def,dead>, %D21<imp-def,dead>, %D22<imp-def,dead>, %D23<imp-def,dead>, %D24<imp-def,dead>, %D25<imp-def,dead>, %D26<imp-def,dead>, %D27<imp-def,dead>, %D28<imp-def,dead>, %D29<imp-def,dead>, %D30<imp-def,dead>, %D31<imp-def,dead>, %CPSR<imp-def,dead>, %FPSCR<imp-def,dead>

Same example after:
  BL <ga:@bar>, %R0<imp-def>, %R1<imp-def,dead>, %LR<imp-def,dead>, %CPSR<imp-def,dead>, ...

llvm-svn: 86583
 2009-11-09 19:38:45 +00:00
Dan Gohman
aadf548295 Use WriteAsOperand to print GlobalAddress MachineOperands. This 
prints them with the leading '@'.

llvm-svn: 86261
 2009-11-06 18:03:10 +00:00