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Author SHA1 Message Date
Andrew Trick
6f589802f8 whitespace 
llvm-svn: 140873
 2011-09-30 19:48:58 +00:00
Akira Hatanaka
5479850400 Remove unnecessary checking of register operands. 
llvm-svn: 140872
 2011-09-30 19:18:24 +00:00
Akira Hatanaka
c9268767d6 Add definitions of Mips64 rotate instructions. 
llvm-svn: 140870
 2011-09-30 18:51:46 +00:00
Jim Grosbach
d35eaaeb6e float comparison to double 'zero' constant can just be a float 'zero.' 
InstCombine was incorrectly considering the conversion of the constant
zero to be unsafe.

We want to transform:
define float @bar(float %x) nounwind readnone optsize ssp {
  %conv = fpext float %x to double
  %cmp = fcmp olt double %conv, 0.000000e+00
  %conv1 = zext i1 %cmp to i32
  %conv2 = sitofp i32 %conv1 to float
  ret float %conv2
}

Into:
define float @bar(float %x) nounwind readnone optsize ssp {
  %cmp = fcmp olt float %x, 0.000000e+00   ; <---- This
  %conv1 = zext i1 %cmp to i32
  %conv2 = sitofp i32 %conv1 to float
  ret float %conv2
}


rdar://10215914

llvm-svn: 140869
 2011-09-30 18:45:50 +00:00
Bill Wendling
1485fec8b1 Constify 'isLSDA' and move a method out-of-line. 
llvm-svn: 140868
 2011-09-30 18:42:06 +00:00
Jim Grosbach
651c847dc5 Tidy up. Trailing whitespace. 
llvm-svn: 140865
 2011-09-30 18:09:53 +00:00
Jim Grosbach
44047da675 ARM Darwin default relocation model is PIC. 
This matches clang, so default options in llc and friends are now closer to
clang's defaults.

llvm-svn: 140863
 2011-09-30 17:41:35 +00:00
Akira Hatanaka
6f3cfcdb95 isCommutable should be 0 for DSUBu. 
llvm-svn: 140862
 2011-09-30 17:26:36 +00:00
Jim Grosbach
5b31ef50f5 ARM Fixup valus for movt/movw are for the whole value. 
Remove an assert that was expecting only the relevant 16bit portion for
the fixup being handled. Also kill some dead code in the T2 portion.

rdar://9653509

llvm-svn: 140861
 2011-09-30 17:23:05 +00:00
Akira Hatanaka
ffa28d49f1 Check values of immediate operands. 
llvm-svn: 140860
 2011-09-30 17:19:21 +00:00
Jakob Stoklund Olesen
783b18e818 Fix a bug in compare_numeric(). 
Thanks to Alexandru Dura and Jonas Paulsson for finding it.

llvm-svn: 140859
 2011-09-30 17:03:55 +00:00
Duncan Sands
14b9c222c6 Add forgotten tests that the cleanup flag is cleared if there 
is a catch-all landingpad clause.

llvm-svn: 140858
 2011-09-30 17:00:34 +00:00
Danil Malyshev
73aeedab45 MCJIT initialization TargetData 
llvm-svn: 140856
 2011-09-30 16:40:10 +00:00
Justin Holewinski
f088db2687 PTX: Various stylistic and code readability changes recommended by Jim Grosbach. 
llvm-svn: 140855
 2011-09-30 14:36:36 +00:00
Justin Holewinski
2a5786383a PTX: Add programmable rounding mode specifier for int <-> fp conversion instrs. 
Also take this opportunity to clean up the rounding mode pass.

llvm-svn: 140854
 2011-09-30 13:46:52 +00:00
Duncan Sands
b4c8b2d9fa Inlining often produces landingpad instructions with repeated 
catch or repeated filter clauses.  Teach instcombine a bunch
of tricks for simplifying landingpad clauses.  Currently the
code only recognizes the GNU C++ and Ada personality functions,
but that doesn't stop it doing a bunch of "generic" transforms
which are hopefully fine for any real-world personality function.
If these "generic" transforms turn out not to be generic, they
can always be conditioned on the personality function.  Probably
someone should add the ObjC++ personality function.  I didn't as
I don't know anything about it.

llvm-svn: 140852
 2011-09-30 13:12:16 +00:00
Torok Edwin
774d60816b some 3.0 API notes 
llvm-svn: 140851
 2011-09-30 13:07:52 +00:00
Torok Edwin
5df4e64d7b Comment grammar fixes. 
thanks to Duncan.

llvm-svn: 140850
 2011-09-30 13:07:47 +00:00
Justin Holewinski
f86bf451e4 PTX: Attempt to cleanup/unify the handling of FP rounding modes. This requires 
us to manually provide Pat<> definitions for all FP instruction patterns.

llvm-svn: 140849
 2011-09-30 12:54:43 +00:00
Torok Edwin
10dcb27bb4 Instead of crashing when MCAsmInfo is NULL, add an assert. 
This helps with porting code from 2.9 to 3.0 as TargetSelect.h changed location,
and if you include the old one by accident you will trigger this assert.

llvm-svn: 140848
 2011-09-30 12:31:57 +00:00
Akira Hatanaka
dcd69c2e07 Mips64 shift instructions. 
llvm-svn: 140841
 2011-09-30 03:18:46 +00:00
Akira Hatanaka
4bdb4b1958 Mips64 arithmetic and logical instructions with one source register and 
immediate.

llvm-svn: 140839
 2011-09-30 02:08:54 +00:00
Jim Grosbach
d94ffffc87 ARM fix encoding of VMOV.f32 and VMOV.f64 immediates. 
Encode the immediate into its 8-bit form as part of isel rather than later,
which simplifies things for mapping the encoding bits, allows the removal
of the custom disassembler decoding hook, makes the operand printer trivial,
and prepares things more cleanly for handling these in the asm parser.

rdar://10211428

llvm-svn: 140834
 2011-09-30 00:50:06 +00:00
Jakob Stoklund Olesen
82a55057c4 Precompute a bit vector of register sub-classes. 
llvm-svn: 140827
 2011-09-30 00:10:40 +00:00
Jakob Stoklund Olesen
35c649f61b Order register classes topologically. 
All register classes are given a lower ID than their sub-classes.
Cliques are ordered alphabetically.

This will be used to simplify some sub-class operations.

llvm-svn: 140826
 2011-09-30 00:10:36 +00:00
Akira Hatanaka
50a4f6d570 Fill delay slot with useful instructions. Modified from Sparc's version of delay 
slot filler.

Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140825
 2011-09-29 23:52:13 +00:00
Bill Wendling
ee48218f94 Create a machine basic block in the constant pool and retrieve the symbol for an MBB. 
llvm-svn: 140824
 2011-09-29 23:50:42 +00:00
Bill Wendling
de36760902 Support creating a constant pool value for a machine basic block. 
This is used when we want to take the address of a machine basic block, but it's
not associated with a BB in LLVM IR.

llvm-svn: 140823
 2011-09-29 23:48:44 +00:00
Nick Lewycky
fc476a3d3f Fold two identical set lookups into one. No functionality change. 
llvm-svn: 140821
 2011-09-29 23:40:12 +00:00
Jakob Stoklund Olesen
d7b6708541 Switch to ArrayRef<CodeGenRegisterClass*>. 
This makes it possible to allocate CodeGenRegisterClass instances
dynamically and reorder them.

llvm-svn: 140816
 2011-09-29 22:28:37 +00:00
Dan Gohman
7dca165e93 When eliminating unnecessary retain+autorelease on return values, 
handle the case where the retain is in a different basic block.
rdar://10210274.

llvm-svn: 140815
 2011-09-29 22:27:34 +00:00
Dan Gohman
2df048a94b Don't eliminate objc_retainBlock calls on stack objects if the 
objc_retainBlock call is potentially responsible for copying
the block to the heap to extend its lifetime. rdar://10209613.

llvm-svn: 140814
 2011-09-29 22:25:23 +00:00
Jim Grosbach
2e78f4835d Tidy up. Formatting. 
llvm-svn: 140810
 2011-09-29 21:43:01 +00:00
Nick Lewycky
73dbedf97e Fix typo. 
llvm-svn: 140807
 2011-09-29 21:07:46 +00:00
Akira Hatanaka
70be05d5d0 Mips64 arithmetic and logical instructions with two source registers. 
llvm-svn: 140806
 2011-09-29 20:37:56 +00:00
Eli Friedman
ac33381aa1 Clean up uses of switch instructions so they are not dependent on the operand ordering. Patch by Stepan Dyatkovskiy. 
llvm-svn: 140803
 2011-09-29 20:21:17 +00:00
Devang Patel
e5a1e5b655 Simplify. 
llvm-svn: 140789
 2011-09-29 17:06:40 +00:00
Devang Patel
b1bef6ba30 Clarify comments. 
llvm-svn: 140787
 2011-09-29 16:52:53 +00:00
Devang Patel
0729c18444 Remove unnecessary and unused data member. 
llvm-svn: 140786
 2011-09-29 16:48:44 +00:00
Devang Patel
204df6030c Cosmetic changes, as per Nick's review. 
llvm-svn: 140785
 2011-09-29 16:46:47 +00:00
Duncan Sands
fbf3eb2e3e Place this bracket according to the LLVM style. 
llvm-svn: 140784
 2011-09-29 16:01:46 +00:00
Justin Holewinski
e429b56306 PTX: Fix broken shared library build 
llvm-svn: 140783
 2011-09-29 14:25:48 +00:00
Jakob Stoklund Olesen
76da38e8e8 Expand the x86 V_SET0* pseudos right after register allocation. 
This also makes it possible to reduce the number of pseudo instructions
and get rid of the encoding information.

llvm-svn: 140776
 2011-09-29 05:10:54 +00:00
NAKAMURA Takumi
f82662e1f6 Target/ARM: Unbreak! CMake! Build! 
llvm-svn: 140774
 2011-09-29 03:32:49 +00:00
Jakob Stoklund Olesen
a2a0ba4d56 Delete NEONMoveFix, now unused. 
llvm-svn: 140773
 2011-09-29 02:56:45 +00:00
Jakob Stoklund Olesen
cfd5280df5 Use ExecutionDepsFix instead of NEONMoveFix. 
This enables NEON domain tracking across basic blocks, but should
otherwise do the same thing.

llvm-svn: 140772
 2011-09-29 02:48:41 +00:00
Andrew Trick
fa2c108a22 typo + pasto 
llvm-svn: 140769
 2011-09-29 01:53:08 +00:00
Jakob Stoklund Olesen
49803374a4 Remove NumImplicitOps which is now unused. 
llvm-svn: 140767
 2011-09-29 01:47:36 +00:00
Andrew Trick
e1d5ae73ac LSR: rewrite inner loops only. 
Rewriting the entire loop nest now requires -enable-lsr-nested.
See PR11035 for some performance data.
A few unit tests specifically test nested LSR, and are now under a flag.

llvm-svn: 140762
 2011-09-29 01:33:38 +00:00
Andrew Trick
75c6a45d08 whitespace 
llvm-svn: 140761
 2011-09-29 01:31:48 +00:00