Andrew Trick
2904a19a19
misched: Handle "transient" non-instructions.
...
llvm-svn: 165701
2012-10-11 05:37:06 +00:00
Andrew Trick
9ba6a8d7ea
misched: fall-back to a target hook for instr bundles.
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llvm-svn: 165606
2012-10-10 05:43:18 +00:00
Andrew Trick
4ca94d939c
misched: Use the TargetSchedModel interface wherever possible.
...
Allows the new machine model to be used for NumMicroOps and OutputLatency.
Allows the HazardRecognizer to be disabled along with itineraries.
llvm-svn: 165603
2012-10-10 05:43:09 +00:00
Andrew Trick
6ef4c5cf64
misched: Add computeInstrLatency to TargetSchedModel.
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llvm-svn: 165566
2012-10-09 23:44:32 +00:00
Andrew Trick
0a8af76cb4
misched: Allow flags to disable hasInstrSchedModel/hasInstrItineraries for external users of TargetSchedule.
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llvm-svn: 165564
2012-10-09 23:44:26 +00:00
Andrew Trick
7ffdf0d76d
Enable -schedmodel, but prefer itineraries until we have more benchmark data.
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llvm-svn: 165188
2012-10-04 00:24:34 +00:00
Andrew Trick
7b511c1a80
TargetSchedule: cleanup computeOperandLatency logic & diagnostics.
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llvm-svn: 164154
2012-09-18 18:20:02 +00:00
Andrew Trick
e3e6fae309
TargetSchedModel API. Implement latency lookup, disabled.
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llvm-svn: 164098
2012-09-18 04:03:34 +00:00
Andrew Trick
150c97940b
Revert r164061-r164067. Most of the new subtarget emitter.
...
I have to work out the Target/CodeGen header dependencies
before putting this back.
llvm-svn: 164072
2012-09-17 23:00:42 +00:00
Andrew Trick
3d3f796f3f
TargetSchedModel API. Implement latency lookup, disabled.
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llvm-svn: 164065
2012-09-17 22:19:08 +00:00
Andrew Trick
344fdddf04
TargetSchedModel interface. To be implemented...
...
llvm-svn: 163934
2012-09-14 20:26:46 +00:00
