Commit Graph

61863 Commits

Author SHA1 Message Date
David Blaikie
7a29358013 DebugInfo: print DBG_VALUE MachineInstrs with [] for deref and drop the offset when it's zero
llvm-svn: 184045
2013-06-15 15:52:58 +00:00
Jakub Staszak
6fe8ea3c17 Use 0 instead of NULL.
llvm-svn: 184044
2013-06-15 12:20:44 +00:00
Benjamin Kramer
7c4e240147 PruneEH: Only merge attribute sets when used. No functionality change.
llvm-svn: 184041
2013-06-15 10:55:39 +00:00
Andrew Trick
55c8a4e3e5 Missing NDEBUGs.
llvm-svn: 184039
2013-06-15 05:46:47 +00:00
Andrew Trick
ba2de01078 MI-Sched: heuristics using the new latency and machine model.
llvm-svn: 184038
2013-06-15 05:39:19 +00:00
Andrew Trick
768a74cb96 Support BufferSize on ProcResGroup for unified MOp schedulers.
And add Sandybridge/Haswell resource buffers.

llvm-svn: 184034
2013-06-15 04:50:06 +00:00
Andrew Trick
31eeff56c7 Update machine models. Specify buffer sizes for OOO processors.
llvm-svn: 184033
2013-06-15 04:50:02 +00:00
Andrew Trick
5d13fe97ed Machine Model: Add MicroOpBufferSize and resource BufferSize.
Replace the ill-defined MinLatency and ILPWindow properties with
with straightforward buffer sizes:
MCSchedMode::MicroOpBufferSize
MCProcResourceDesc::BufferSize

These can be used to more precisely model instruction execution if desired.

Disabled some misched tests temporarily. They'll be reenabled in a few commits.

llvm-svn: 184032
2013-06-15 04:49:57 +00:00
Andrew Trick
e874623046 MI-Sched: Rename IssueCount to CurrMOps.
"Counts" refer to scaled resource counts within a region. CurrMOps is
simply the number of micro-ops to be issue in the current cycle.

llvm-svn: 184031
2013-06-15 04:49:49 +00:00
Andrew Trick
be4026d9a8 MI-Sched: Remove the temporary EnableCopyConstrain flag.
llvm-svn: 184030
2013-06-15 04:49:46 +00:00
Andrew Trick
7c68d011b0 MI-Sched: added tracking of dependent latency for better heuristics.
Heuristics compare the critical path in the scheduled code, called
ExpectedLatency, with the latency of instructions remaining to be
scheduled. There are two ways to look at remaining latency:

(1) Dependent latency includes the latency between unscheduled and
scheduled instructions.

(2) Independent latency is simply the height (bottom-up) or depth
(top-down) of instructions currently in the ready Q.

llvm-svn: 184029
2013-06-15 04:49:44 +00:00
Andrew Trick
359d7832e6 MI-Sched: DEBUG: print critical resource.
llvm-svn: 184028
2013-06-15 04:49:42 +00:00
Stephen Lin
106aaf56d4 SelectionDAG: slightly refactor DAGCombiner::visitSELECT_CC to avoid redudant checks...
This doesn't really effect performance due to all the relevant calls being transparent but is clearer. 

llvm-svn: 184027
2013-06-15 04:03:33 +00:00
David Blaikie
d1a8512cd8 Debug Info: Don't print the display name and colon prefix for DEBUG_VALUE comments if the display name is empty
llvm-svn: 184026
2013-06-15 00:33:47 +00:00
Sean Silva
7dafd05c2e [yaml2obj] Add support for sh_link via Link key.
llvm-svn: 184022
2013-06-15 00:25:26 +00:00
Tom Stellard
0f71ebc5a8 R600: Add SI load support for v[24]i32 and store for v2i32
Also add a seperate vector lit test file, since r600 doesn't seem to handle
v2i32 load/store yet, but we can test both for SI.

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Aaron Watry <awatry@gmail.com>
llvm-svn: 184021
2013-06-15 00:09:31 +00:00
Rafael Espindola
daa7f712a2 Remove the LLVM specific archive index.
Archive files (.a) can have a symbol table indicating which object
files in them define which symbols. The purpose of this symbol table
is to speed up linking by allowing the linker the read only the .o
files it is actually going to use instead of having to parse every
object's symbol table.

LLVM's archive library currently supports a LLVM specific format for
such table. It is hard to see any value in that now that llvm-ld is
gone:

* System linkers don't use it: GNU ar uses the same plugin as the
linker to create archive files with a regular index. The OS X ar
creates no symbol table for IL files, I assume the linker just parses
all IL files.

* It doesn't interact well with archives having both IL and native objects.

* We probably don't want to be responsible for yet another archive
format variant.

This patch then:

* Removes support for creating and reading such index from lib/Archive.
* Remove llvm-ranlib, since there is nothing left for it to do.

We should in the future add support for regular indexes to llvm-ar for
both native and IL objects. When we do that, llvm-ranlib should be
reimplemented as a symlink to llvm-ar, as it is equivalent to "ar s".

llvm-svn: 184019
2013-06-14 23:25:53 +00:00
Tom Stellard
428a19228a R600: Use correct encoding for Vertex Fetch instructions on Cayman
Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 184016
2013-06-14 22:12:30 +00:00
Tom Stellard
c25852891f R600: Use EXPORT_RAT_INST_STORE_DWORD for stores on Cayman
We were using RAT_INST_STORE_RAW, which seemed to work, but the docs
say this instruction doesn't exist for Cayman, so it's probably safer
to use a documented instruction instead.

Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 184015
2013-06-14 22:12:24 +00:00
Tom Stellard
a3b0b87105 R600: Factor the instruction encoding out the RAT_WRITE_CACHELESS_eg class
Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 184014
2013-06-14 22:12:19 +00:00
Tom Stellard
9f063c72c3 R600: Move instruction encoding definitions into a separate .td file
Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 184013
2013-06-14 22:12:09 +00:00
Matt Arsenault
8aacc4b4a3 Introduce getSelect usage and use more getSelectCC
llvm-svn: 184012
2013-06-14 22:04:37 +00:00
Rafael Espindola
61f7e167f2 Add GetCurrentDirectory back.
It looks like clang-tools-extra/unittests/cpp11-migrate/TransformTest.cpp
depends on the behaviour of the old one on Windows. Maybe a difference
between GetCurrentDirectoryA and GetCurrentDirectoryW?

llvm-svn: 184009
2013-06-14 21:41:33 +00:00
Stephen Lin
692dd368c7 SelectionDAG: minor fix to order of operands in comments to match the code
llvm-svn: 184008
2013-06-14 21:33:58 +00:00
Rafael Espindola
9534308a00 Replace use of PathV1.h in MCContext.cpp.
GetCurrentDirectory is now unused. Remove it.

llvm-svn: 184003
2013-06-14 20:26:58 +00:00
Tim Northover
11fabb62e9 Mark rematerialized super/sub registers as dead.
When we're rematerializing into a not-quite-right register we already add the
real definition as an imp-def, but we should also be marking the "official"
register as dead, since nothing else is going to use it as a result of this
remat.

Not doing this can affect pressure tracking.

rdar://problem/14158833

llvm-svn: 184002
2013-06-14 20:22:21 +00:00
Rafael Espindola
109393c56d Replace use of PathV1.h in Program.cpp.
llvm-svn: 183996
2013-06-14 19:38:45 +00:00
Stephen Lin
ccd266c666 SelectionDAG: Fix incorrect condition checks in some cases of folding FADD/FMUL combinations; also improve accuracy of comments
llvm-svn: 183993
2013-06-14 18:17:35 +00:00
Rafael Espindola
9d4329e0fb Remove unused argument.
llvm-svn: 183992
2013-06-14 18:12:13 +00:00
Rafael Espindola
9f0c1fe5ad Don't use PathV1.h in GraphWriter.cpp.
llvm-svn: 183988
2013-06-14 17:11:14 +00:00
Rafael Espindola
4430795d30 Convert a use of sys::Path::GetTemporaryDirectory.
llvm-svn: 183987
2013-06-14 16:43:15 +00:00
Rafael Espindola
b3ffa88108 Remove a use of PathV1.h.
llvm-svn: 183985
2013-06-14 16:20:18 +00:00
Derek Schuff
4c429cad03 Make PrologEpilogInserter save/restore all callee saved registers
in functions which call __builtin_unwind_init()

__builtin_unwind_init() is an undocumented gcc intrinsic which has this effect,
and is used in libgcc_eh.

Goes part of the way toward fixing PR8541.

llvm-svn: 183984
2013-06-14 16:15:29 +00:00
Rafael Espindola
3e13459e12 Remove a use of PathV1.h.
llvm-svn: 183982
2013-06-14 15:24:56 +00:00
Rafael Espindola
703b03a992 Move PrependMainExecutablePath next to its only user.
llvm-svn: 183980
2013-06-14 15:12:13 +00:00
Rafael Espindola
7a9e435747 Remove a use of sys::Path.
llvm-svn: 183979
2013-06-14 13:59:21 +00:00
Amaury de la Vieuville
13c4894a31 ARM: fix thumb coprocessor instruction with pre-writeback disassembly
was        stc2 p0, c0, [r0]!
instead of stc2 p0, c0, [r0,#0]!

llvm-svn: 183975
2013-06-14 11:21:35 +00:00
Benjamin Kramer
a0c15494c5 X86: cvtpi2ps is just an SSE instruction with MMX operands. It has no AVX equivalent.
Give it the right register format so we can also emit it when AVX is enabled.

llvm-svn: 183971
2013-06-14 09:31:41 +00:00
JF Bastien
cb60eaba94 Enable FastISel on ARM for Linux and NaCl, not MCJIT
This is a resubmit of r182877, which was reverted because it broken
MCJIT tests on ARM. The patch leaves MCJIT on ARM as it was before: only
enabled for iOS. I've CC'ed people from the original review and revert.

FastISel was only enabled for iOS ARM and Thumb2, this patch enables it
for ARM (not Thumb2) on Linux and NaCl, but not MCJIT.

Thumb2 support needs a bit more work, mainly around register class
restrictions.

The patch punts to SelectionDAG when doing TLS relocation on non-Darwin
targets. I will fix this and other FastISel-to-SelectionDAG failures in
a separate patch.

The patch also forces FastISel to retain frame pointers: iOS always
keeps them for backtracking (so emitted code won't change because of
this), but Linux was getting much worse code that was incorrect when
using big frames (such as test-suite's lencod). I'll also fix this in a
later patch, it will probably require a peephole so that FastISel
doesn't rematerialize frame pointers back-to-back.

The test changes are straightforward, similar to:
  http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20130513/174279.html
They also add a vararg test that got dropped in that change.

I ran all of lnt test-suite on A15 hardware with --optimize-option=-O0
and all the tests pass. All the tests also pass on x86 make check-all. I
also re-ran the check-all tests that failed on ARM, and they all seem to
pass.

llvm-svn: 183966
2013-06-14 02:49:43 +00:00
Sean Silva
221b8835d3 [yaml2obj] Add support for sh_addralign via AddressAlign key.
For consistency, change the address in the test case from 0xDEADBEEF to
0xCAFEBABE since 0xCAFEBABE that actually has a 2-byte alignment.

llvm-svn: 183962
2013-06-14 00:38:02 +00:00
Jakub Staszak
578a445162 Move #include from .h to .cpp file.
llvm-svn: 183960
2013-06-14 00:00:13 +00:00
Sean Silva
51f6318c1e [yaml2obj] Add support for specifying raw section content.
llvm-svn: 183955
2013-06-13 22:20:01 +00:00
Sean Silva
a31cf66d83 [yaml2obj] Add sh_addr via Address key.
llvm-svn: 183954
2013-06-13 22:19:54 +00:00
Sean Silva
c72d9620ea [yaml2obj] Initial ELF section support.
The current functionality is extremely basic and a bit rough around the
edges, but it will flesh out in future commits.

llvm-svn: 183953
2013-06-13 22:19:48 +00:00
Rafael Espindola
0c66a19e9a Try to fix the windows build.
llvm-svn: 183950
2013-06-13 21:38:21 +00:00
Rafael Espindola
6c0ca078e2 Don't use PathV1.h in Signals.h.
llvm-svn: 183947
2013-06-13 21:16:58 +00:00
Rafael Espindola
1cc376fe6a Don't use PathV1.h in FileUtilities.h.
llvm-svn: 183941
2013-06-13 20:41:00 +00:00
Rafael Espindola
ef0d0d8b0b Avoid using PathV1.h in Program.h.
llvm-svn: 183940
2013-06-13 20:25:38 +00:00
Tom Stellard
c469db6f29 R600: Don't try to fix reg class when copying IMPLICIT_DEF to a register
The test case for this is way too complex to be useful as a lit test,
and I was unable to reduce it.

https://bugs.freedesktop.org/show_bug.cgi?id=65438

llvm-svn: 183937
2013-06-13 20:14:00 +00:00
Rafael Espindola
eed3b256ab Add a version of sys::ExecuteAndWait that takes StringRefs.
llvm-svn: 183934
2013-06-13 20:06:28 +00:00