Commit Graph

89909 Commits

Author SHA1 Message Date
Christian Konig
6f888b7d1a R600/SI: add post ISel folding for SI v2
Include immediate folding and SGPR limit handling for VOP3 instructions.

v2: remove leftover hasExtraSrcRegAllocReq

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176101
2013-02-26 17:52:23 +00:00
Christian Konig
c385dfd27c R600/SI: add folding helper
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176100
2013-02-26 17:52:16 +00:00
Christian Konig
02aadc8d31 R600/SI: fix VOP3b encoding v2
v2: document why we hardcode VCC for now.

This is a candidate for the mesa-stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176099
2013-02-26 17:52:09 +00:00
Christian Konig
bfeca81c05 R600/SI: fix and cleanup SI register definition v2
Prevent producing real strange tablegen code by using
proper register sizes, alignments and hierarchy.

Also cleanup the unused definitions and add some comments.

v2: add SGPR 512 bit registers, stop registers from wrapping around,
    fix SGPR alignment

This is a candidate for the mesa-stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176098
2013-02-26 17:52:03 +00:00
Christian Konig
f466ed5453 R600/SI: fix stupid typo
This is a candidate for the mesa-stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176097
2013-02-26 17:51:57 +00:00
Renato Golin
2b9a82dbf8 Adding ARM as supported architecture
llvm-svn: 176096
2013-02-26 17:23:13 +00:00
Renato Golin
1d5ca6f92e Proper XFAILs for ARMv7 / v5
llvm-svn: 176095
2013-02-26 17:16:27 +00:00
Bill Schmidt
76befd83d4 Fix PR15359.
The PowerPC TLS relocation types were not previously added to the
necessary list in MCELFStreamer::fixSymbolsInTLSFixups().  Now they are!

llvm-svn: 176094
2013-02-26 16:41:03 +00:00
Renato Golin
7b3de2b41e GCC 4.6.3 O3 miscompiles on ARM
llvm-svn: 176090
2013-02-26 13:32:40 +00:00
Kostya Serebryany
f560b78692 Unify clang/llvm attributes for asan/tsan/msan (LLVM part)
These are two related changes (one in llvm, one in clang).
LLVM: 
- rename address_safety => sanitize_address (the enum value is the same, so we preserve binary compatibility with old bitcode)
- rename thread_safety => sanitize_thread
- rename no_uninitialized_checks -> sanitize_memory

CLANG: 
- add __attribute__((no_sanitize_address)) as a synonym for __attribute__((no_address_safety_analysis))
- add __attribute__((no_sanitize_thread))
- add __attribute__((no_sanitize_memory))

for S in address thread memory
If -fsanitize=S is present and __attribute__((no_sanitize_S)) is not
set llvm attribute sanitize_S

llvm-svn: 176075
2013-02-26 06:58:09 +00:00
Michael Ilseman
46cd4a307a Use a DenseMap instead of a std::map for AnalysisID -> Pass* maps. This reduces the pass-manager overhead from FPPassManager::runOnFunction() by about 10%.
llvm-svn: 176072
2013-02-26 01:31:59 +00:00
Akira Hatanaka
02e5e13e00 [mips] Use class RegDefsUses to track register defs and uses.
No functionality change.

llvm-svn: 176070
2013-02-26 01:30:05 +00:00
Chad Rosier
5d41dc7229 [fast-isel] Make sure the FastLowerArguments function checks to make sure the
arguments type is a simple type.
rdar://13290455

llvm-svn: 176066
2013-02-26 01:05:31 +00:00
Michael Liao
ad0b9ecc47 Refine fix to PR10499, no functionality change
- Put expensive checking after simple one

llvm-svn: 176060
2013-02-25 23:16:36 +00:00
Michael Liao
ff7d7ec88b Fix PR10499
- Check whether SSE is available before lowering all 1s vector building with
  PCMPEQD, which is only available from SSE2

llvm-svn: 176058
2013-02-25 23:01:03 +00:00
Andrew Kaylor
ce98de789f Provide workaround for PR 15130.
This changes the RecordingMemoryManager in lli to use mapped memory rather than malloc to allocate memory for sections and uses a 'near' MemoryBlock to keep the allocations together.  This works around a problem in MCJIT where relocations are applied to a generated image immediately oupon generation, which isn't appropriate for the remote case.

llvm-svn: 176057
2013-02-25 23:00:19 +00:00
Chad Rosier
cf61965085 Fix wording.
llvm-svn: 176055
2013-02-25 22:20:00 +00:00
Chad Rosier
f38b2c410b Remove extraneous attribute number.
llvm-svn: 176053
2013-02-25 22:06:05 +00:00
Chad Rosier
37142b6930 [fast-isel] Add X86FastIsel::FastLowerArguments to handle functions with 6 or
fewer scalar integer (i32 or i64) arguments. It completely eliminates the need
for SDISel for trivial functions.

Also, add the new llc -fast-isel-abort-args option, which is similar to
-fast-isel-abort option, but for formal argument lowering.

llvm-svn: 176052
2013-02-25 21:59:35 +00:00
Andrew Trick
9dd0c20307 pre-RA-sched fix: only reevaluate physreg interferences when necessary.
Fixes rdar:13279013: scheduler was blowing up on select instructions.

llvm-svn: 176037
2013-02-25 19:11:48 +00:00
Chad Rosier
77e46d6eb6 [ms-inline asm] Add support for the pushad/popad mnemonics.
rdar://13254235

llvm-svn: 176036
2013-02-25 19:06:27 +00:00
Renato Golin
b0a7f472e8 ARM build docs easier for copy&paste
llvm-svn: 176033
2013-02-25 18:25:58 +00:00
Matt Beaumont-Gay
c6ce965ace 'Hexadecimal' has two 'a's and only one 'i'.
llvm-svn: 176031
2013-02-25 18:11:18 +00:00
Bill Schmidt
a7e4a58051 Fix missing relocation for TLS addressing peephole optimization.
Report and fix due to Kai Nacke.  Testcase update by me.

llvm-svn: 176029
2013-02-25 16:44:35 +00:00
Chandler Carruth
9baafaead0 Fix spelling noticed by Duncan.
llvm-svn: 176023
2013-02-25 14:29:38 +00:00
Chandler Carruth
aea541125e Fix the root cause of PR15348 by correctly handling alignment 0 on
memory intrinsics in the SDAG builder.

When alignment is zero, the lang ref says that *no* alignment
assumptions can be made. This is the exact opposite of the internal API
contracts of the DAG where alignment 0 indicates that the alignment can
be made to be anything desired.

There is another, more explicit alignment that is better suited for the
role of "no alignment at all": an alignment of 1. Map the intrinsic
alignment to this early so that we don't end up generating aligned DAGs.

It is really terrifying that we've never seen this before, but we
suddenly started generating a large number of alignment 0 memcpys due to
the new code to do memcpy-based copying of POD class members. That patch
contains a bug that rounds bitfield alignments down when they are the
first field. This can in turn produce zero alignments.

This fixes weird crashes I've seen in library users of LLVM on 32-bit
hosts, etc.

llvm-svn: 176022
2013-02-25 14:20:21 +00:00
Reed Kotler
4ca11e6b77 Make pseudos FEXT_CCRX16_ins and FEXT_CCRXI16_ins into custom emitters.
llvm-svn: 176007
2013-02-25 02:25:47 +00:00
David Blaikie
31258c581d DIBuilder: support structs with vtable pointers in the same way as classes
llvm-svn: 176004
2013-02-25 01:07:18 +00:00
Reed Kotler
563b04a97f Make psuedo FEXT_T8I816_ins into a custom emitter.
llvm-svn: 176002
2013-02-24 23:17:51 +00:00
Bill Schmidt
364cbe9f03 Fix PR14364.
This removes a const_cast hack from PPCRegisterInfo::hasReservedSpillSlot().
The proper place to save the frame index for the CR spill slot is in the
PPCFunctionInfo object, not the PPCRegisterInfo object.

No new test cases, as this just reimplements existing function.  Existing
tests such as test/CodeGen/PowerPC/crsave.ll are sufficient.

llvm-svn: 175998
2013-02-24 17:34:50 +00:00
Benjamin Kramer
caa5d4f15d CVP: If we have a PHI with an incoming select, try to skip the select.
This is a common pattern with dyn_cast and similar constructs, when the
PHI no longer depends on the select it can often be turned into a simpler
construct or even get hoisted out of the loop.

PR15340.

llvm-svn: 175995
2013-02-24 15:34:43 +00:00
Benjamin Kramer
02f21547cd Fix invalid IR in test, missing incoming value for PHI node.
llvm-svn: 175994
2013-02-24 15:34:29 +00:00
Francois Pichet
9aca7b52c7 Typo
llvm-svn: 175991
2013-02-24 12:34:13 +00:00
Nadav Rotem
0740239f87 Revert r169638 because it broke Mesa llvmpipe tests.
Fix PR15239.

llvm-svn: 175985
2013-02-24 07:09:35 +00:00
Reed Kotler
407e5b31f6 Make psuedo FEXT_T8I816_ins a custom inserter. It should be expanded
as early as possible; which means during instruction selection.

llvm-svn: 175984
2013-02-24 06:16:39 +00:00
Cameron Zwarich
3ee02ffe83 Add a use of an otherwise unused variable to remove a warning in non-Asserts
builds.

llvm-svn: 175981
2013-02-24 01:26:05 +00:00
Cameron Zwarich
4c64670f2d TwoAddressInstructionPass::tryInstructionTransform() only potentially returns
true when shouldOnlyCommute is false, so we can remove code that checks
otherwise.

llvm-svn: 175980
2013-02-24 00:27:29 +00:00
Cameron Zwarich
c4ffebf11a TwoAddrInstructionPass::tryInstructionTransform() has a case where it calls
itself recursively with a new instruction that has not been finalized, in order
to determine whether to keep the instruction. On 'make check' and test-suite the
only cases where the recursive invocation made any transformations were simple
instruction commutations, so I am restricting the recursive invocation to do
only this.

The other cases wouldn't work correctly when updating LiveIntervals, since the
new instructions don't have slot indices and LiveIntervals hasn't yet been
updated. If the other transformations were actually triggering in any test case
it would be possible to support it with a lot of effort, but since they don't
it's not worth it.

llvm-svn: 175979
2013-02-24 00:27:26 +00:00
Reed Kotler
041e721f3f Add new base instruction def for cmpi, cmp, slt and sltu so that def/uses
proper. Fixed this already a few days ago for slti.

llvm-svn: 175975
2013-02-23 23:37:03 +00:00
Cameron Zwarich
f8a7b64dfc TargetInstrInfo::commuteInstruction() doesn't actually return a new instruction
unless it was requested to with an optional parameter that defaults to false, so
we don't need to handle that case in TwoAddressInstructionPass.

llvm-svn: 175974
2013-02-23 23:13:28 +00:00
Renato Golin
87e7870bee Add global structure vectorization to docs
llvm-svn: 175965
2013-02-23 13:25:41 +00:00
Renato Golin
d648db09a8 Some more tests for the global structure vectorizer
llvm-svn: 175964
2013-02-23 12:48:30 +00:00
Benjamin Kramer
bdb1d9aad3 X86: Disable cmov-memory patterns on subtargets without cmov.
Fixes PR15115.

llvm-svn: 175962
2013-02-23 10:40:58 +00:00
Cameron Zwarich
3be41979dc Make some fixes for LiveInterval repair with debug info. Debug value
MachineInstrs don't have a slot index.

llvm-svn: 175961
2013-02-23 10:25:25 +00:00
Cameron Zwarich
90a3e0aee8 Fix a bug with the LiveIntervals updating in the two-address pass found by
running ASCI_Purple/SMG2000 in the test-suite.

llvm-svn: 175957
2013-02-23 04:49:22 +00:00
Cameron Zwarich
5078ef3755 Make TwoAddressInstructionPass::sink3AddrInstruction() LiveIntervals-aware.
llvm-svn: 175956
2013-02-23 04:49:20 +00:00
Cameron Zwarich
20abdb6c81 Make rescheduleMIBelowKill() and rescheduleKillAboveMI() LiveIntervals-aware in
TwoAddressInstructionPass. The code in rescheduleMIBelowKill() is a bit tricky,
since multiple instructions need to be moved down, one-at-a-time, in reverse
order.

llvm-svn: 175955
2013-02-23 04:49:13 +00:00
Reed Kotler
65cb21ddd8 Expand pseudos/macros for Selt. This is the last of the complex
macros.The rest is some small misc. stuff.

llvm-svn: 175950
2013-02-23 03:09:56 +00:00
Jim Grosbach
50d870a10f ARM: Convenience aliases for 'srs*' instructions.
Handle an implied 'sp' operand.

rdar://11466783

llvm-svn: 175940
2013-02-23 00:52:09 +00:00
Michael Gottesman
621536028f Fixed a careless mistake.
rdar://13273675.

llvm-svn: 175939
2013-02-23 00:31:32 +00:00