7 Commits

Author SHA1 Message Date
Dan Gohman
15597f07b2 Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)

This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.

This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.

Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.

The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.

llvm-svn: 57748
2008-10-18 02:06:02 +00:00
Anton Korobeynikov
8ed548b24a Add rudimentary support for 'r' register operand
llvm-svn: 57359
2008-10-10 20:28:10 +00:00
Dan Gohman
a712c8d29e Fix these enums' starting values to reflect the way that
instruction opcodes are now numbered. No functionality change.

llvm-svn: 56497
2008-09-23 18:42:32 +00:00
Dan Gohman
9742f7772d Rename SDOperand to SDValue.
llvm-svn: 54128
2008-07-27 21:46:04 +00:00
Dan Gohman
295abfe228 Replace some std::vectors that showed up in heap profiling with
SmallVectors. Change the signature of TargetLowering::LowerArguments
to avoid returning a vector by value, and update the two targets
which still use this directly, Sparc and IA64, accordingly.

llvm-svn: 52917
2008-06-30 20:31:15 +00:00
Chris Lattner
fa003f7a57 Switch sparc from using LowerCallTo to using LowerOperation(CALL) like
other targets.  Use autogenerated calling conv to lower result of
calls.

llvm-svn: 48444
2008-03-17 06:01:07 +00:00
Chris Lattner
5cb886d4d6 split sparc lowering out into SparcISelLowering.{cpp|h} to follow
best practices.

llvm-svn: 48442
2008-03-17 03:21:36 +00:00