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27286 Commits

Author SHA1 Message Date
Dan Gohman
3a3b51162b Preserve the DominanceFrontier analysis in the LoopDeletion pass. 
llvm-svn: 65359
 2009-02-24 01:21:53 +00:00
Devang Patel
49b26ded5d gdb uses DW_AT_prototyped to identify K&R style in C based languages. 
This fixes objc.dg/dwarf-prototypes.m scan-assembler DW_AT_prototyped from llvmgcc42 test suite.

llvm-svn: 65357
 2009-02-24 00:52:19 +00:00
Devang Patel
702836b2dd While folding unconditional return move DbgRegionEndInst into the predecessor, instead of removing it. This fixes following tests from llvmgcc42 testsuite. 
gcc.c-torture/execute/20000605-3.c
gcc.c-torture/execute/20020619-1.c
gcc.c-torture/execute/20030920-1.c
gcc.c-torture/execute/loop-ivopts-1.c

llvm-svn: 65353
 2009-02-24 00:05:16 +00:00
Devang Patel
98ea831c24 If there is not any debug info available for any global variables and any subprograms then there is not any debug info to emit. 
llvm-svn: 65352
 2009-02-24 00:02:15 +00:00
Dan Gohman
1d93a1d2cb Back out the change in 64918 that used sign-extensions when promoting 
trip counts that use signed comparisons. It's not obviously the best
approach for preserving trip count information, and at any rate there
isn't anything in the tree right now that makes use of that, so for
now always using zero-extensions is preferable.

llvm-svn: 65347
 2009-02-23 23:20:35 +00:00
Dan Gohman
3766eeea36 Fast-isel can't do TLS yet, so it should fall back to SDISel 
if it sees TLS addresses.

llvm-svn: 65341
 2009-02-23 22:03:08 +00:00
Dan Gohman
f7d0d6fe22 LoopDeletion needs to inform ScalarEvolution when a loop is deleted, 
so that ScalarEvolution doesn't hang onto a dangling Loop*, which
could be a problem if another Loop happens to get allocated at the
same address.

llvm-svn: 65323
 2009-02-23 17:10:29 +00:00
Dan Gohman
67530bbc77 IndVarSimplify preserves ScalarEvolution. In the 
-std-compile-opts sequence, this avoids the need for ScalarEvolution to
be rerun before LoopDeletion.

llvm-svn: 65318
 2009-02-23 16:29:41 +00:00
Zhou Sheng
d3008c8b1c Should reset DBI_Prev if DBI_Next == 0. 
llvm-svn: 65314
 2009-02-23 10:14:11 +00:00
Evan Cheng
dd139e795c Only v1i16 (i.e. _m64) is returned via RAX / RDX. 
llvm-svn: 65313
 2009-02-23 09:03:22 +00:00
Nate Begeman
e0093d2501 Generate better code for v8i16 shuffles on SSE2 
Generate better code for v16i8 shuffles on SSE2 (avoids stack)
Generate pshufb for v8i16 and v16i8 shuffles on SSSE3 where it is fewer uops.
Document the shuffle matching logic and add some FIXMEs for later further
  cleanups.
New tests that test the above.

Examples:

New:
_shuf2:
	pextrw	$7, %xmm0, %eax
	punpcklqdq	%xmm1, %xmm0
	pshuflw	$128, %xmm0, %xmm0
	pinsrw	$2, %eax, %xmm0

Old:
_shuf2:
	pextrw	$2, %xmm0, %eax
	pextrw	$7, %xmm0, %ecx
	pinsrw	$2, %ecx, %xmm0
	pinsrw	$3, %eax, %xmm0
	movd	%xmm1, %eax
	pinsrw	$4, %eax, %xmm0
	ret

=========

New:
_shuf4:
	punpcklqdq	%xmm1, %xmm0
	pshufb	LCPI1_0, %xmm0

Old:
_shuf4:
	pextrw	$3, %xmm0, %eax
	movsd	%xmm1, %xmm0
	pextrw	$3, %xmm1, %ecx
	pinsrw	$4, %ecx, %xmm0
	pinsrw	$5, %eax, %xmm0

========

New:
_shuf1:
	pushl	%ebx
	pushl	%edi
	pushl	%esi
	pextrw	$1, %xmm0, %eax
	rolw	$8, %ax
	movd	%xmm0, %ecx
	rolw	$8, %cx
	pextrw	$5, %xmm0, %edx
	pextrw	$4, %xmm0, %esi
	pextrw	$3, %xmm0, %edi
	pextrw	$2, %xmm0, %ebx
	movaps	%xmm0, %xmm1
	pinsrw	$0, %ecx, %xmm1
	pinsrw	$1, %eax, %xmm1
	rolw	$8, %bx
	pinsrw	$2, %ebx, %xmm1
	rolw	$8, %di
	pinsrw	$3, %edi, %xmm1
	rolw	$8, %si
	pinsrw	$4, %esi, %xmm1
	rolw	$8, %dx
	pinsrw	$5, %edx, %xmm1
	pextrw	$7, %xmm0, %eax
	rolw	$8, %ax
	movaps	%xmm1, %xmm0
	pinsrw	$7, %eax, %xmm0
	popl	%esi
	popl	%edi
	popl	%ebx
	ret

Old:
_shuf1:
	subl	$252, %esp
	movaps	%xmm0, (%esp)
	movaps	%xmm0, 16(%esp)
	movaps	%xmm0, 32(%esp)
	movaps	%xmm0, 48(%esp)
	movaps	%xmm0, 64(%esp)
	movaps	%xmm0, 80(%esp)
	movaps	%xmm0, 96(%esp)
	movaps	%xmm0, 224(%esp)
	movaps	%xmm0, 208(%esp)
	movaps	%xmm0, 192(%esp)
	movaps	%xmm0, 176(%esp)
	movaps	%xmm0, 160(%esp)
	movaps	%xmm0, 144(%esp)
	movaps	%xmm0, 128(%esp)
	movaps	%xmm0, 112(%esp)
	movzbl	14(%esp), %eax
	movd	%eax, %xmm1
	movzbl	22(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm1, %xmm2
	movzbl	42(%esp), %eax
	movd	%eax, %xmm1
	movzbl	50(%esp), %eax
	movd	%eax, %xmm3
	punpcklbw	%xmm1, %xmm3
	punpcklbw	%xmm2, %xmm3
	movzbl	77(%esp), %eax
	movd	%eax, %xmm1
	movzbl	84(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm1, %xmm2
	movzbl	104(%esp), %eax
	movd	%eax, %xmm1
	punpcklbw	%xmm1, %xmm0
	punpcklbw	%xmm2, %xmm0
	movaps	%xmm0, %xmm1
	punpcklbw	%xmm3, %xmm1
	movzbl	127(%esp), %eax
	movd	%eax, %xmm0
	movzbl	135(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm0, %xmm2
	movzbl	155(%esp), %eax
	movd	%eax, %xmm0
	movzbl	163(%esp), %eax
	movd	%eax, %xmm3
	punpcklbw	%xmm0, %xmm3
	punpcklbw	%xmm2, %xmm3
	movzbl	188(%esp), %eax
	movd	%eax, %xmm0
	movzbl	197(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm0, %xmm2
	movzbl	217(%esp), %eax
	movd	%eax, %xmm4
	movzbl	225(%esp), %eax
	movd	%eax, %xmm0
	punpcklbw	%xmm4, %xmm0
	punpcklbw	%xmm2, %xmm0
	punpcklbw	%xmm3, %xmm0
	punpcklbw	%xmm1, %xmm0
	addl	$252, %esp
	ret

llvm-svn: 65311
 2009-02-23 08:49:38 +00:00
Mon P Wang
75d957dba4 Changed option name from inline-threshold to basic-inline-threshold because 
inline-threshold option is used by the inliner.

llvm-svn: 65309
 2009-02-23 07:07:56 +00:00
Chris Lattner
29437eb4c3 fix some typos that Duncan noticed 
llvm-svn: 65306
 2009-02-23 05:56:17 +00:00
Bill Wendling
3151437f5c Propagate debug loc info through prologue/epilogue. 
llvm-svn: 65298
 2009-02-23 00:42:30 +00:00
Scott Michel
3f8637305f Introduce the BuildVectorSDNode class that encapsulates the ISD::BUILD_VECTOR 
instruction. The class also consolidates the code for detecting constant
splats that's shared across PowerPC and the CellSPU backends (and might be
useful for other backends.) Also introduces SelectionDAG::getBUID_VECTOR() for
generating new BUILD_VECTOR nodes.

llvm-svn: 65296
 2009-02-22 23:36:09 +00:00
Dan Gohman
b105ab4e42 Revert the part of 64623 that attempted to align the source in a 
memcpy to match the alignment of the destination. It isn't necessary
for making loads and stores handled like the SSE loadu/storeu
intrinsics, and it was causing a performance regression in
MultiSource/Applications/JM/lencod.

The problem appears to have been a memcpy that copies from some
highly aligned array into an alloca; the alloca was then being
assigned a large alignment, which required codegen to perform
dynamic stack-pointer re-alignment, which forced the enclosing
function to have a frame pointer, which led to increased spilling.

llvm-svn: 65289
 2009-02-22 18:06:32 +00:00
Dan Gohman
a78fb41553 Properly parenthesize this expression, fixing a real bug in the new 
-full-lsr code, as well as a GCC warning.

llvm-svn: 65288
 2009-02-22 16:40:52 +00:00
Evan Cheng
41687ff389 If a use operand is marked isKill, don't forget to add kill to its live interval as well. 
llvm-svn: 65279
 2009-02-22 08:35:56 +00:00
Evan Cheng
3ea8bd42f3 Add a note. 
llvm-svn: 65275
 2009-02-22 08:13:45 +00:00
Evan Cheng
4385f393f7 Be bug compatible with gcc by returning MMX values in RAX. 
llvm-svn: 65274
 2009-02-22 08:05:12 +00:00
Evan Cheng
9d9688ec15 Do not consider MMX_MOVD64rr a move instructions. The source register is in GR32, the destination is VR64. They are not compatible. 
llvm-svn: 65273
 2009-02-22 08:04:23 +00:00
Evan Cheng
ba3f6fa814 Only try to sink immediate when TLI is not null. It needs to check if immediate would fit in target addressing field. 
llvm-svn: 65268
 2009-02-22 07:31:19 +00:00
Nick Lewycky
2c8f0fd57f Don't sign extend the char when expanding char -> int during 
load(bitcast(char[4] to i32*)) evaluation.

llvm-svn: 65246
 2009-02-21 20:50:42 +00:00
Richard Pennington
7a2ebd7d09 bug 3610: Floating point vaarg not softened. 
llvm-svn: 65239
 2009-02-21 19:11:18 +00:00
Anton Korobeynikov
5df82e3e25 Drop bunch of half-working stuff in the ext_weak linkage support. 
Now we're using one gross, but quite robust hack :) (previous ones
did not work, for example, when ext_weak symbol was used deep inside
constant expression in the initializer).

The proper fix of this problem will require some quite huge asmprinter
changes and that's why was postponed. This fixes PR3629 by the way :)

llvm-svn: 65230
 2009-02-21 11:53:32 +00:00
Evan Cheng
74d0dda00f Add AddrModeMatcher.cpp 
llvm-svn: 65228
 2009-02-21 07:05:11 +00:00
Evan Cheng
d4dc06f55a If two-address def is dead and the instruction does not define other registers, and it doesn't produce side effects, just delete the instruction. 
llvm-svn: 65218
 2009-02-21 03:14:25 +00:00
Evan Cheng
56b43045f6 Teach LSR sink to sink the immediate portion of the common expression back into uses if they fit in address modes of all the uses. 
llvm-svn: 65215
 2009-02-21 02:06:47 +00:00
Bill Wendling
bfc216c45a Make sure this doesn't access .end() too. 
llvm-svn: 65213
 2009-02-21 01:11:36 +00:00
Bill Wendling
96430050a5 Make sure we don't dereference the .end() of the container. 
llvm-svn: 65211
 2009-02-21 01:07:26 +00:00
Chris Lattner
3adae91c70 rename a function to indicate that it checks for profitability as well 
as legality.  Make load sinking and gep sinking more careful: we only
do it when it won't pessimize loads from the stack.  This has the added
benefit of not producing code that is unanalyzable to SROA.

llvm-svn: 65209
 2009-02-21 00:46:50 +00:00
Bill Wendling
66c3ffa2de Propagate more debug loc infos. This also includes some code cleaning. 
llvm-svn: 65207
 2009-02-21 00:43:56 +00:00
Bill Wendling
09289bc433 We need to propagate the debug location information even when dealing with the 
prologue/epilogue.

llvm-svn: 65206
 2009-02-21 00:32:08 +00:00
Dan Gohman
c9cfc596a3 Fix a bug that David Greene found in the DAGCombiner's logic 
that checks whether it's safe to transform a store of a bitcast
value into a store of the original value.

llvm-svn: 65201
 2009-02-20 23:29:13 +00:00
Evan Cheng
c2541a4450 Fix strange logic in CollectIVUsers used to determine whether all uses are 
addresses, part 1. This fixes an obvious logic bug. Previously if the only
in-loop use is a PHI, it would return AllUsesAreAddresses as true.

llvm-svn: 65178
 2009-02-20 22:16:49 +00:00
Dan Gohman
b8783d240b Simplify code and reduce indentation. No functionality change. 
llvm-svn: 65167
 2009-02-20 21:27:23 +00:00
Dan Gohman
4612c1d92f Fix 80-column violations. 
llvm-svn: 65159
 2009-02-20 21:06:57 +00:00
Dan Gohman
33c5714553 It's not necessary to check if Base is null here. 
llvm-svn: 65157
 2009-02-20 21:05:23 +00:00
Evan Cheng
c40c3e28f7 Support return of MMX values in 64-bit mode. 
llvm-svn: 65152
 2009-02-20 20:43:02 +00:00
Bill Wendling
9e675be841 - Early exit a nested block. 
- Correct comment.
- Whitespace changes.

llvm-svn: 65149
 2009-02-20 20:40:28 +00:00
Dan Gohman
271a6f1142 Add a comment about how Imm can be used for loop-variant values. 
llvm-svn: 65147
 2009-02-20 20:29:04 +00:00
Torok Edwin
b399b47942 add note about sin 
llvm-svn: 65137
 2009-02-20 18:42:06 +00:00
Evan Cheng
d8aad94754 Factor address mode matcher out of codegen prepare to make it available to other passes, e.g. loop strength reduction. 
llvm-svn: 65134
 2009-02-20 18:24:38 +00:00
Zhou Sheng
0c2e862ad0 Just roll back the previous change to -mem2reg. 
Will re-think about this according to Chris's comments.

llvm-svn: 65126
 2009-02-20 17:49:33 +00:00
Zhou Sheng
580c176f47 patch to update the line number information in pass -mem2reg. 
Currently this pass will delete the variable declaration info, 
and keep the line number info. But the kept line number info is not updated, 
and some is redundant or not correct, this patch just updates those info.

llvm-svn: 65123
 2009-02-20 16:31:35 +00:00
Owen Anderson
8d12de1c25 Fix a crash in the pre-alloc splitter exposed by recent codegen changes. 
llvm-svn: 65121
 2009-02-20 10:02:23 +00:00
Owen Anderson
9268f1ec92 Add a quick pass to the stack slot colorer to eliminate some trivially redundant spills after coloring. 
Ideally these would never get created in the first place, but until we enhance the spiller to have a more
global picture of what's happening, this is necessary for code quality in some circumstances.

llvm-svn: 65120
 2009-02-20 09:11:36 +00:00
Dan Gohman
4e8fc41d48 Implement "superhero" strength reduction, or full strength 
reduction of address calculations down to basic pointer arithmetic.
This is currently off by default, as it needs a few other features
before it becomes generally useful. And even when enabled, full
strength reduction is only performed when it doesn't increase
register pressure, and when several other conditions are true.

This also factors out a bunch of exisiting LSR code out of
StrengthReduceStridedIVUsers into separate functions, and tidies
up IV insertion. This actually decreases register pressure even
in non-superhero mode. The change in iv-users-in-other-loops.ll
is an example of this; there are two more adds because there are
two fewer leas, and there is less spilling.

llvm-svn: 65108
 2009-02-20 04:17:46 +00:00
Bill Wendling
75751a4769 Add an accessor method to DwarfWriter to tell of debugging info should be emitted. 
llvm-svn: 65092
 2009-02-20 00:44:43 +00:00
Bill Wendling
983f839148 Temporarily revert r65065. It was causing test failures. 
llvm-svn: 65068
 2009-02-19 21:57:07 +00:00