Chris Lattner
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e35741184e
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Alignment is now in bits.
llvm-svn: 15976
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2004-08-21 20:15:25 +00:00 |
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Chris Lattner
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e88b8e3471
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Make alignment be in bits, just like size is
llvm-svn: 15969
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2004-08-21 20:00:36 +00:00 |
|
Chris Lattner
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75ca702833
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Support "Methods" in register classes in CodgeGenRegisterClass
llvm-svn: 15965
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2004-08-21 19:21:21 +00:00 |
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Chris Lattner
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c33c1c8dca
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Start parsing register classes into a more structured form
llvm-svn: 15961
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2004-08-21 04:05:00 +00:00 |
|
Chris Lattner
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820f674293
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Read in declared reg sizes
llvm-svn: 15960
|
2004-08-21 02:24:57 +00:00 |
|
Chris Lattner
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892fc12546
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Use CodeGenRegister class to make reading in of register information more
systematic.
llvm-svn: 15805
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2004-08-16 01:10:21 +00:00 |
|
Chris Lattner
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d7240cdb18
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Make the AsmWriter a first-class tblgen object. Allow targets to specify
name of the generated asmwriter class, and the name of the format string.
llvm-svn: 15747
|
2004-08-14 22:50:53 +00:00 |
|
Chris Lattner
|
a88aec6972
|
Start parsing more information from the Operand information
llvm-svn: 15644
|
2004-08-11 02:22:39 +00:00 |
|
Chris Lattner
|
c8ac0bf803
|
Remove special case hacks
llvm-svn: 15643
|
2004-08-11 01:53:58 +00:00 |
|
Chris Lattner
|
350b76be29
|
Parse the operand list of the instruction. We currently support register and immediate operands.
llvm-svn: 15390
|
2004-08-01 07:42:39 +00:00 |
|
Chris Lattner
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a983ac4661
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Initial cut at an asm writer emitter. So far, this only handles emission of
instructions, and only instructions that take no operands at that!
llvm-svn: 15386
|
2004-08-01 05:59:33 +00:00 |
|
Chris Lattner
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09d6e317a8
|
Add, and start using, the CodeGenInstruction class. This class represents
an instance of the Instruction tablegen class.
llvm-svn: 15385
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2004-08-01 05:04:00 +00:00 |
|
Chris Lattner
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07525455a6
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Rename CodeGenWrappers.(cpp|h) -> CodeGenTarget.(cpp|h)
llvm-svn: 15382
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2004-08-01 04:04:35 +00:00 |
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