Anton Korobeynikov
|
4906b76843
|
Change register allocation order to reduce amount of callee-saved regs to be spilled.
llvm-svn: 75944
|
2009-07-16 13:51:34 +00:00 |
|
Anton Korobeynikov
|
b4a6f3c467
|
Emit callee-saved regs spills / restores
llvm-svn: 75943
|
2009-07-16 13:51:12 +00:00 |
|
Anton Korobeynikov
|
4fcadd1a7d
|
Some preliminary call lowering
llvm-svn: 75941
|
2009-07-16 13:50:21 +00:00 |
|
Anton Korobeynikov
|
f4257ba74e
|
Prologue / epilogue emission
llvm-svn: 75940
|
2009-07-16 13:49:49 +00:00 |
|
Anton Korobeynikov
|
dd60515f11
|
Add simple frame index elimination
llvm-svn: 75939
|
2009-07-16 13:49:25 +00:00 |
|
Anton Korobeynikov
|
6d15e5c657
|
Swap the order of imm and idx field for rri addrmode in order to make handling of rri and ri addrmodes common
llvm-svn: 75937
|
2009-07-16 13:48:42 +00:00 |
|
Anton Korobeynikov
|
c0374ea3e6
|
Do not truncate sign bits for negative imms
llvm-svn: 75936
|
2009-07-16 13:48:23 +00:00 |
|
Anton Korobeynikov
|
5e1fa67a23
|
Add address computation stuff
llvm-svn: 75935
|
2009-07-16 13:47:59 +00:00 |
|
Anton Korobeynikov
|
4409d9a464
|
Cleanup
llvm-svn: 75934
|
2009-07-16 13:47:36 +00:00 |
|
Anton Korobeynikov
|
47c086cc6b
|
Add mem-imm stores
llvm-svn: 75933
|
2009-07-16 13:47:14 +00:00 |
|
Anton Korobeynikov
|
370d19266f
|
[PATCH 023/155] Typo
llvm-svn: 75932
|
2009-07-16 13:45:22 +00:00 |
|
Anton Korobeynikov
|
b88da5c190
|
Add stores and truncstores
llvm-svn: 75931
|
2009-07-16 13:45:00 +00:00 |
|
Anton Korobeynikov
|
b262cec2d0
|
Add patterns for various extloads
llvm-svn: 75930
|
2009-07-16 13:44:30 +00:00 |
|
Anton Korobeynikov
|
58f9ca9055
|
Do some heroic rri address matching (shamelessly stolen from x86 backend). Not tested though.
llvm-svn: 75929
|
2009-07-16 13:44:00 +00:00 |
|
Anton Korobeynikov
|
ba9ee88377
|
Change register allocation order, so R0 will be allocated the last among scratch. This will make address-calculation code much more happy.
llvm-svn: 75928
|
2009-07-16 13:43:40 +00:00 |
|
Anton Korobeynikov
|
f080a4a0bd
|
Add shifts and reg-imm address matching
llvm-svn: 75927
|
2009-07-16 13:43:18 +00:00 |
|
Anton Korobeynikov
|
de69aad588
|
Add bunch of 32-bit patterns... Uffff :)
llvm-svn: 75926
|
2009-07-16 13:42:31 +00:00 |
|
Anton Korobeynikov
|
b902c71a90
|
Add 32 bit subregs
llvm-svn: 75923
|
2009-07-16 13:35:30 +00:00 |
|
Anton Korobeynikov
|
2f5b711ced
|
Add another bunch of reg-imm patterns for add/or/and/xor
llvm-svn: 75922
|
2009-07-16 13:35:08 +00:00 |
|
Anton Korobeynikov
|
f63382b52b
|
Add bunch of reg-imm movs
llvm-svn: 75921
|
2009-07-16 13:34:50 +00:00 |
|
Anton Korobeynikov
|
349c4f3410
|
Proper match halfword-imm operands for mov and add
llvm-svn: 75920
|
2009-07-16 13:34:24 +00:00 |
|
Anton Korobeynikov
|
dcc7d19ef3
|
Provide masked reg-imm 'or' and 'and'
llvm-svn: 75919
|
2009-07-16 13:33:57 +00:00 |
|
Anton Korobeynikov
|
c98835c743
|
Add reg-reg and pattern
llvm-svn: 75917
|
2009-07-16 13:32:49 +00:00 |
|
Anton Korobeynikov
|
2688d3c0a7
|
Add sub reg-reg pattern
llvm-svn: 75916
|
2009-07-16 13:32:16 +00:00 |
|
Anton Korobeynikov
|
2dd607fca7
|
Add xor reg-reg pattern
llvm-svn: 75915
|
2009-07-16 13:31:28 +00:00 |
|
Anton Korobeynikov
|
66b2612946
|
Add or reg-reg pattern.
llvm-svn: 75914
|
2009-07-16 13:30:53 +00:00 |
|
Anton Korobeynikov
|
ca9c5365ac
|
Add add reg-reg and reg-imm patterns
llvm-svn: 75913
|
2009-07-16 13:30:15 +00:00 |
|
Anton Korobeynikov
|
7b8aec2c40
|
Add simple reg-reg and reg-imm moves
llvm-svn: 75912
|
2009-07-16 13:29:38 +00:00 |
|
Anton Korobeynikov
|
7fe1d9c90e
|
Minimal lowering for formal_arguments / ret
llvm-svn: 75911
|
2009-07-16 13:28:59 +00:00 |
|
Anton Korobeynikov
|
8155f0cbaa
|
Let's start another backend :)
llvm-svn: 75909
|
2009-07-16 13:27:25 +00:00 |
|
Richard Osborne
|
ee0ad3d09b
|
Combine an unaligned store of unaligned load into a memmove.
llvm-svn: 75908
|
2009-07-16 12:50:48 +00:00 |
|
Richard Osborne
|
764d765724
|
Lower the threshold at which memcpy / memmove / memset stop being expanded
inline in the XCore.
llvm-svn: 75906
|
2009-07-16 12:41:34 +00:00 |
|
Richard Osborne
|
858b52a587
|
Fix typo in last commit on expansion of unaligned loads.
llvm-svn: 75903
|
2009-07-16 10:48:47 +00:00 |
|
Richard Osborne
|
0d65748f8f
|
Expand unaligned 32 bit loads from an address which is a constant
offset from a 32 bit aligned base as follows:
ldw low, base[offset >> 2]
ldw high, base[(offset >> 2) + 1]
shr low_shifted, low, (offset & 0x3) * 8
shl high_shifted, high, 32 - (offset & 0x3) * 8
or result, low_shifted, high_shifted
Expand 32 bit loads / stores with 16 bit alignment into two 16 bit
loads / stores.
llvm-svn: 75902
|
2009-07-16 10:42:35 +00:00 |
|
Richard Osborne
|
eb8036be44
|
Custom lower unaligned 32 bit stores and loads into libcalls. This is
a big code size win since before they were expanding to upto 16
instructions.
llvm-svn: 75901
|
2009-07-16 10:21:18 +00:00 |
|
Evan Cheng
|
7a6b20df7f
|
Let callers decide the sub-register index on the def operand of rematerialized instructions.
Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.
llvm-svn: 75900
|
2009-07-16 09:20:10 +00:00 |
|
Chris Lattner
|
e12dcd84ca
|
use SUBREG_TO_REG instead of INSERT_SUBREG, this way the code
generator can know the top bits are zero, not undefined.
Thanks to Dan for pointing this out.
llvm-svn: 75899
|
2009-07-16 06:31:37 +00:00 |
|
Chris Lattner
|
65f6bc8631
|
fix some casts that I improperly refactored, patch by Artur Pietrek!
llvm-svn: 75894
|
2009-07-16 04:34:33 +00:00 |
|
Daniel Dunbar
|
90536f6737
|
Kill off <TARGET>MachineModule variables, and <TARGETASMPRINTER>ForceLink
variables.
- Module initialization functions supplanted the need for these.
llvm-svn: 75886
|
2009-07-16 01:55:13 +00:00 |
|
Chris Lattner
|
e102784018
|
fix section switching to ensure that stubs are emitted to the right
section on ppc.
llvm-svn: 75881
|
2009-07-16 01:23:26 +00:00 |
|
Daniel Dunbar
|
4771afe104
|
Lift addAssemblyEmitter into LLVMTargetMachine.
- No functionality change.
llvm-svn: 75859
|
2009-07-15 23:34:19 +00:00 |
|
Daniel Dunbar
|
efb868a754
|
Register AsmPrinter for XCore, MSP430, and PIC16 targets.
- Switch to standard addAssemblyEmitter logic.
llvm-svn: 75854
|
2009-07-15 23:17:20 +00:00 |
|
Daniel Dunbar
|
d85e8b6334
|
Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.
- No intended functionality change.
llvm-svn: 75848
|
2009-07-15 22:33:19 +00:00 |
|
Daniel Dunbar
|
3cff9fe21d
|
Remove old style hacks to register AsmPrinter into TargetMachine.
- No intended functionality change.
llvm-svn: 75843
|
2009-07-15 22:01:32 +00:00 |
|
Owen Anderson
|
13080d27c5
|
Move a few more convenience factory functions from Constant to LLVMContext.
llvm-svn: 75840
|
2009-07-15 21:51:10 +00:00 |
|
Chris Lattner
|
52395de322
|
move createAlphaLLRPPass out of addAssemblyEmitter to make Alpha
more like other targets.
llvm-svn: 75839
|
2009-07-15 21:40:24 +00:00 |
|
Ted Kremenek
|
1ebb7e72fa
|
Lexically order files in CMakeLists.txt files.
llvm-svn: 75831
|
2009-07-15 21:08:16 +00:00 |
|
Daniel Dunbar
|
07f75f2e42
|
Remove unused function.
llvm-svn: 75829
|
2009-07-15 20:59:20 +00:00 |
|
Bruno Cardoso Lopes
|
7bdb20f6a2
|
use std::vector instead of std::list for both Section and Symbol lists because
we care more about random access than insertion/deletion of elements.
llvm-svn: 75828
|
2009-07-15 20:49:10 +00:00 |
|
Daniel Dunbar
|
7d22e66153
|
Update CMakeLists for reapplication.
llvm-svn: 75825
|
2009-07-15 20:34:36 +00:00 |
|