Commit Graph

138478 Commits

Author SHA1 Message Date
Arnold Schwaighofer
f027af8c85 Disable tail calls if there is an swifterror argument
ISel does not handle them correctly yet i.e we crash trying to emit tail call
code.

radar://28407842

llvm-svn: 282088
2016-09-21 16:53:36 +00:00
Matthew Simpson
90550420f2 [LV] Don't emit unused scalars for uniform instructions
If we identify an instruction as uniform after vectorization, we know that we
should only use the value corresponding to the first vector lane of each unroll
iteration. However, when scalarizing such instructions, we still produce values
for the other vector lanes. This patch prevents us from generating the unused
scalars.

Differential Revision: https://reviews.llvm.org/D24275

llvm-svn: 282087
2016-09-21 16:50:24 +00:00
Artem Tamazov
1aa913cd20 [AMDGPU][mc] Add support for ds_add_[rtn_]f32.
Lit tests added.
Resolves https://github.com/RadeonOpenCompute/hcc/issues/122.

Differential Revision: https://reviews.llvm.org/D24765

llvm-svn: 282086
2016-09-21 16:35:44 +00:00
Dehao Chen
054ed42bc2 Change the basic block weight calculation algorithm to use max instead of voting.
Summary: Now that we have more precise debug info, we should change back to use maximum to get basic block weight.

Reviewers: dnovillo

Subscribers: andreadb, llvm-commits

Differential Revision: https://reviews.llvm.org/D24788

llvm-svn: 282084
2016-09-21 16:26:51 +00:00
Matthew Simpson
cf186bdb44 [LV] Rename "Width" to "Lane" (NFC)
llvm-svn: 282083
2016-09-21 16:09:23 +00:00
Cameron McInally
f21a9082e2 [AVX512] Fix return types on int_x86_avx512_gatherXXX_di intrinsics
The return type should match the pass through vector type.

Differential Revision: https://reviews.llvm.org/D24744

llvm-svn: 282081
2016-09-21 16:06:10 +00:00
Hans Wennborg
0092ffdf91 Revert r281895 "Add @llvm.dbg.value entries for the phi node created by -mem2reg"
(And follow-up r281964.)

It caused PR30468.

llvm-svn: 282077
2016-09-21 15:55:53 +00:00
Nico Weber
e87f9a86c2 Revert r281715, it caused PR30475
llvm-svn: 282076
2016-09-21 15:33:24 +00:00
Arnold Schwaighofer
0f29bae334 DeadArgElim: Don't mark swifterror arguments as unused
Replacing swifterror arguments with undef creates invalid IR.

rdar://28300490

llvm-svn: 282075
2016-09-21 15:29:08 +00:00
Chad Rosier
c75a5ac4c9 [LoopInterchange] Various cleanup. NFC.
llvm-svn: 282071
2016-09-21 13:28:41 +00:00
Tim Northover
588e105a97 GlobalISel: produce correct code for signext/zeroext ABI flags.
We still don't really have an equivalent of "AssertXExt" in DAG, so we don't
exploit the guarantees on the receiving side yet, but this should produce
conservatively correct code on iOS ABIs.

llvm-svn: 282069
2016-09-21 12:57:45 +00:00
Tim Northover
6af161c8b2 GlobalISel: pass Function to lowerFormalArguments directly (NFC).
The only implementation that exists immediately looks it up anyway, and the
information is needed to handle various parameter attributes (stored on the
function itself).

llvm-svn: 282068
2016-09-21 12:57:35 +00:00
Sam Kolton
911939a43c [AMDGPU] Assembler: remove unused AMDGPUMCObjectWriter.
Summary: It is replaced by AMDGPUELFObjectWriter

Reviewers: tstellarAMD, vpykhtin, artem.tamazov

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl

Differential Revision: https://reviews.llvm.org/D24654

llvm-svn: 282065
2016-09-21 10:33:32 +00:00
Simon Dardis
55f9daf6b9 [mips] LLVM PR/30197 - Tail call incorrectly clobbers arguments for mips
The postRA scheduler performs alias analysis to determine if stores and loads
can moved past each other. When a function has more arguments than argument
registers for the calling convention used, excess arguments are spilled onto the
stack. LLVM by default assumes that argument slots are immutable, unless the
function contains a tail call. Without the knowledge of that a function contains
a tail call site, stores and loads to fixed stack slots may be re-ordered
causing the out-going arguments to clobber the incoming arguments before the
incoming arguments are supposed to be dead.

Reviewers: vkalintiris

Differential Review: https://reviews.llvm.org/D24077

llvm-svn: 282063
2016-09-21 09:43:40 +00:00
Diana Picus
5feb684c69 Revert "AArch64: Set shift bit of TLSLE HI12 add instruction"
This reverts commit r282057 because it broke the buildbots - see e.g.
http://lab.llvm.org:8011/builders/clang-cmake-aarch64-42vma/builds/12063

llvm-svn: 282058
2016-09-21 08:24:41 +00:00
Lei Liu
d6e7064c9c AArch64: Set shift bit of TLSLE HI12 add instruction
Summary: AArch64 LLVM assembler emits add instruction without shift bit to calculate the higher 12-bit address of TLS variables in local exec model.  This generates wrong code sequence to access TLS variables with thread offset larger than 0x1000.

Reviewers: t.p.northover, peter.smith, rovka

Subscribers: salim.nasser, aemerson, llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D24702

llvm-svn: 282057
2016-09-21 07:41:41 +00:00
Craig Topper
4e1c2ac20e [AVX-512] Split the 3 different usages of the X86ISD::FSETCC opcode into 3 different opcodes.
It turns out isel is really not robust against having different type profiles for the same opcode. It turns out that if you put an illegal rounding mode(i.e. not CUR_DIRECTION or NO_EXC) on a comiss intrinsic we would generate the FSETCC form with the rounding mode added, but then pattern match to an instruction with ROUND_CUR_DIRECTION.

We can probably get away with just one FSETCCM opcode that always contains the rounding mode and explicitly put ROUND_CUR_DIRECTION in the pattern, but I'll leave that for future work.

With this change the clang tests for the comiss intrinsics that used an incorrect rounding mode of 3 properly fail isel instead of silently doing the wrong thing. Those clang tests will be fixed in a follow up commit and I also plan to add rounding mode checking to clang.

llvm-svn: 282055
2016-09-21 06:37:54 +00:00
NAKAMURA Takumi
675f769e36 llvm/test/CodeGen/NVPTX/zero-cs.ll: Relax an expression to match in -Asserts.
LLVM ERROR: Cannot select: 0x3607bf0: i32 = ExternalSymbol'__powidf2'

llvm-svn: 282053
2016-09-21 04:43:11 +00:00
Craig Topper
e611d84dea [AVX-512] Don't add an additional rounding mode operand to the avx512 vcvtps2ph intrinsic lowering.
There was no way to control its value so it was always FROUND_CURRENT making it unnecessary. The true rounding mode is encoded in the immediate operand of the instruction.

This also removes the pattern from the rb form of the instructions since there is no way to specify the FROUND_NO_EXC rounding mode it required.

llvm-svn: 282052
2016-09-21 03:58:44 +00:00
Craig Topper
241989dad6 [AVX-512] Simplify handling of INTR_TYPE_1OP_MASK_RM to remove support for the second opcode since its never used. This makes it consistent with INTR_TYPE_2OP_MASK_RM and INTR_TYPE_3OP_MASK_RM.
And even if it was used we were passing the same operands to both so it wouldn't make sense to have two opcodes.

llvm-svn: 282051
2016-09-21 03:58:41 +00:00
Kostya Serebryany
84e4abcb2c [libFuzzer] fix libc++ build
llvm-svn: 282050
2016-09-21 03:50:37 +00:00
Adam Nemet
f1965e4c24 [LV] When reporting about a specific instruction without debug location use loop's
This can occur for example if some optimization drops the debug location.

llvm-svn: 282048
2016-09-21 03:14:20 +00:00
Kostya Serebryany
4a57719450 [libFuzzer] more refactoring; NFC
llvm-svn: 282047
2016-09-21 02:05:39 +00:00
Craig Topper
9e4f5327ec [AVX-512] Don't lower avx512 vcvtps2ph/vcvtph2ps nodes to ISD::FP16_TO_FP/ISD::FP_TO_FP16 with an extra x86 specific rounding mode operand. We should use a target specific ISD opcode.
llvm-svn: 282046
2016-09-21 02:05:22 +00:00
Jacques Pienaar
92806722a6 [NVPTX] Check if callsite is defined when computing argument allignment
Summary: In getArgumentAlignment check if the ImmutableCallSite pointer CS is non-null before dereferencing. If CS is 0x0 fall back to the ABI type alignment else compute the alignment as before.

Reviewers: eliben, jpienaar

Subscribers: jlebar, vchuravy, cfe-commits, jholewinski

Differential Revision: https://reviews.llvm.org/D9168

llvm-svn: 282045
2016-09-21 01:57:57 +00:00
Kostya Serebryany
89cc7aa29b [libFuzzer] refactoring: split the large header into many; NFC
llvm-svn: 282044
2016-09-21 01:50:50 +00:00
Kostya Serebryany
5e6a145744 [libFuzzer] refactoring: move the Corpus into a separate class; delete two unused experimental features
llvm-svn: 282042
2016-09-21 01:04:43 +00:00
Justin Bogner
a393b70886 Revert "TableGen: Switch from a std::map to a DenseMap in CodeGenSubRegIndex. NFC"
It turns out we iterate over this map a fair amount and the order
matters for clang to be deterministic. See:

  http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160919/391315.html

This reverts r279875.

llvm-svn: 282040
2016-09-21 00:25:45 +00:00
Michael Kuperstein
54c54e0c3e [InferAttributes] Don't access parameters that don't exist.
Check for the correct number of parameters before querying their type.
This fixes PR30455.

llvm-svn: 282038
2016-09-20 23:10:31 +00:00
Teresa Johnson
0f1566e03c [ThinLTO] Always emit a summary when compiling in ThinLTO mode
Summary:
Emit an empty summary section, instead of no summary section, when
there are no global variables in the index. This ensures that LTO
will treat these files as ThinLTO inputs, instead of as regular
LTO inputs.

In addition to not being what the user likely intended when
compiling with -flto=thin, the current behavior is problematic for
distributed build systems that expect to get ThinLTO index and imports
files back for each input compiled with -flto=thin. Combining into
a single regular LTO module also reduces the backend parallelism.
And in the case where the index was suppressed due to uses in
inline assembly, combining into a single LTO module could provoke
renaming of duplicates that we were trying to prevent by suppressing
the index.

This change required a couple of fixes to handle the empty summary
section.

Reviewers: mehdi_amini

Subscribers: mehdi_amini, llvm-commits, pcc

Differential Revision: https://reviews.llvm.org/D24779

llvm-svn: 282037
2016-09-20 23:07:17 +00:00
Xinliang David Li
6f5cb0b776 code cleanup -- commoning IR travsersals
llvm-svn: 282034
2016-09-20 22:39:47 +00:00
Eric Christopher
0310283aeb Remove the default subtarget from the x86 port as it isn't necessary (or
correct) anymore.

llvm-svn: 282031
2016-09-20 22:19:33 +00:00
Eric Christopher
94d50bf6e6 Revert "Remove extra argument used once on
TargetMachine::getNameWithPrefix and inline the result into the singular
caller." and "Remove more guts of TargetMachine::getNameWithPrefix and
migrate one check to the TLOF mach-o version." temporarily until I can
get the whole call migrated out of the TargetMachine as we could hit
places where TLOF isn't valid.

This reverts commits r281981 and r281983.

llvm-svn: 282028
2016-09-20 22:03:28 +00:00
Anna Thomas
70699ac5a1 [RS4GC] Refactor code for Rematerializing in presence of phi. NFC
Summary:
This is an NFC refactoring change as a precursor to the actual fix for rematerializing in
presence of phi.
https://reviews.llvm.org/D24399

Pasted from review:
findRematerializableChainToBasePointer changed to return the root of the
chain. instead of true or false.
move the PHI matching logic into the caller by inspecting the root return value.
This includes an assertion that the alternate root is in the liveset for the
call.

Tested with current RS4GC tests.

Reviewers: reames, sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D24780

llvm-svn: 282023
2016-09-20 21:36:02 +00:00
George Burgess IV
cc9663fed9 [CodeGen] stop short-circuiting the SSP code for sspstrong.
This check caused us to skip adding layout information for calls to
alloca in sspreq/sspstrong mode. We check properly for sspstrong later
on (and add the correct layout info when doing so), so removing this
shouldn't hurt.

No test is included, since testing this using lit seems to require
checking for exact offsets in asm, which is something that the lit tests
for this avoid. If someone cares deeply, I'm happy to write a unittest
or something to cover this, but that feels like overkill.

Patch by Daniel Micay.

Differential Revision: https://reviews.llvm.org/D22714

llvm-svn: 282022
2016-09-20 21:30:01 +00:00
Vedant Kumar
b047bd03ea [llvm-cov] Demangle names for hidden instantiation views
llvm-svn: 282020
2016-09-20 21:27:48 +00:00
Xinliang David Li
71316d5b37 [Profile] dump ic value profile value/site-count histogram
Differential Revision: http://reviews.google.com/D24783

llvm-svn: 282017
2016-09-20 21:04:22 +00:00
Petr Hosek
658d5cf8a0 Mark ELF sections whose name start with .note as note
Previously, such section would be marked as SHT_PROGBITS which
makes it impossible to use an initialized C variable declaration
to emit an (allocated) ELF note. The new behavior is also consistent
with ELF assembly parser.

Differential Revision: https://reviews.llvm.org/D24692

llvm-svn: 282010
2016-09-20 20:21:13 +00:00
Xinliang David Li
c3764cfede [Profile] Do not annotate select insts not covered in profile.
Fixed PR/30466

llvm-svn: 282009
2016-09-20 20:20:01 +00:00
Kevin Enderby
54d275f77b Next set of additional error checks for invalid Mach-O files for bad load commands
that use the Mach::dylib_command type for the load commands that are
currently used in the MachOObjectFile constructor.

This contains the missing checks for LC_ID_DYLIB, LC_ID_DYLIB, etc.
load commands and the fields for the Mach::dylib_command type.

Also checks that only an MH_DYLIB or MH_STUB_DYLIB has an
LC_ID_DYLIB load command (and others filetype don’t) and there
is not more than one of these load commands.

llvm-svn: 282008
2016-09-20 20:14:14 +00:00
Sanjay Patel
d54b3459fa [x86] split up tests, regenerate checks
Note that we fail to eliminate 'or' with 0!

llvm-svn: 282005
2016-09-20 19:31:30 +00:00
Xinliang David Li
7c7f35dd63 [Profile] code refactoring: make getStep a method in base class
llvm-svn: 282002
2016-09-20 19:07:22 +00:00
Evandro Menezes
ac70555f2f Revert part of "AArch64: Do not test for CPUs, use SubtargetFeatures"
This reverts part of commit 119e358d9635c8d1f3e7aee67e3ea3b8a62f8db6 by
removing FeatureUseRSqrt et al per request by Eric Christopher
<echristo@gmail.com> (v. http://bit.ly/2cmz6kW).

llvm-svn: 282001
2016-09-20 19:02:09 +00:00
Evandro Menezes
1c47b35a01 Revert "[AArch64] Use the reciprocal estimation machinery"
This reverts commit b7d42b0048f65346e9fa37fb65defeea7ce8c337 per request by
Eric Christopher <echristo@gmail.com> (v. http://bit.ly/2cmz6kW).

llvm-svn: 282000
2016-09-20 19:02:06 +00:00
Evandro Menezes
27cb59936a Revert "[AArch64] Properly validate the reciprocal estimation."
This reverts commit ad8ca1528242e2a4cb363e3779309e70eb7a430e per request by
Eric Christopher <echristo@gmail.com> (v. http://bit.ly/2cmz6kW).

llvm-svn: 281999
2016-09-20 19:02:02 +00:00
Adrian Prantl
a598972487 ASAN: Don't drop debug info attachements for global variables.
This is a follow-up to r281284. Global Variables now can have
!dbg attachements, so ASAN should clone these when generating a
sanitized copy of a global variable.

<rdar://problem/24899262>

llvm-svn: 281994
2016-09-20 18:28:42 +00:00
Adrian McCarthy
a5725feb3c Fix syntactical nit from r281990.
llvm-svn: 281991
2016-09-20 17:42:13 +00:00
Adrian McCarthy
cf55942049 Emit S_COMPILE3 CodeView record
CodeView has an S_COMPILE3 record to identify the compiler and source language of the compiland.  This record comes first in the debug$S section for the compiland. The debuggers rely on this record to know the source language of the code.

There was a little test fallout from introducing a new record into the symbols subsection.

Differential Revision: https://reviews.llvm.org/D24317

llvm-svn: 281990
2016-09-20 17:20:51 +00:00
Saleem Abdulrasool
f0f8609e1a X86: loosen an overly aggressive MachO assertion
We would assert that the FP setup CFI used esp/rsp always.  This held up in
practice when the code was generated from IR.  However, with the integrated
assembler, it is possible to have the input be user specified assembly.  In such
a case, we cannot assume that the function implementation has a compact unwind
representation.  Loosen the assertion into a check and bail if we cannot
represent the frame pointer in the compact unwinding.

Addresses PR30453!

llvm-svn: 281986
2016-09-20 17:05:04 +00:00
Eric Christopher
68d7d407a3 Remove more guts of TargetMachine::getNameWithPrefix and migrate one check to the TLOF mach-o version.
NFC intended.

llvm-svn: 281983
2016-09-20 16:05:02 +00:00