3809 Commits

Author SHA1 Message Date
Benjamin Kramer
14d729cf6a Emit the intrinsic modref info as a lookup table instead of a huge switch.
Shrinks BasicAliasAnalysis.o from 106k to 56k on i386.

llvm-svn: 151781
2012-03-01 01:18:32 +00:00
Benjamin Kramer
16bdd01e87 Implement getSubRegIndex as a linear search on the SubRegTable instead of using a big switch.
- The search bounds are constant, in the worst case (ARM target) it will scan over 30 uint16_ts.
- This method isn't very hot, I had problems finding a testcase where it's called more than a dozen of times (no perf impact).

llvm-svn: 151773
2012-02-29 23:46:50 +00:00
Jim Grosbach
2c1ad70f1e Tidy up. 80 columns.
llvm-svn: 151764
2012-02-29 22:07:56 +00:00
Benjamin Kramer
e4ab085322 Emit the SubRegTable with the smallest possible integer type.
Doesn't help ARM with its massive register set, but halves the size on x86 and all other targets.

llvm-svn: 151760
2012-02-29 21:57:08 +00:00
Jim Grosbach
ccc97aa21e Tidy up. Spelling.
llvm-svn: 151758
2012-02-29 21:46:32 +00:00
Jim Grosbach
f0509324e0 Move the subregister indicies enum into the REGINFO_ENUM section.
llvm-svn: 151756
2012-02-29 21:43:16 +00:00
Jim Grosbach
1105208aec Switch TargetRegisterInfo::getSubReg() to use a lookup table.
Instead of nested switch statements, use a lookup table. On ARM, this replaces
a 23k (x86_64 release build) function with a 16k table. Its not unlikely to
be faster, as well.

llvm-svn: 151751
2012-02-29 20:31:17 +00:00
Craig Topper
f86322b091 Convert generated intrinsic attributes to use an array lookup as Chris suggested in PR11951.
llvm-svn: 151622
2012-02-28 06:32:00 +00:00
Craig Topper
ae4e236c50 Update tblgen command guide. Remove unused tblgen InstrEnumEmitter files.
llvm-svn: 151513
2012-02-27 02:31:09 +00:00
Craig Topper
ab46706aa9 X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by Kay Tiong Khoo.
llvm-svn: 151510
2012-02-27 01:54:29 +00:00
Craig Topper
b1b20ead88 Remove 'if' from getSuperRegisters, getSubRegisters, and getOverlaps that were added in r151038.
llvm-svn: 151246
2012-02-23 08:42:06 +00:00
Bill Wendling
92bf9ddcc7 Remove bad comma from .el file.
llvm-svn: 151189
2012-02-22 19:38:03 +00:00
David Greene
7cabd2e787 Add Foreach Loop
Add some data structures to represent for loops.  These will be
referenced during object processing to do any needed iteration and
instantiation.

Add foreach keyword support to the lexer.

Add a mode to indicate that we're parsing a foreach loop.  This allows
the value parser to early-out when processing the foreach value list.

Add a routine to parse foreach iteration declarations.  This is
separate from ParseDeclaration because the type of the named value
(the iterator) doesn't match the type of the initializer value (the
value list).  It also needs to add two values to the foreach record:
the iterator and the value list.

Add parsing support for foreach.

Add the code to process foreach loops and create defs based
on iterator values.

Allow foreach loops to be matched at the top level.

When parsing an IDValue check if it is a foreach loop iterator for one
of the active loops.  If so, return a VarInit for it.

Add Emacs keyword support for foreach.

Add VIM keyword support for foreach.

Add tests to check foreach operation.

Add TableGen documentation for foreach.

Support foreach with multiple objects.

Support non-braced foreach body with one object.

Do not require types for the foreach declaration.  Assume the iterator
type from the iteration list element type.

llvm-svn: 151164
2012-02-22 16:09:41 +00:00
Craig Topper
d8faffd93b Declare register classes as const. Fix a couple pointers to register classes that weren't already const.
llvm-svn: 151138
2012-02-22 07:28:11 +00:00
Craig Topper
3ed929de0a Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified.
llvm-svn: 151134
2012-02-22 05:59:10 +00:00
Craig Topper
f1056941f6 Reorder some members in MCRegisterClass to remove padding on 64-bit builds.
llvm-svn: 151043
2012-02-21 07:36:39 +00:00
Craig Topper
24cc28c7b8 In generated RegisterInfo files, replace a pointer to the end of an array with just the size of the array to avoid relocations.
llvm-svn: 151041
2012-02-21 06:54:41 +00:00
Craig Topper
91a96474a1 Merge some tables in generated RegisterInfo file. Store indices into larger table instead of pointers to reduce relocations and shrink table size on 64-bit builds. Shaves ~24K off X86MCTargetDesc.o. Accidentally commited only part of this in r151038.
llvm-svn: 151039
2012-02-21 06:23:21 +00:00
Ahmed Charles
745c53c2a7 Remove dead code. Improve llvm_unreachable text. Simplify some control flow.
llvm-svn: 150918
2012-02-19 11:37:01 +00:00
Craig Topper
cfbfa3dcd1 Add vmfunc instruction to X86 assembler and disassembler.
llvm-svn: 150899
2012-02-19 01:39:49 +00:00
Craig Topper
ecf21d8132 Add X86 assembler and disassembler support for AMD SVM instructions. Original patch by Kay Tiong Khoo. Few tweaks by me for code density and to reduce replication.
llvm-svn: 150873
2012-02-18 08:19:49 +00:00
Daniel Dunbar
81ccdef572 utils: Kill NewNightlyTest.pl, which has been replaced by LNT (as far as I know).
llvm-svn: 150610
2012-02-15 19:24:11 +00:00
Benjamin Kramer
44e872829d Make the EDis tables const.
llvm-svn: 150304
2012-02-11 14:51:07 +00:00
Benjamin Kramer
675a84a6ea Reuse the enum names from X86Desc in the X86Disassembler.
This requires some gymnastics to make it available for C code. Remove the names
from the disassembler tables, making them relocation free.

llvm-svn: 150303
2012-02-11 14:50:54 +00:00
Benjamin Kramer
ba4dff0d18 Put instruction names into an indexed string table on the side, removing a pointer from MCInstrDesc.
Make them accessible through MCInstrInfo. They are only used for debugging purposes so this doesn't
have an impact on performance. X86MCTargetDesc.o goes from 630K to 461K on x86_64.

llvm-svn: 150245
2012-02-10 13:18:44 +00:00
Benjamin Kramer
260bef228a Store just the SimpleValueType in the generated VT tables for each register class, eliminating static ctors.
llvm-svn: 150173
2012-02-09 12:35:37 +00:00
Benjamin Kramer
005987fe7a Move the Name field in MCInstrDesc to the end, saving 8 bytes of padding per entry on x86_64.
No change on i386.

llvm-svn: 150170
2012-02-09 11:25:09 +00:00
James Molloy
85be8f7f88 Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage.
llvm-svn: 150169
2012-02-09 10:56:31 +00:00
Craig Topper
c20605c287 More tweaks to get the size of the X86 disassembler tables down.
llvm-svn: 150167
2012-02-09 08:58:07 +00:00
Craig Topper
82b0ee4558 Flatten some of the arrays in the X86 disassembler tables to reduce space needed to store pointers on 64-bit hosts and reduce relocations needed at startup. Part of PR11953.
llvm-svn: 150161
2012-02-09 07:45:30 +00:00
Benjamin Kramer
38ab261390 Don't map registers to the invalid dwarf register (-1). It's the default value.
X86GenRegisterInfo.inc | 1032 -------------------------------------------------
  1 file changed, 1032 deletions(-)

llvm-svn: 150080
2012-02-08 18:46:26 +00:00
Benjamin Kramer
b42d2a7238 Value initialize MCRegisterClasses. Not sure how could miss this during the MCTargetDesc refactor.
llvm-svn: 150076
2012-02-08 14:43:53 +00:00
Andrew Trick
3e1478c558 This is a small patch with a couple of improvements for running lit with --debug:
1. Added a status note when a config file is loaded directly with load_config. This helps notice loads of lit.cfg from lit.site.cfg
2. Added a status note on the result of a config load. Previously, it was just notifying that it tries to load a config file. Now it will also say whether the load succeeded or the file wasn't found

The two changes give better visibility into which config files were actually loaded by lit. The effect is only on --debug runs.

Patch by Eli Bendersky!

llvm-svn: 149932
2012-02-06 23:34:52 +00:00
Craig Topper
dfa8617ab9 Convert assert(0) to llvm_unreachable
llvm-svn: 149814
2012-02-05 07:21:30 +00:00
Brendon Cahoon
6db000fe17 Increment DFAStateEntryTable index for sentinel entry.
When adding the {-1, -1} entry to the DFAStateInputTable, we
need to increment the index used to populate the DFAStateEntryTable.
Otherwise, the entry table will be off by one for each transition
after the {-1, -1} entry. PR11908.

llvm-svn: 149713
2012-02-03 21:08:25 +00:00
Rafael Espindola
3440cd1895 Replace the old --with-cxx-* configure options with a single --with-gcc-toolchain
that just uses the new toolchain probing logic. This fixes linking with -m32 on
64 bit systems (the /32 dir was not being added to the search).

llvm-svn: 149651
2012-02-03 00:59:30 +00:00
Jakob Stoklund Olesen
230a0a4b40 Specify SubRegIndex components on the index itself.
It is simpler to define a composite index directly:

  def ssub_2 : SubRegIndex<[dsub_1, ssub_0]>;
  def ssub_3 : SubRegIndex<[dsub_1, ssub_1]>;

Than specifying the composite indices on each register:

  CompositeIndices = [(ssub_2 dsub_1, ssub_0),
                      (ssub_3 dsub_1, ssub_1)] in ...

This also makes it clear that SubRegIndex composition is supposed to be
unique.

llvm-svn: 149556
2012-02-01 23:16:41 +00:00
Jakob Stoklund Olesen
b1190d3876 Fix a bug in the TopoOrderRC comparison function.
The final tie breaker comparison also needs to return +/-1, or 0.
This is not a less() function.

This could cause otherwise identical super-classes to be ordered
unstably, depending on what the system qsort routine does with a bad
compare function.

llvm-svn: 149549
2012-02-01 22:19:26 +00:00
Jakob Stoklund Olesen
758a27584a Avoid emitting empty arrays, they're not standard C++.
It's only by luck that we haven't produced any yet, and clang refuses to
compile them.

llvm-svn: 149546
2012-02-01 22:12:51 +00:00
Jakob Stoklund Olesen
22b91563a5 Don't assign a value to NUM_TARGET_NAMED_SUBREGS.
It was wrong and completely unused.

llvm-svn: 149433
2012-01-31 21:51:53 +00:00
Jakob Stoklund Olesen
6ce052d3b3 Move the composite map into CodeGenSubRegIndex.
Each SubRegIndex keeps track of how it composes.

llvm-svn: 149423
2012-01-31 21:44:11 +00:00
Jakob Stoklund Olesen
6ec7412170 Add a TableGen CodeGenSubRegIndex class.
This class is used to represent SubRegIndex instances instead of the raw
Record pointers that were used before.

No functional change intended.

llvm-svn: 149418
2012-01-31 20:57:55 +00:00
David Greene
de918de31c Remove Deprecated Features
Move to a model where we build whatever branches are checked out
in the source directories.  This was a bit too smart (and complicated)
in handling details best left to the user and the revision control
system.

In addition, get rid of support for llvm-gcc and building gcc as
these are no longer necessary.

llvm-svn: 149149
2012-01-27 23:01:35 +00:00
Eric Christopher
d7893ec4b6 Use -H on darwin as well.
Patch by Liang Wang!

llvm-svn: 149085
2012-01-26 22:06:23 +00:00
Jim Grosbach
8ed72f3cc0 Tidy up. Trailing whitespace.
llvm-svn: 148856
2012-01-24 21:06:59 +00:00
Owen Anderson
7492e4ff85 Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand.
llvm-svn: 148833
2012-01-24 18:37:29 +00:00
Jakob Stoklund Olesen
3ff9738293 Add an (interleave A, B, ...) SetTheory operator.
This will interleave the elements from two or more lists.

llvm-svn: 148824
2012-01-24 18:06:05 +00:00
David Blaikie
05fe2f515d Help GCC along with code that's actually unreachable.
Unfortunately I don't think there's a fix for this that will work upstream and
also satisfy Clang's -Wunreachable-code, which is a pity. But I'll give it some
more thought -perhaps there's some way out.

llvm-svn: 148645
2012-01-22 01:17:04 +00:00
David Blaikie
93fafabfea Remove unreachable defaults from gtest.
This will ensure LLVM and Clang build -Wswitch-enum-redundant-default (an on-by-default warning I'm about to add to Clang).

llvm-svn: 148639
2012-01-21 18:02:01 +00:00
Kostya Serebryany
b37a1263e1 Extend Attributes to 64 bits
Problem: LLVM needs more function attributes than currently available (32 bits).
One such proposed attribute is "address_safety", which shows that a function is being checked for address safety (by AddressSanitizer, SAFECode, etc).

Solution:
- extend the Attributes from 32 bits to 64-bits
- wrap the object into a class so that unsigned is never erroneously used instead
- change "unsigned" to "Attributes" throughout the code, including one place in clang.
- the class has no "operator uint64 ()", but it has "uint64_t Raw() " to support packing/unpacking.
- the class has "safe operator bool()" to support the common idiom:  if (Attributes attr = getAttrs()) useAttrs(attr);
- The CTOR from uint64_t is marked explicit, so I had to add a few explicit CTOR calls
- Add the new attribute "address_safety". Doing it in the same commit to check that attributes beyond first 32 bits actually work.
- Some of the functions from the Attribute namespace are worth moving inside the class, but I'd prefer to have it as a separate commit.

Tested:
"make check" on Linux (32-bit and 64-bit) and Mac (10.6)
built/run spec CPU 2006 on Linux with clang -O2.


This change will break clang build in lib/CodeGen/CGCall.cpp.
The following patch will fix it.

llvm-svn: 148553
2012-01-20 17:56:17 +00:00