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5 Commits

Author SHA1 Message Date
James Molloy
70a6f5ebc7 Ensure conditional BL instructions for ARM are given the fixup fixup_arm_condbranch. 
Patch by Tim Northover!

llvm-svn: 153737
 2012-03-30 09:15:32 +00:00
Jim Grosbach
02bf78f5ca ARM BL/BLX instruction fixups should use relocations. 
We on the linker to resolve calls to the appropriate BL/BLX instruction
to make interworking function correctly. It uses the symbol in the
relocation to do that, so we need to be careful about being too clever.

To enable this for ARM mode, split the BL/BLX fixup kind off from the
unconditional-branch fixups.

rdar://10927209

llvm-svn: 151571
 2012-02-27 21:36:23 +00:00
Jia Liu
f3960e4994 comment fix 
llvm-svn: 151339
 2012-02-24 02:15:21 +00:00
Jim Grosbach
343f270350 ARM assembly parsing and encoding support for LDRD(label). 
rdar://9932658

llvm-svn: 146921
 2011-12-19 23:06:24 +00:00
Evan Cheng
41aa34c417 Sink ARM mc routines into MCTargetDesc. 
llvm-svn: 135825
 2011-07-23 00:00:19 +00:00