Evan Cheng
6366bbf577
Fix PR2076. CodeGenPrepare now sinks address computation for inline asm memory
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operands into inline asm block.
llvm-svn: 47589
2008-02-26 02:42:37 +00:00
Evan Cheng
40c26c71c0
Refactor inline asm constraint matching code out of SDIsel into TargetLowering.
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llvm-svn: 47587
2008-02-26 02:33:44 +00:00
Devang Patel
e5a51515ff
Remove debugging help.
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llvm-svn: 47585
2008-02-26 01:42:38 +00:00
Devang Patel
446581de1d
Update bitcode reader and writer to handle multiple return values.
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Take 2.
llvm-svn: 47583
2008-02-26 01:29:32 +00:00
Devang Patel
5b3d61f5ed
Pass const vectors by reference.
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llvm-svn: 47577
2008-02-26 00:12:13 +00:00
Dan Gohman
b8e7fea22f
Revert the assert for MUL_LOHI with an unused high result; Chris
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pointed out that this isn't correct at -O0.
llvm-svn: 47575
2008-02-25 22:43:48 +00:00
Dale Johannesen
c67fa85683
Revise previous patch per review.
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llvm-svn: 47573
2008-02-25 22:29:22 +00:00
Dan Gohman
2585bc7c46
Add an assert to verify that we don't see an
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{S,U}MUL_LOHI with an unused high value.
llvm-svn: 47569
2008-02-25 22:15:55 +00:00
Dan Gohman
1914fa6932
Remove the hack that turned an {S,U}MUL_LOHI with an unused high
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result into a MUL late in the X86 codegen process. ISD::MUL is
once again Legal on X86, so this is no longer needed. And, the
hack was suboptimal; see PR1874 for details.
llvm-svn: 47567
2008-02-25 21:57:04 +00:00
Dan Gohman
afd0e4bad3
Make some static variables const.
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llvm-svn: 47566
2008-02-25 21:39:34 +00:00
Dan Gohman
012abf0109
Convert MaskedValueIsZero and all its users to use APInt. Also add
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a SignBitIsZero function to simplify a common use case.
llvm-svn: 47561
2008-02-25 21:11:39 +00:00
Evan Cheng
17c9a98b59
All remat'ed loads cannot be folded into two-address code. Not just argument loads. This change doesn't really have any impact on codegen.
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llvm-svn: 47557
2008-02-25 19:24:01 +00:00
Dale Johannesen
574bb5e1e2
Expand removal of MMX memory copies to allow 1 level
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of TokenFactor underneath chain (seems to be enough)
llvm-svn: 47554
2008-02-25 19:20:14 +00:00
Duncan Sands
440b8ac3a0
In debug builds check that the key property holds: all
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result and operand types are legal.
llvm-svn: 47546
2008-02-25 16:21:21 +00:00
Evan Cheng
fc540545f1
Correctly determine whether a argument load can be folded into its uses.
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llvm-svn: 47545
2008-02-25 08:50:41 +00:00
Owen Anderson
6eafd532ab
Fix an issue where GVN was performing the return slot optimization when it was
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not safe. This is fixed by more aggressively checking that the return slot is
not used elsewhere in the function.
llvm-svn: 47544
2008-02-25 04:08:09 +00:00
Evan Cheng
e283043860
Temporarily reverting 46959.
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llvm-svn: 47542
2008-02-25 03:57:32 +00:00
Owen Anderson
432abc0479
Fix an issue where GVN would try to use an instruction before its definition when performing return slot optimization.
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llvm-svn: 47541
2008-02-25 00:40:41 +00:00
Duncan Sands
2cdf47bdf7
Add support to LegalizeTypes for building legal vectors
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out of illegal elements (BUILD_VECTOR). Uses and beefs
up BUILD_PAIR, though it didn't really have to. Like
most of LegalizeTypes, does not support soft-float.
This cures all "make check" vector building failures.
llvm-svn: 47537
2008-02-24 07:36:03 +00:00
Bill Wendling
a369a6add8
Some platforms use the same name for 32-bit and 64-bit registers (like
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%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data that lets you
specify a different name to be printed than the one that goes into the
ASM file -- %x3 instead of %r3, for instance.
llvm-svn: 47534
2008-02-24 00:56:13 +00:00
Evan Cheng
654983ba21
Backing out r47521 for now. This has broken a number of tests.
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llvm-svn: 47533
2008-02-23 19:32:32 +00:00
Scott Michel
36bbc39272
Merge current work back to tree to minimize diffs and drift. Major highlights
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for CellSPU modifications:
- SPUInstrInfo.td refactoring: "multiclass" really is _your_ friend.
- Other improvements based on refactoring effort in SPUISelLowering.cpp,
esp. in SPUISelLowering::PerformDAGCombine(), where zero amount shifts and
rotates are now eliminiated, other scalar-to-vector-to-scalar silliness
is also eliminated.
- 64-bit operations are being implemented, _muldi3.c gcc runtime now
compiles and generates the right code. More work still needs to be done.
llvm-svn: 47532
2008-02-23 18:41:37 +00:00
Evan Cheng
d299f09bc5
Rematerialization logic was overly conservative when it comes to loads from fixed stack slots.
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llvm-svn: 47529
2008-02-23 03:38:34 +00:00
Evan Cheng
2de70b3ff8
If remating a machine instr with virtual register operand, make sure the vr is avaliable at all uses regardless of whether it would be folded.
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llvm-svn: 47526
2008-02-23 02:14:42 +00:00
Evan Cheng
d3e9e78aa0
Turning on remat of pic loads.
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llvm-svn: 47524
2008-02-23 02:07:42 +00:00
Dan Gohman
8d536a33ff
Fix a bug that caused opt and other tools to silently ignore
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invalid command-line options.
llvm-svn: 47523
2008-02-23 01:55:25 +00:00
Evan Cheng
97ca29e99a
No need recognize load from a fixed argument slot as re-materializable. LiveIntervalAnalysis already handles it as a special case.
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llvm-svn: 47522
2008-02-23 01:47:44 +00:00
Devang Patel
4995a89a8d
Properly read and write bitcodes for multiple return values.
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llvm-svn: 47521
2008-02-23 01:44:55 +00:00
Evan Cheng
95d3cb841d
Recognize loads of arguments as re-materializable first. Therefore if isReallyTriviallyReMaterializable() returns true it doesn't confuse it as a "normal" re-materializable instruction.
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llvm-svn: 47520
2008-02-23 01:44:27 +00:00
Devang Patel
ac2ec94778
Regenerate.
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llvm-svn: 47519
2008-02-23 01:17:37 +00:00
Devang Patel
56d28d9fe3
Use isa check instead of getTypeID() check.
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llvm-svn: 47518
2008-02-23 01:17:17 +00:00
Ted Kremenek
bf1814f91f
Fixed buffer overflow reported by Argiris Kirtzidis.
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llvm-svn: 47517
2008-02-23 01:11:40 +00:00
Devang Patel
03a99197aa
print getresult operand and its type directly.
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llvm-svn: 47514
2008-02-23 01:04:26 +00:00
Devang Patel
63d29fccdf
Use dyn_cast instead of isa + cast.
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llvm-svn: 47511
2008-02-23 00:47:00 +00:00
Devang Patel
7cfd9e7634
Regenerate
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llvm-svn: 47509
2008-02-23 00:38:56 +00:00
Devang Patel
f674975a65
To support multiple return values, now ret instruction supports multiple operands instead of one aggregate operand.
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llvm-svn: 47508
2008-02-23 00:35:18 +00:00
Evan Cheng
166cb23f62
Fix spill weight updating bug.
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llvm-svn: 47507
2008-02-23 00:33:04 +00:00
Dale Johannesen
ae08bdb4cf
Split ParameterAttributes.h, putting the complicated
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stuff into ParamAttrsList.h. Per feedback from
ParamAttrs changes.
llvm-svn: 47504
2008-02-22 22:17:59 +00:00
Evan Cheng
bb645b395c
Same isPhysRegAvailable bug as local register allocator.
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llvm-svn: 47500
2008-02-22 20:31:32 +00:00
Evan Cheng
b8e7eb2b1b
Really really bad local register allocator bug. On X86, it was never using ESI, EDI, and EBP because of a bug in RALocal::isPhysRegAvailable(). For example, when
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it checks if ESI is available, it then looks at registers aliases to ESI. SIL is marked -2 (not allocatable) but isPhysRegAvailable() incorrectly assumes it is in use and returns false for ESI.
llvm-svn: 47499
2008-02-22 20:30:53 +00:00
Evan Cheng
e24db258fe
Add debugging printfs.
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llvm-svn: 47496
2008-02-22 19:57:06 +00:00
Devang Patel
f8efadbac0
Regenerate
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llvm-svn: 47495
2008-02-22 19:31:30 +00:00
Devang Patel
92fdd3b97c
Use SymbolicValueRef to parse getresult operand
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llvm-svn: 47494
2008-02-22 19:31:15 +00:00
Evan Cheng
fadafa2109
Make sure reload of implicit uses are issued before remat's.
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llvm-svn: 47492
2008-02-22 19:22:06 +00:00
Dale Johannesen
1d3737e5ed
Generated files for 47484.
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llvm-svn: 47485
2008-02-22 17:50:51 +00:00
Dale Johannesen
a96eb3a1d8
Pass alignment on ByVal parameters, from FE, all
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the way through. It is now used for codegen.
llvm-svn: 47484
2008-02-22 17:49:45 +00:00
Dale Johannesen
23a6f7fc1f
MMX vectors are passed 4-byte aligned.
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llvm-svn: 47483
2008-02-22 17:47:28 +00:00
Anton Korobeynikov
ca51f9e5f0
Provide __main hooks for cygwin & mingw32
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llvm-svn: 47479
2008-02-22 10:08:31 +00:00
Zhou Sheng
0742fbfedf
Fixed a typo.
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llvm-svn: 47478
2008-02-22 10:00:35 +00:00
Evan Cheng
1b417c4d84
Allow re-materialization of pic load (controlled by -remat-pic-load for now).
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llvm-svn: 47476
2008-02-22 09:25:47 +00:00