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7660 Commits

Author SHA1 Message Date
Evan Cheng
64a1febf9a Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled. 
llvm-svn: 44960
 2007-12-12 23:12:09 +00:00
Duncan Sands
47526c4a42 Remove host endianness info from TargetData and 
put it in a new header System/Host.h instead.
Instead of getting the endianness from configure,
calculate it directly.

llvm-svn: 44959
 2007-12-12 23:03:45 +00:00
Dan Gohman
0075ea1f5f Allow vector integer constants to be created with 
SelectionDAG::getConstant, in the same way as vector floating-point
constants. This allows the legalize expansion code for @llvm.ctpop and
friends to be usable with vector types.

llvm-svn: 44954
 2007-12-12 22:21:26 +00:00
Evan Cheng
ad3e7f3286 Use shuffles to implement insert_vector_elt for i32, i64, f32, and f64. 
llvm-svn: 44929
 2007-12-12 07:55:34 +00:00
Evan Cheng
d36d69fe92 Lower a build_vector with all constants into a constpool load unless it can be done with a move to low part. 
llvm-svn: 44921
 2007-12-12 06:45:40 +00:00
Scott Michel
81b4099173 Correct typo for Linux: s/esp/%rsp/ 
llvm-svn: 44904
 2007-12-12 02:38:28 +00:00
Nate Begeman
e9067c13ec Allow the JIT to encode MMX instructions 
llvm-svn: 44869
 2007-12-11 18:06:14 +00:00
Evan Cheng
f6c2838f36 - Improved v8i16 shuffle lowering. It now uses pshuflw and pshufhw as much as 
possible before resorting to pextrw and pinsrw.
- Better codegen for v4i32 shuffles masquerading as v8i16 or v16i8 shuffles.
- Improves (i16 extract_vector_element 0) codegen by recognizing
  (i32 extract_vector_element 0) does not require a pextrw.

llvm-svn: 44836
 2007-12-11 01:46:18 +00:00
Nate Begeman
8b194d1718 x86 doesn't actually want to custom lower v3i32 
llvm-svn: 44835
 2007-12-11 01:41:33 +00:00
Chris Lattner
f7c53191c0 Move TargetData::hostIsLittleEndian out of line, which means we 
don't have to #include config.h in it.  #including config.h breaks
other projects that have their own autoconf stuff and try to #include
the llvm headers.  One obscure example is llvm-gcc.

llvm-svn: 44825
 2007-12-11 00:28:59 +00:00
Anton Korobeynikov
005fe34c3b Hey, English is not my native language :) 
llvm-svn: 44820
 2007-12-10 23:10:20 +00:00
Anton Korobeynikov
b003fb0ed7 Clarify the need of CFI() stuff 
llvm-svn: 44819
 2007-12-10 23:08:35 +00:00
Anton Korobeynikov
fd74645812 Provide convenient way to disable CFI stuff for old/broken assemblers. 
Use it for Darwin.

llvm-svn: 44818
 2007-12-10 23:04:38 +00:00
Chris Lattner
b511799808 Disable cfi directives for now, darwin does't support them. 
These should probably be something like:

  CFI(".cfi_def_cfa_offset 16\n")

where CFI is defined to a noop on darwin and other platforms
that don't support those directives.

llvm-svn: 44803
 2007-12-10 19:10:18 +00:00
Anton Korobeynikov
cd497afc30 And finally annotate X86-64 version of callback. 
All bad stuff from SSE version is implicitely inherited :)

llvm-svn: 44794
 2007-12-10 15:27:07 +00:00
Anton Korobeynikov
49e2962ad3 Provide annotation for SSE version of callback. It's even more 
broken, because doesn't mark xmm regs properly

llvm-svn: 44793
 2007-12-10 15:13:55 +00:00
Anton Korobeynikov
0e4780cfe2 Annotate JIT callback function with call frame infromation. 
This will allow us (theoretically) to unwind through JITer.
The code wasn't verified, so I'm pretty sure offsets are wrong :)

llvm-svn: 44792
 2007-12-10 14:54:42 +00:00
Bill Wendling
8d8d9a2f5e Reverting 44702. It wasn't correct to rename them. 
llvm-svn: 44727
 2007-12-08 23:58:46 +00:00
Chris Lattner
12fca81026 aesthetic changes, no functionality change. Evan, it's not clear 
what 'Available' is, please add a comment near it and rename it
if appropriate.

llvm-svn: 44703
 2007-12-08 07:22:58 +00:00
Bill Wendling
d10837def7 Renaming: 
isTriviallyReMaterializable -> hasNoSideEffects
  isReallyTriviallyReMaterializable -> isTriviallyReMaterializable

llvm-svn: 44702
 2007-12-08 07:17:56 +00:00
Chris Lattner
e93a775a4d Fix a significant code quality regression I introduced on PPC64 quite 
a while ago.  We now produce:

_foo:
	mflr r0
	std r0, 16(r1)
	ld r2, 16(r1)
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr 

instead of:

_foo:
	mflr r0
	std r0, 16(r1)
	lis r0, 0
	ori r0, r0, 16
	ldx r2, r1, r0
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr 

for:

void foo(void **X) {
  *X = __builtin_return_address(0);
}

on ppc64.

llvm-svn: 44701
 2007-12-08 07:04:58 +00:00
Chris Lattner
e16166b78d implement __builtin_return_addr(0) on ppc. 
llvm-svn: 44700
 2007-12-08 06:59:59 +00:00
Chris Lattner
1024cda0bd refactor some code to avoid overloading the name 'usesLR' in 
different places to mean different things.  Document what the
one in PPCFunctionInfo means and when it is valid.

llvm-svn: 44699
 2007-12-08 06:39:11 +00:00
Evan Cheng
fdd03d0589 Doh 
llvm-svn: 44694
 2007-12-08 01:01:07 +00:00
Evan Cheng
28c2b7e647 Fix a compilation warning. 
llvm-svn: 44692
 2007-12-08 01:00:31 +00:00
Evan Cheng
6bfc0cadf3 Fix a compilation warning. 
llvm-svn: 44691
 2007-12-08 01:00:21 +00:00
Bill Wendling
c08dedb060 Initial commit of the machine code LICM pass. It successfully hoists this: 
_foo:
        li r2, 0
LBB1_1: ; bb
        li r5, 0
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmplw cr0, r2, r4
        bne cr0, LBB1_1 ; bb
LBB1_2: ; return
        blr 

to:

_foo:
        li r2, 0
        li r5, 0
LBB1_1: ; bb
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmplw cr0, r2, r4
        bne cr0, LBB1_1 ; bb
LBB1_2: ; return
        blr

ZOMG!! :-)

Moar to come...

llvm-svn: 44687
 2007-12-07 21:42:31 +00:00
Evan Cheng
c4db072c74 Add comment. 
llvm-svn: 44686
 2007-12-07 21:30:01 +00:00
Evan Cheng
34c7b35135 Much improved v8i16 shuffles. (Step 1). 
llvm-svn: 44676
 2007-12-07 08:07:39 +00:00
Evan Cheng
4dc538449d Remove a bogus optimization. It's not possible to do a move to low element to a <8 x i16> or <16 x i8> vector. 
llvm-svn: 44669
 2007-12-06 22:14:22 +00:00
Chris Lattner
c467b49c96 implement a readme entry, compiling the code into: 
_foo:
	movl	$12, %eax
	andl	4(%esp), %eax
	movl	_array(%eax), %eax
	ret

instead of:

_foo:
	movl	4(%esp), %eax
	shrl	$2, %eax
	andl	$3, %eax
	movl	_array(,%eax,4), %eax
	ret

As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:

-       movl    8(%eax), %eax
-       shll    $2, %eax
-       andl    $1020, %eax
-       movl    (%esi,%eax), %eax
+       movzbl  8(%eax), %eax
+       movl    (%esi,%eax,4), %eax


-       shll    $2, %edx
-       andl    $1020, %edx
-       movl    (%edi,%edx), %edx
+       andl    $255, %edx
+       movl    (%edi,%edx,4), %edx

Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:

-       andl    $85, %ebx
-       addl    _bit_count(,%ebx,4), %ebp
+       shll    $2, %ebx
+       andl    $340, %ebx
+       addl    _bit_count(%ebx), %ebp

llvm-svn: 44656
 2007-12-06 07:33:36 +00:00
Chris Lattner
e3f1487574 add a note 
llvm-svn: 44638
 2007-12-05 23:05:06 +00:00
Chris Lattner
011d2aab51 add a note 
llvm-svn: 44637
 2007-12-05 22:58:19 +00:00
Scott Michel
a9a40d4347 Minor updates: 
- Fix typo in SPUCallingConv.td
- Credit myself for CellSPU work
- Add CellSPU to 'all' host target list

llvm-svn: 44627
 2007-12-05 21:23:16 +00:00
Evan Cheng
27986f1ac7 Added canFoldMemoryOperand for PPC. 
llvm-svn: 44623
 2007-12-05 18:41:29 +00:00
Evan Cheng
aecb76bcc2 Update foldMemoryOperand. 
llvm-svn: 44621
 2007-12-05 18:36:37 +00:00
Chris Lattner
0914ad3008 fix warnings 
llvm-svn: 44620
 2007-12-05 18:32:18 +00:00
Chris Lattner
df5cd03710 allow this to build 
llvm-svn: 44619
 2007-12-05 18:30:11 +00:00
Evan Cheng
8464a0bf00 Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether 
the stored register is killed.

llvm-svn: 44600
 2007-12-05 03:14:33 +00:00
Scott Michel
871b3a4fd4 More stuff for CellSPU -- this should be enough to get an error-free 
compilation (no files missing). Test cases remain to be checked in.

llvm-svn: 44598
 2007-12-05 02:01:41 +00:00
Scott Michel
8a2cb11b05 Updated source file headers to llvm coding standard. 
llvm-svn: 44597
 2007-12-05 01:40:25 +00:00
Scott Michel
026ace10b2 Two missing files. 
llvm-svn: 44596
 2007-12-05 01:31:18 +00:00
Scott Michel
191775d31f Main CellSPU backend files checked in. Intrinsics and autoconf files 
remain.

llvm-svn: 44595
 2007-12-05 01:24:05 +00:00
Scott Michel
512cb025cc More files in the CellSPU drop... 
llvm-svn: 44584
 2007-12-04 22:35:58 +00:00
Scott Michel
774da2e74c More of the Cell SPU code drop from "Team Aerospace". 
llvm-svn: 44582
 2007-12-04 22:23:35 +00:00
Scott Michel
3996f647d2 More CellSPU files... more to follow. 
llvm-svn: 44559
 2007-12-03 23:14:43 +00:00
Scott Michel
c312b999e6 Makefile fragment for CellSPU. 
llvm-svn: 44558
 2007-12-03 23:12:49 +00:00
Scott Michel
34987128e0 First commit to CellSPU. More to follow 
llvm-svn: 44557
 2007-12-03 23:09:49 +00:00
Duncan Sands
1e2e4972ff Rather than having special rules like "intrinsics cannot 
throw exceptions", just mark intrinsics with the nounwind
attribute.  Likewise, mark intrinsics as readnone/readonly
and get rid of special aliasing logic (which didn't use
anything more than this anyway).

llvm-svn: 44544
 2007-12-03 20:06:50 +00:00
Evan Cheng
58b387dfb0 Remove redundant foldMemoryOperand variants and other code clean up. 
llvm-svn: 44517
 2007-12-02 08:30:39 +00:00