Evan Cheng
e7ec4690e1
New entry.
...
llvm-svn: 51487
2008-05-23 17:28:11 +00:00
Dan Gohman
1bff0b83b0
Fix another isFirstClassType that now needs to be isSingleValueType.
...
This fixes recent CBE regressions.
llvm-svn: 51483
2008-05-23 16:57:00 +00:00
Chris Lattner
4c1ffef5af
we compile multiply-by-constant into horrible code. Doesn't sse4 have some
...
instruction for doing this?
llvm-svn: 51473
2008-05-23 04:29:53 +00:00
Evan Cheng
097e95b1f7
Bug: rcpps can only folds a load if the address is 16-byte aligned. Fixed many 'ps' load folding patterns in X86InstrSSE.td which are missing the proper alignment checks.
...
Also fixed some 80 col. violations.
llvm-svn: 51462
2008-05-23 00:37:07 +00:00
Dale Johannesen
7cc19db16f
Put const weak stuff in appropriate section on Darwin.
...
g++.dg/abi/key2.C
llvm-svn: 51458
2008-05-23 00:16:59 +00:00
Evan Cheng
2dc53b5d58
X86CodeEmitter should not set PIC style to None at initialization time. This will break codegen if relocation model is changed to PIC_ later.
...
llvm-svn: 51455
2008-05-22 23:55:24 +00:00
Evan Cheng
d1373cd497
Add missing patterns.
...
llvm-svn: 51435
2008-05-22 18:56:56 +00:00
Chris Lattner
0a98796008
fix an off-by-one error in my previous patch, don't treat the callee as a incoming arg.
...
llvm-svn: 51422
2008-05-22 06:29:38 +00:00
Chris Lattner
6a45cf9dd6
Add support for multiple-return values in inline asm. This should
...
get inline asm working as well as it did previously with the CBE
with the new MRV support for inline asm.
llvm-svn: 51420
2008-05-22 06:19:37 +00:00
Evan Cheng
d694e78e36
movsd and movq do not require 16-byte alignment. This fixes vec_set-5.ll on Linux.
...
llvm-svn: 51327
2008-05-20 18:24:47 +00:00
Evan Cheng
e95fc3e83d
runOnMachineFunction should set IsPIC because relocation model may have been changed.
...
llvm-svn: 51291
2008-05-20 01:56:59 +00:00
Dale Johannesen
e6977495aa
Handle quoted names when constructing $stub's,
...
$non_lazy_ptr's and $lazy_ptr's.
llvm-svn: 51277
2008-05-19 21:38:18 +00:00
Chris Lattner
504c367af9
trip count computation deficiency
...
llvm-svn: 51222
2008-05-17 15:37:38 +00:00
Dale Johannesen
16fa5c08cb
Record weak external linkage in a case where we were
...
missing it. gcc.dg/darwin-weakimport-2.c.
Handle common and weak differently for darwin ppc32.
llvm-svn: 51201
2008-05-16 20:09:25 +00:00
Gabor Greif
d61f20217a
API change for {BinaryOperator|CmpInst|CastInst}::create*() --> Create. Legacy interfaces will be in place for some time. (Merge from use-diet branch.)
...
llvm-svn: 51200
2008-05-16 19:29:10 +00:00
Dale Johannesen
ebc511c6aa
Treat common as distinct from weak global on Darwin x86.
...
llvm-svn: 51172
2008-05-16 00:52:06 +00:00
Evan Cheng
73dadf21ce
Fix typos and comments.
...
llvm-svn: 51165
2008-05-15 22:13:02 +00:00
Evan Cheng
778a5e27b0
Make use of vector load and store operations to implement memcpy, memmove, and memset. Currently only X86 target is taking advantage of these.
...
llvm-svn: 51140
2008-05-15 08:39:06 +00:00
Evan Cheng
d4c4bd4241
Silence warnings.
...
llvm-svn: 51129
2008-05-14 20:33:21 +00:00
Dale Johannesen
768b6f281e
Add CommonLinkage; currently tentative definitions
...
are represented as "weak", but there are subtle differences
in some cases on Darwin, so we need both. The intent
is that "common" will behave identically to "weak" unless
somebody changes their target to do something else.
No functional change as yet.
llvm-svn: 51118
2008-05-14 20:12:51 +00:00
Sanjiv Gupta
7cc26f0421
Detabification. Fixed indentation and spacing.
...
Changed cout to DOUT, and TODOs to FIXMEs.
Other changes as per coding conventions.
llvm-svn: 51105
2008-05-14 11:31:39 +00:00
Nicolas Geoffray
9f633abc38
Fix typo in ParameterAttribute fields usage. Add an include
...
to make the Cpp backend output compilable.
llvm-svn: 51095
2008-05-14 07:52:03 +00:00
Sanjiv Gupta
3563f7bc68
Fixed the file description header at the top to remove the developer name.
...
llvm-svn: 51094
2008-05-14 06:50:01 +00:00
Evan Cheng
95987c2586
Doh. Alignment is in bytes, not in bits.
...
llvm-svn: 51092
2008-05-14 02:49:43 +00:00
Dan Gohman
f9d5689496
Change target-specific classes to use more precise static types.
...
This eliminates the need for several awkward casts, including
the last dynamic_cast under lib/Target.
llvm-svn: 51091
2008-05-14 01:58:56 +00:00
Chris Lattner
a11adf725d
add a note
...
llvm-svn: 51062
2008-05-13 19:56:20 +00:00
Evan Cheng
cb56638548
- Fix the pasto in the fix for a previous pasto.
...
- Incorporate Chris' comment suggestion.
llvm-svn: 51061
2008-05-13 18:59:59 +00:00
Chris Lattner
c9eb6a7d64
add a note
...
llvm-svn: 51060
2008-05-13 18:48:54 +00:00
Nate Begeman
c290daf581
Fix one more encoding bug.
...
llvm-svn: 51057
2008-05-13 17:52:09 +00:00
Evan Cheng
cf6928983b
- Don't treat anyext 16-bit load as a 32-bit load if it's volatile.
...
- Correct a pasto.
llvm-svn: 51054
2008-05-13 16:45:56 +00:00
Sanjiv Gupta
fa065a1455
Adding files for Microchip's PIC16 target.
...
A brief description about PIC16:
===============================
PIC16 is an 8-bit microcontroller with only one 8-bit register which is the
accumulator. All arithmetic/load/store operations are 8-bit only.
The architecture has two address spaces: program and data. The program memory
is divided into 2K pages and the data memory is divided into banks of 128 byte, with only 80 usable bytes, resulting in an non-contiguous data memory.
It supports direct data memory access (by specifying the address as part of the instruction) and indirect data and program memory access (in an unorthodox fashion which utilize a 16 bit pointer register).
Two classes of registers exist: (8-bit class which is only one
accumulator) (16-bit class, which contains one or more 16 bit
pointer(s))
llvm-svn: 51027
2008-05-13 09:02:57 +00:00
Evan Cheng
9e15622879
Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset.
...
pshufd $1, (%rdi), %xmm0
movd %xmm0, %eax
=>
movl 4(%rdi), %eax
llvm-svn: 51026
2008-05-13 08:35:03 +00:00
Nate Begeman
b9a3d141aa
Fix and encoding error in the psrad xmm, imm8 instruction.
...
llvm-svn: 51020
2008-05-13 01:47:52 +00:00
Evan Cheng
e4ee4c2870
On x86, it's safe to treat i32 load anyext as a normal i32 load. Ditto for i8 anyext load to i16.
...
llvm-svn: 51019
2008-05-13 00:54:02 +00:00
Dan Gohman
bab18cae46
Clean up the use of static and anonymous namespaces. This turned up
...
several things that were neither in an anonymous namespace nor static
but not intended to be global.
llvm-svn: 51017
2008-05-13 00:00:25 +00:00
Nate Begeman
5d939498c3
Teach Legalize how to scalarize VSETCC
...
Teach X86 a few more vsetcc patterns. Custom lowering for unsupported ones is next.
llvm-svn: 51009
2008-05-12 23:09:43 +00:00
Evan Cheng
fcbdc8bd6e
Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.
...
llvm-svn: 51008
2008-05-12 23:04:07 +00:00
Bill Wendling
646f3458c4
Constify the machine instruction passed into the
...
"is{Trivially,Really}ReMaterializable" methods.
llvm-svn: 51001
2008-05-12 20:54:26 +00:00
Nate Begeman
2ae55cecc6
Initial X86 codegen support for VSETCC.
...
llvm-svn: 51000
2008-05-12 20:34:32 +00:00
Dan Gohman
efa0925915
Fix a copy+paste bug; pseudo-instructions shouldn't have
...
encoding information.
llvm-svn: 50997
2008-05-12 20:22:45 +00:00
Evan Cheng
c7e9acfed7
Refactor isConsecutiveLoad from X86 to TargetLowering so DAG combiner can make use of it.
...
llvm-svn: 50991
2008-05-12 19:56:52 +00:00
Nate Begeman
11c0772a30
Add support for vicmp/vfcmp codegen, more legalize support coming.
...
This is necessary to unbreak the build.
llvm-svn: 50988
2008-05-12 19:40:03 +00:00
Dan Gohman
8212eaa43a
Fix a compile error on compilers that still want a return value
...
in a non-void function that calls abort.
llvm-svn: 50969
2008-05-12 16:17:19 +00:00
Anton Korobeynikov
ad83aeb489
Add note
...
llvm-svn: 50959
2008-05-11 14:33:15 +00:00
Evan Cheng
c19c639ad7
When transforming a vector_shuffle to a load, the base address must not be an undef.
...
llvm-svn: 50940
2008-05-10 06:46:49 +00:00
Dan Gohman
4b23d9e60a
For now, abort when an ISD::VAARG is encountered on x86-64, rather
...
than silently generate invalid code.
llvm-gcc does not currently use VAArgInst; it lowers va_arg in the
front-end.
llvm-svn: 50930
2008-05-10 01:26:14 +00:00
Evan Cheng
6a3fa28b38
Some clean up.
...
llvm-svn: 50929
2008-05-10 00:59:18 +00:00
Evan Cheng
79230955a8
If movl top bits are undef, let it be selected to movlps, etc.
...
llvm-svn: 50928
2008-05-10 00:58:41 +00:00
Evan Cheng
2adea48f7e
Add a pattern to do move the low element of a v4f32 and zero extend the rest.
...
llvm-svn: 50922
2008-05-09 23:37:55 +00:00
Evan Cheng
3493e43afd
Handle a few more cases of folding load i64 into xmm and zero top bits.
...
Note, some of the code will be moved into target independent part of DAG combiner in a subsequent patch.
llvm-svn: 50918
2008-05-09 21:53:03 +00:00
Evan Cheng
f824b47188
Use movq to move low half of XMM register and zero-extend the rest.
...
llvm-svn: 50874
2008-05-08 22:35:02 +00:00
Evan Cheng
f97e716511
Handle vector move / load which zero the destination register top bits (i.e. movd, movq, movss (addr), movsd (addr)) with X86 specific dag combine.
...
llvm-svn: 50838
2008-05-08 00:57:18 +00:00
Duncan Sands
6f4e916c6a
Output correct exception handling and frame info
...
on x86-64 linux. This causes no regressions on
32 bit linux and 32 bit ppc. More tests pass
on 64 bit ppc with no regressions. I didn't
turn on eh on 64 bit linux because the intrinsics
needed to compile the eh runtime aren't done
yet. But if you turn it on and link with the
mainline runtime then eh seems to work fine
on x86-64 linux with this patch. Thanks to
Dale for testing. The main point of the patch
is that if you output that some object is
encoded using 4 bytes you had better not output
8 bytes for it: the patch makes everything
consistent.
llvm-svn: 50825
2008-05-07 19:11:09 +00:00
Chris Lattner
d46c148cf8
Match things like 'armv5tejl-unknown-linux-gnu' for PR2290
...
llvm-svn: 50698
2008-05-06 02:29:28 +00:00
Dan Gohman
d4a670284c
Make several variable declarations static.
...
llvm-svn: 50696
2008-05-06 01:53:16 +00:00
Chris Lattner
9f4f2444ea
add a micro optzn.
...
llvm-svn: 50681
2008-05-05 23:19:45 +00:00
Mon P Wang
34b3f18a70
Improved generated code for atomic operators
...
llvm-svn: 50677
2008-05-05 22:56:23 +00:00
Evan Cheng
44d49e72a1
Code clean up. No functionality change.
...
llvm-svn: 50675
2008-05-05 22:12:23 +00:00
Mon P Wang
84a269e023
Added addition atomic instrinsics and, or, xor, min, and max.
...
llvm-svn: 50663
2008-05-05 19:05:59 +00:00
Dan Gohman
4a674dc536
Fix IsLinux being uninitialized on non-Linux targets.
...
llvm-svn: 50660
2008-05-05 18:43:07 +00:00
Anton Korobeynikov
12c48230f9
Fix 80col violation
...
llvm-svn: 50654
2008-05-05 17:08:59 +00:00
Dan Gohman
8ee7bf053e
Use a dedicated IsLinux flag instead of an ELFLinux TargetType.
...
llvm-svn: 50649
2008-05-05 16:11:31 +00:00
Dan Gohman
c860d9c77c
Add AsmPrinter support for emitting a directive to declare that
...
the code being generated does not require an executable stack.
Also, add target-specific code to make use of this on Linux
on x86.
llvm-svn: 50634
2008-05-05 00:28:39 +00:00
Anton Korobeynikov
04c974b1b2
Add General Dynamic TLS model for X86-64. Some parts looks really ugly (look for tlsaddr pattern),
...
but should work. Work is in progress, more models will follow
llvm-svn: 50630
2008-05-04 21:36:32 +00:00
Evan Cheng
a7747df955
Select vector shift with non-immediate i32 shift amount operand by first moving the operand into the right register.
...
llvm-svn: 50619
2008-05-04 09:15:50 +00:00
Evan Cheng
c1c2adbfc6
Add separate intrinsics for MMX / SSE shifts with i32 integer operands. This allow us to simplify the horribly complicated matching code.
...
llvm-svn: 50601
2008-05-03 00:52:09 +00:00
Evan Cheng
90b9027f68
Undo r50574. We are already ensuring the folded load address is 16-byte aligned.
...
llvm-svn: 50578
2008-05-02 17:01:01 +00:00
Evan Cheng
583a346ec6
80 column violation.
...
llvm-svn: 50575
2008-05-02 07:53:32 +00:00
Evan Cheng
862e3a147c
Not safe folding a load + FsXORPSrr into FsXORPSrm. It's loading a FR64 value but the load folding variant expects a 16-byte aligned address.
...
llvm-svn: 50574
2008-05-02 07:50:58 +00:00
Arnold Schwaighofer
f58a35e2ec
Tail call optimization improvements:
...
Move platform independent code (lowering of possibly overwritten
arguments, check for tail call optimization eligibility) from
target X86ISelectionLowering.cpp to TargetLowering.h and
SelectionDAGISel.cpp.
Initial PowerPC tail call implementation:
Support ppc32 implemented and tested (passes my tests and
test-suite llvm-test).
Support ppc64 implemented and half tested (passes my tests).
On ppc tail call optimization is performed if
caller and callee are fastcc
call is a tail call (in tail call position, call followed by ret)
no variable argument lists or byval arguments
option -tailcallopt is enabled
Supported:
* non pic tail calls on linux/darwin
* module-local tail calls on linux(PIC/GOT)/darwin(PIC)
* inter-module tail calls on darwin(PIC)
If constraints are not met a normal call will be emitted.
A test checking the argument lowering behaviour on x86-64 was added.
llvm-svn: 50477
2008-04-30 09:16:33 +00:00
Scott Michel
9dec950785
Bug fixes and updates for CellSPU, syncing up with trunk. Most notable
...
fixes are target-specific lowering of frame indices, fix constants generated
for the FSMBI instruction, and fixing SPUTargetLowering::computeMaskedBitsFor-
TargetNode().
llvm-svn: 50462
2008-04-30 00:30:08 +00:00
Anton Korobeynikov
2dca0c7323
Don't do stupid things: doInitialization(Module&) is not applicable to ModulePass :)
...
llvm-svn: 50433
2008-04-29 18:16:22 +00:00
Dan Gohman
0285c1e9bb
Fix the SVOffset values for loads and stores produced by
...
memcpy/memset expansion. It was a bug for the SVOffset value
to be used in the actual address calculations.
llvm-svn: 50359
2008-04-28 17:15:20 +00:00
Anton Korobeynikov
54791c2a43
Fix FP return for Win64 ABI
...
llvm-svn: 50342
2008-04-28 07:40:07 +00:00
Anton Korobeynikov
1c5d228377
Properly lower vararg's FORMAL_ARGUMENTS node on win64
...
llvm-svn: 50325
2008-04-27 23:15:03 +00:00
Anton Korobeynikov
0df1f3bc6c
Handle fp80 for win64
...
llvm-svn: 50324
2008-04-27 22:54:09 +00:00
Chris Lattner
b5bd654163
A few inline asm cleanups:
...
- Make targetlowering.h fit in 80 cols.
- Make LowerAsmOperandForConstraint const.
- Make lowerXConstraint -> LowerXConstraint
- Make LowerXConstraint return a const char* instead of taking a string byref.
llvm-svn: 50312
2008-04-26 23:02:14 +00:00
Chris Lattner
1c98ff80c0
no need to implement this method and just have it call
...
the default impl.
llvm-svn: 50311
2008-04-26 22:59:59 +00:00
Evan Cheng
318e7e042c
Extract the lower 64-bit if a MMX value is passed in a XMM register.
...
llvm-svn: 50292
2008-04-25 20:13:28 +00:00
Evan Cheng
eaaec15b4f
Fix illegal MMX_MOVDQ2Qrr pattern. vector_extract result must be a scalar value.
...
llvm-svn: 50291
2008-04-25 20:12:46 +00:00
Evan Cheng
11f101a800
Special handling for MMX values being passed in either GPR64 or lower 64-bits of XMM registers.
...
llvm-svn: 50289
2008-04-25 19:11:04 +00:00
Evan Cheng
0fe99f024d
Fix MMX_MOVQ2DQrr pattern. It's illegal to do a bitconvert from a smaller type to a larger one.
...
llvm-svn: 50278
2008-04-25 18:19:54 +00:00
Chris Lattner
81742d7a8f
add a note
...
llvm-svn: 50267
2008-04-25 17:25:00 +00:00
Evan Cheng
bbbe14502f
80 col violation.
...
llvm-svn: 50266
2008-04-25 17:21:40 +00:00
Evan Cheng
37ca5de3b7
Not checking for intrinsics which do not have a chain operand.
...
llvm-svn: 50260
2008-04-25 08:55:28 +00:00
Evan Cheng
e177dc6696
- Switch from std::set to SmallPtrSet.
...
- Add comments.
llvm-svn: 50259
2008-04-25 08:22:20 +00:00
Evan Cheng
39ae78cadb
MMX argument passing fixes:
...
On Darwin / Linux x86-32, v8i8, v4i16, v2i32 values are passed in MM[0-2].
On Darwin / Linux x86-32, v1i64 values are passed in memory.
On Darwin x86-64, v8i8, v4i16, v2i32 values are passed in XMM[0-7].
On Darwin x86-64, v1i64 values are passed in 64-bit GPRs.
llvm-svn: 50257
2008-04-25 07:56:45 +00:00
Chris Lattner
8c9f6c929a
Loosen up an assertion to allow intrinsics. I really have no
...
idea what this code (findNonImmUse) does, so I'm only guessing
that this is the right thing. It would be really really nice
if this had comments and perhaps switched to SmallPtrSet
(hint hint) :)
This fixes rdar://5886601, a crash on gcc.target/i386/sse4_1-pblendw.c
llvm-svn: 50252
2008-04-25 05:13:01 +00:00
Evan Cheng
484060ba4a
Fix bug in x86 memcpy / memset lowering. If there are trailing bytes not handled by rep instructions, a new memcpy / memset is introduced for them. However, since source / destination addresses are already adjusted, their offsets should be zero.
...
llvm-svn: 50239
2008-04-25 00:26:43 +00:00
Dan Gohman
6054efc488
Make these variables static.
...
llvm-svn: 50196
2008-04-23 23:15:23 +00:00
Anton Korobeynikov
ac6f6045bb
Drop dead includes
...
llvm-svn: 50192
2008-04-23 22:44:03 +00:00
Anton Korobeynikov
361e5f9eee
Adjust option names for C++ backend
...
llvm-svn: 50190
2008-04-23 22:37:03 +00:00
Anton Korobeynikov
193b7db7c7
First step of implementing PR1538: move llvm2cpp logic to new 'target'
...
llvm-svn: 50189
2008-04-23 22:29:24 +00:00
Dan Gohman
5df2f2c2e7
Initial CBE support for multiple return values.
...
llvm-svn: 50187
2008-04-23 21:49:29 +00:00
Anton Korobeynikov
4b572e0f73
Fix typo
...
llvm-svn: 50169
2008-04-23 18:24:25 +00:00
Anton Korobeynikov
372e69e652
Only allow increase of max alignment value
...
llvm-svn: 50168
2008-04-23 18:23:50 +00:00
Anton Korobeynikov
47a8e6d7a9
Be over-conservative: scan for all used virtual registers and calculate maximal stack alignment in assumption, that there will be spill of vector register.
...
llvm-svn: 50167
2008-04-23 18:23:30 +00:00
Anton Korobeynikov
e7754f758b
Add X86 Maximal Stack Alignment Calculator Pass before RA
...
llvm-svn: 50166
2008-04-23 18:23:05 +00:00
Anton Korobeynikov
158f614c67
Do proper book-keeping of offsets and prologue/epilogue code for stack realignment
...
llvm-svn: 50163
2008-04-23 18:21:27 +00:00
Anton Korobeynikov
1f07315f47
If stack realignment is used - incoming args will use EBP as base register and locals - ESP
...
llvm-svn: 50162
2008-04-23 18:21:02 +00:00
Anton Korobeynikov
5079553b9d
Eastimate required stack alignment early, so we can decide, whether we will need frame pointer or not
...
llvm-svn: 50161
2008-04-23 18:20:17 +00:00
Anton Korobeynikov
492641d67f
Cleanup
...
llvm-svn: 50159
2008-04-23 18:19:23 +00:00
Anton Korobeynikov
87325bfdf5
Simplify
...
llvm-svn: 50158
2008-04-23 18:18:36 +00:00
Anton Korobeynikov
73935826d4
Make stack alignment options global for all targets
...
llvm-svn: 50157
2008-04-23 18:18:10 +00:00
Anton Korobeynikov
6a59c959ca
Provide option for enabling-disabling stack realignment
...
llvm-svn: 50156
2008-04-23 18:17:11 +00:00
Anton Korobeynikov
fc59ae78e0
Disable stack realignment for functions with dynamic-sized alloca's
...
llvm-svn: 50155
2008-04-23 18:16:43 +00:00
Anton Korobeynikov
11851230a9
Provide ABI-correct stack alignment
...
llvm-svn: 50154
2008-04-23 18:16:16 +00:00
Anton Korobeynikov
7e6850d1a1
Provide convenient helpers for some operations
...
llvm-svn: 50153
2008-04-23 18:15:48 +00:00
Anton Korobeynikov
71adb49389
Whitespace cleanup
...
llvm-svn: 50152
2008-04-23 18:15:11 +00:00
Dan Gohman
93b5be1824
Implement an x86-64 ABI detail of passing structs by hidden first
...
argument. The x86-64 ABI requires the incoming value of %rdi to
be copied to %rax on exit from a function that is returning a
large C struct.
Also, add a README-X86-64 entry detailing the missed optimization
opportunity and proposing an alternative approach.
llvm-svn: 50075
2008-04-21 23:59:07 +00:00
Dan Gohman
105b523786
Fix the encoding of the MMX movd that moves from MMX to 64-bit GPR.
...
llvm-svn: 50053
2008-04-21 19:52:29 +00:00
Chris Lattner
3117d33f74
Add an ugly note.
...
llvm-svn: 50029
2008-04-21 04:46:30 +00:00
Nicolas Geoffray
036fb2bebf
Don't forget to update the current operand when getting the size of an instruction.
...
llvm-svn: 50007
2008-04-20 23:36:47 +00:00
Chris Lattner
2c5b96fbee
A better fix for my previous patch, MOVZQI2PQIrr just requires SSE2.
...
llvm-svn: 49986
2008-04-20 05:52:46 +00:00
Chris Lattner
f390d62b7f
Switch to using Simplified ConstantFP::get API.
...
llvm-svn: 49977
2008-04-20 00:41:09 +00:00
Evan Cheng
f583b3feb6
64-bit atomic operations.
...
llvm-svn: 49949
2008-04-19 02:30:38 +00:00
Evan Cheng
1c54ebbe2f
Also LXCHG64 -> XCHG64rm.
...
llvm-svn: 49948
2008-04-19 02:05:42 +00:00
Evan Cheng
09e77f6b83
PPC32 atomic operations.
...
llvm-svn: 49947
2008-04-19 01:30:48 +00:00
Evan Cheng
b1d240f973
xchg which references a memory operand does not need to lock prefix. Atomicity is guaranteed.
...
llvm-svn: 49946
2008-04-19 01:20:30 +00:00
Dan Gohman
98ca33cb59
Fix the handling of va_copy on x86-64. As of llvm-gcc r49920
...
llvm-gcc is now lowering va_copy on x86-64, so this completes
the fix for PR2230.
llvm-svn: 49922
2008-04-18 20:55:41 +00:00
Evan Cheng
a626e13995
- Fix atomic operation JIT encoding.
...
- Remove unused instructions.
llvm-svn: 49921
2008-04-18 20:55:36 +00:00
Evan Cheng
2b03674feb
Also support Intel asm syntax.
...
llvm-svn: 49878
2008-04-17 23:35:10 +00:00
Evan Cheng
0b36ca5023
Fix assembly code for atomic operations.
...
llvm-svn: 49869
2008-04-17 21:26:35 +00:00
Evan Cheng
e2e899b5c2
Don't forget about sub-register indices when rematting instructions.
...
llvm-svn: 49830
2008-04-16 23:44:44 +00:00
Dale Johannesen
d19ab27ee1
Unbreak build on x86-64.
...
llvm-svn: 49822
2008-04-16 22:24:33 +00:00
Nicolas Geoffray
1f3211af01
Correlate stubs with functions in JIT: when emitting a stub, the JIT tells the memory manager which function
...
the stub will resolve.
llvm-svn: 49814
2008-04-16 20:46:05 +00:00
Nicolas Geoffray
82baa2d2c6
Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented
...
llvm-svn: 49809
2008-04-16 20:10:13 +00:00
Evan Cheng
341bed7210
Initialize X863DNowLevel.
...
llvm-svn: 49808
2008-04-16 19:03:02 +00:00
Roman Levenstein
728d59166f
Ongoing work on improving the instruction selection infrastructure:
...
Rename SDOperandImpl back to SDOperand.
Introduce the SDUse class that represents a use of the SDNode referred by
an SDOperand. Now it is more similar to Use/Value classes.
Patch is approved by Dan Gohman.
llvm-svn: 49795
2008-04-16 16:15:27 +00:00
Dan Gohman
be8f2b452b
Add support for the form of the SSE41 extractps instruction that
...
puts its result in a 32-bit GPR.
llvm-svn: 49762
2008-04-16 02:32:24 +00:00
Dan Gohman
cf79877623
Recreate the size SDNode instead of reusing the old one in the x86
...
memcpy lowering code; this ensures that the size node has the desired
result type. This fixes a regression from r49572 with @llvm.memcpy.i64
on x86-32.
llvm-svn: 49761
2008-04-16 01:32:32 +00:00
Dan Gohman
6f9b55bc7c
Remove X86_64SRet; it isn't used anymore.
...
llvm-svn: 49759
2008-04-16 00:24:30 +00:00
Dan Gohman
7d27552962
Add movd instructions to move from MMX registers
...
to 64-bit GPR registers on x86-64.
llvm-svn: 49757
2008-04-15 23:55:07 +00:00
Nicolas Geoffray
7e0110f724
Change Divided flag to Split, as suggested by Evan
...
llvm-svn: 49715
2008-04-15 08:08:50 +00:00
Dan Gohman
77049e31b6
Remove unnecessary <sstream> includes.
...
llvm-svn: 49681
2008-04-14 20:40:47 +00:00
Dan Gohman
8d46278998
Fix const-correctness issues with the SrcValue handling in the
...
memory intrinsic expansion code.
llvm-svn: 49666
2008-04-14 17:55:48 +00:00
Dale Johannesen
edcba1161f
Reverse sense of unwind-tables option. This means
...
stack tracebacks on Darwin x86-64 won't work by default;
nevertheless, everybody but me thinks this is a good idea.
llvm-svn: 49663
2008-04-14 17:54:17 +00:00
Nicolas Geoffray
ad5556e8ba
Add a divided flag for the first piece of an argument divided into mulitple parts. Fixes PR1643
...
llvm-svn: 49611
2008-04-13 13:40:22 +00:00
Anton Korobeynikov
ea8dbf596a
Provide option for stack alignment override
...
llvm-svn: 49593
2008-04-12 22:12:22 +00:00
Arnold Schwaighofer
82af0e6a43
This patch corrects the handling of byval arguments for tailcall
...
optimized x86-64 (and x86) calls so that they work (... at least for
my test cases).
Should fix the following problems:
Problem 1: When i introduced the optimized handling of arguments for
tail called functions (using a sequence of copyto/copyfrom virtual
registers instead of always lowering to top of the stack) i did not
handle byval arguments correctly e.g they did not work at all :).
Problem 2: On x86-64 after the arguments of the tail called function
are moved to their registers (which include ESI/RSI etc), tail call
optimization performs byval lowering which causes xSI,xDI, xCX
registers to be overwritten. This is handled in this patch by moving
the arguments to virtual registers first and after the byval lowering
the arguments are moved from those virtual registers back to
RSI/RDI/RCX.
llvm-svn: 49584
2008-04-12 18:11:06 +00:00
Dan Gohman
15edbf989f
Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
...
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.
Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.
This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.
Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.
This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.
llvm-svn: 49572
2008-04-12 04:36:06 +00:00
Dan Gohman
41f9d24d52
Fix a bug that prevented x86-64 from using rep.movsq for
...
8-byte-aligned data.
llvm-svn: 49571
2008-04-12 02:35:39 +00:00
Nate Begeman
81586b24d6
80 col fix
...
llvm-svn: 49569
2008-04-12 00:47:57 +00:00
Chris Lattner
9f994482f5
add a note, this is actually not too bad to implement.
...
llvm-svn: 49466
2008-04-10 05:54:50 +00:00
Chris Lattner
869325c4c4
move the x86-32 part of PR2108 here.
...
llvm-svn: 49465
2008-04-10 05:37:47 +00:00
Chris Lattner
3b289289a7
Fix the x86-64 side of PR2108 by adding a v2f64 version of
...
MOVZQI2PQIrr. This would be better handled as a dag combine
(with the goal of eliminating the bitconvert) but I don't know
how to do that safely. Thoughts welcome.
llvm-svn: 49463
2008-04-10 05:13:43 +00:00
Dan Gohman
b3a511b236
Make isVectorClearMaskLegal's operand list const.
...
llvm-svn: 49446
2008-04-09 20:09:42 +00:00
Dan Gohman
f4cd5a4801
Add XMM1 as a second return value register for f32 and f64 on x86-64. This
...
is needed for the x86-64-ABI handling of structs that contain floating-point
members that are returned by value.
llvm-svn: 49441
2008-04-09 17:54:37 +00:00
Dan Gohman
9f7c4f6e16
Add DX as a second return value register for i16 on x86.
...
llvm-svn: 49440
2008-04-09 17:53:38 +00:00
Dale Johannesen
5dcdb08b0d
Rename -disable-required-unwind-tables to unwind-tables-optional.
...
llvm-svn: 49389
2008-04-08 18:07:49 +00:00
Dale Johannesen
2d29b1c5bb
Handle the situation in 2008-01-25-EmptyFunction.ll
...
correctly when unwind info is being generated.
llvm-svn: 49366
2008-04-08 00:37:56 +00:00
Dale Johannesen
ec0fe04044
Implement new llc flag -disable-required-unwind-tables.
...
Corresponds to -fno-unwind-tables (usually default in gcc).
llvm-svn: 49361
2008-04-08 00:10:24 +00:00
Dan Gohman
d7301ea935
Rename MemOperand to MachineMemOperand. This was suggested by
...
review feedback from Chris quite a while ago. No functionality
change.
llvm-svn: 49348
2008-04-07 19:35:22 +00:00
Roman Levenstein
b40d332929
Re-commit of the r48822, where the infinite looping problem discovered
...
by Dan Gohman is fixed.
llvm-svn: 49330
2008-04-07 10:06:32 +00:00
Gabor Greif
6c6b8a57f3
API changes for class Use size reduction, wave 1.
...
Specifically, introduction of XXX::Create methods
for Users that have a potentially variable number of
Uses.
llvm-svn: 49277
2008-04-06 20:25:17 +00:00
Evan Cheng
4d7b2ab16f
Favors pshufd over shufps when shuffling elements from one vector. pshufd is faster than shufps.
...
llvm-svn: 49244
2008-04-05 00:30:36 +00:00
Torok Edwin
a282b19804
strdup needs <cstring>. This fixes a build error with g++-4.3.
...
llvm-svn: 49218
2008-04-04 16:08:00 +00:00
Evan Cheng
0585b4bc2a
Re-enable SSE4.
...
llvm-svn: 49158
2008-04-03 08:53:29 +00:00
Evan Cheng
cb5a5467dc
Fix x86-64 encoding bug. REX prefix must always follow 0x0F prefix. For example, extractps in 64bit mode: 66 REX 0F 3A 17, not 66 0F 3A REX 17.
...
llvm-svn: 49157
2008-04-03 08:53:17 +00:00
Evan Cheng
12d2bbde0d
Cosmetic
...
llvm-svn: 49156
2008-04-03 07:45:18 +00:00
Evan Cheng
f112eb3b1c
Temporarily disabling SSE4 until we fix the encoding issues.
...
llvm-svn: 49129
2008-04-03 04:49:54 +00:00
Evan Cheng
497c607fae
Backing out 48222 temporarily.
...
llvm-svn: 49124
2008-04-03 03:13:16 +00:00
Dan Gohman
5b2503097e
Suppress the 128-bit integer typedef on 32-bit targets, because
...
it causes compile errors.
llvm-svn: 49122
2008-04-02 23:52:49 +00:00
Dan Gohman
4949a9c308
Partial CBackend support for 128-bit integers. This is needed
...
now that llvm-gcc is lowering appropriately-sized struct returns
to i128 on x86-64.
llvm-svn: 49109
2008-04-02 19:40:14 +00:00
Dale Johannesen
84a1314ea1
Cosmetic changes per EH patch review feedback.
...
llvm-svn: 49096
2008-04-02 17:04:45 +00:00
Anton Korobeynikov
d3330dfbf6
Add new CC lowering rule: provide a list of registers, which can be 'shadowed',
...
when some another register is used for argument passing.
Currently is used on Win64.
llvm-svn: 49079
2008-04-02 05:23:57 +00:00
Dale Johannesen
79633a914f
Recommitting EH patch; this should answer most of the
...
review feedback.
-enable-eh is still accepted but doesn't do anything.
EH intrinsics use Dwarf EH if the target supports that,
and are handled by LowerInvoke otherwise.
The separation of the EH table and frame move data is,
I think, logically figured out, but either one still
causes full EH info to be generated (not sure how to
split the metadata correctly).
MachineModuleInfo::needsFrameInfo is no longer used and
is removed.
llvm-svn: 49064
2008-04-02 00:25:04 +00:00
Evan Cheng
e1eee9570f
ReMat of load from stub in pic mode extends the life of pic base. Currently spiller doesn't do a good job of estimating the impact. Disable for now.
...
llvm-svn: 49059
2008-04-01 23:26:12 +00:00
Evan Cheng
5c98bdbc4f
Remove unnecessary and non-deterministic checking code. Re-enable remat of load from gv stub.
...
llvm-svn: 49054
2008-04-01 21:38:20 +00:00
Dan Gohman
a3e01dc1ec
Don't use __bzero for memset if the second argument isn't zero.
...
llvm-svn: 49050
2008-04-01 20:56:18 +00:00
Dan Gohman
168b2b1300
Speculatively micro-optimize memory-zeroing calls on Darwin 10.
...
llvm-svn: 49048
2008-04-01 20:38:36 +00:00
Dale Johannesen
8813206b7f
Revert 49006 for the moment.
...
llvm-svn: 49046
2008-04-01 20:00:57 +00:00
Evan Cheng
d7f2ac9a0a
Disabling remat of load from gv stub (temporarily) again to fix llvmgcc bootstrap miscompare.
...
llvm-svn: 49037
2008-04-01 07:33:13 +00:00
Evan Cheng
a38ae9c502
Unbreak ARM / Thumb soft FP support.
...
llvm-svn: 49012
2008-04-01 01:50:16 +00:00
Dale Johannesen
1336104c02
Accept 'y' constraint (MMX) in inline asm.
...
llvm-svn: 49011
2008-04-01 00:57:48 +00:00
Dale Johannesen
fa4433be71
Emit exception handling info for functions which are
...
not marked nounwind, or for all functions when -enable-eh
is set, provided the target supports Dwarf EH.
llvm-gcc generates nounwind in the right places; other FEs
will need to do so also. Given such a FE, -enable-eh should
no longer be needed.
llvm-svn: 49006
2008-03-31 23:40:23 +00:00
Evan Cheng
a3ce7b4c76
It's not safe to fold a load from GV stub or constantpool into a two-address use.
...
llvm-svn: 49002
2008-03-31 23:19:51 +00:00
Evan Cheng
38a755499d
Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.
...
llvm-svn: 48995
2008-03-31 20:40:39 +00:00
Evan Cheng
38bfff8a16
Re-apply 48911.
...
llvm-svn: 48977
2008-03-31 07:54:19 +00:00
Nick Lewycky
7d33dc0878
Moved from PR1570.
...
llvm-svn: 48965
2008-03-30 19:07:11 +00:00
Chris Lattner
49e9edd6f6
Fix "Control reaches the end of non-void function" warnings,
...
patch by David Chisnall.
llvm-svn: 48963
2008-03-30 18:22:13 +00:00
Dan Gohman
227e702cae
Fix a tokenfactor node to use the load chain rather than the
...
load value. This fixes PR2177.
llvm-svn: 48932
2008-03-28 23:45:16 +00:00
Evan Cheng
10d0aba260
Backing out 48911 for now. It's breaking stuff.
...
llvm-svn: 48922
2008-03-28 17:49:06 +00:00
Evan Cheng
3b54c5fa08
New entry.
...
llvm-svn: 48912
2008-03-28 07:07:06 +00:00
Evan Cheng
d66e48366f
Load from stub is already re-materializable.
...
llvm-svn: 48911
2008-03-28 06:49:25 +00:00
Evan Cheng
e66720fd57
Code clean up.
...
llvm-svn: 48856
2008-03-27 01:45:11 +00:00
Evan Cheng
aca67f0b29
Allow certain lea instructions to be rematerialized.
...
llvm-svn: 48855
2008-03-27 01:41:09 +00:00
Evan Cheng
1afaf3092f
Remove an unused command line option.
...
llvm-svn: 48854
2008-03-27 01:30:24 +00:00
Roman Levenstein
55b8822511
Use a linked data structure for the uses lists of an SDNode, just like
...
LLVM Value/Use does and MachineRegisterInfo/MachineOperand does.
This allows constant time for all uses list maintenance operations.
The idea was suggested by Chris. Reviewed by Evan and Dan.
Patch is tested and approved by Dan.
On normal use-cases compilation speed is not affected. On very big basic
blocks there are compilation speedups in the range of 15-20% or even better.
llvm-svn: 48822
2008-03-26 12:39:26 +00:00
Evan Cheng
6323ea8467
Fix some SSE4.1 instruction encoding bugs.
...
llvm-svn: 48815
2008-03-26 08:11:49 +00:00
Dale Johannesen
8c1e95810f
Use ## for comment delimiter on darwin x86-32, so
...
llvm's output .s files will go through gcc -std=c99
without triggering preprocesser errors. Approach
suggested by Daveed Vandevoorde.
llvm-svn: 48808
2008-03-25 23:29:30 +00:00
Evan Cheng
6226a78cb1
Smaller function alignment when optimizing for size.
...
llvm-svn: 48805
2008-03-25 22:29:46 +00:00
Evan Cheng
6ee0633a42
Rename option -optimizefor-size to -optimize-size.
...
llvm-svn: 48804
2008-03-25 22:28:39 +00:00
Dan Gohman
2b96ce84aa
Add explicit keywords.
...
llvm-svn: 48801
2008-03-25 22:06:05 +00:00
Dan Gohman
22002efa15
A quick nm audit turned up several fixed tables and objects that were
...
marked read-write. Use const so that they can be allocated in a
read-only segment.
llvm-svn: 48800
2008-03-25 21:45:14 +00:00
Devang Patel
71f3156ea3
Add optimize-for-size knob.
...
llvm-svn: 48793
2008-03-25 21:02:35 +00:00
Dan Gohman
58ad056286
Add CMP32mr and friends to the load-unfolding table. Among
...
other things, this allows the scheduler to unfold a load operand
in the 2008-01-08-SchedulerCrash.ll testcase, so it now successfully
clones the comparison to avoid a pushf+popf.
llvm-svn: 48777
2008-03-25 16:53:19 +00:00
Evan Cheng
3da2a15397
Add \t after .set. Fix by Jay Freeman.
...
llvm-svn: 48753
2008-03-24 23:36:49 +00:00
Bill Wendling
2097b72649
Use the bit size of the operand instead of the hard-coded 32 to generate the
...
mask.
llvm-svn: 48750
2008-03-24 23:16:37 +00:00
Evan Cheng
dbdf48276a
- SSE4.1 extractfps extracts a f32 into a gr32 register. Very useful! Not. Fix the instruction specification and teaches lowering code to use it only when the only use is a store instruction.
...
llvm-svn: 48746
2008-03-24 21:52:23 +00:00