250 Commits

Author SHA1 Message Date
Andrew Trick
68d533cca4 typo (4th checkin for one fix)
llvm-svn: 118913
2010-11-12 18:36:03 +00:00
Andrew Trick
d0c919dcad Fixes PR8287: SD scheduling time. The fix is a failsafe that prevents
catastrophic compilation time in the event of unreasonable LLVM
IR. Code quality is a separate issue--someone upstream needs to do a
better job of reducing to llvm.memcpy. If the situation can be reproduced with
any supported frontend, then it will be a separate bug.

llvm-svn: 118904
2010-11-12 17:50:46 +00:00
Chris Lattner
bcdb696f6c tidy up.
llvm-svn: 118896
2010-11-12 17:24:29 +00:00
Dan Gohman
8e986f9c2f Remove the memmove->memcpy optimization from CodeGen. MemCpyOpt does this.
llvm-svn: 118789
2010-11-11 16:24:49 +00:00
Duncan Sands
f6e5e02c9b Inside the calling convention logic LocVT is always a simple
value type, so there is no point in passing it around using
an EVT.  Use the simpler MVT everywhere.  Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.

llvm-svn: 118167
2010-11-03 11:35:31 +00:00
Devang Patel
e3575ef54f If value map does not have register for an argument then try to find frame index before giving up.
llvm-svn: 118022
2010-11-02 17:19:03 +00:00
Devang Patel
efd9ac540a Use frameindex, if available, as a last resort to emit debug info for a parameter.
llvm-svn: 118020
2010-11-02 17:01:30 +00:00
John Thompson
6115a7f1d4 Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
llvm-svn: 117667
2010-10-29 17:29:13 +00:00
Dale Johannesen
e7f07349e4 Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches
memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet).  No functional change except
for dump output.

llvm-svn: 117413
2010-10-26 23:11:10 +00:00
Devang Patel
7796146304 Assign source ordering to nodes created for StoreInst.
llvm-svn: 117404
2010-10-26 22:14:52 +00:00
Michael J. Spencer
08602f9803 X86: Base _fltused on the FunctionType of the called value instead of the potentially null "CalledFunction". Thanks Duncan!
This is needed for indirect calls.

llvm-svn: 117061
2010-10-21 20:49:23 +00:00
Michael J. Spencer
b9cffadc06 CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args.
This should be the minimum set of functions that could possibly need it.

llvm-svn: 116978
2010-10-21 00:08:21 +00:00
Dan Gohman
c781a28a1d Make CodeGen TBAA-aware.
llvm-svn: 116890
2010-10-20 00:31:05 +00:00
Jim Grosbach
a8c0be5343 Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any
setup they require. Use this for ARM/Darwin to rematerialize the base
pointer from the frame pointer when required. rdar://8564268

llvm-svn: 116879
2010-10-19 23:27:08 +00:00
Michael J. Spencer
e57b670425 X86-Windows: Emit an undefined global __fltused symbol when targeting Windows
if any floating point arguments are passed to an external function.

llvm-svn: 116665
2010-10-16 08:25:41 +00:00
Michael J. Spencer
16ad2c129c Whitespace!
llvm-svn: 116664
2010-10-16 08:25:21 +00:00
Dan Gohman
57f707c6a7 ComputeLinearIndex doesn't need its TLI argument.
llvm-svn: 115792
2010-10-06 16:18:29 +00:00
Devang Patel
1f2abb3af0 Fix code gen crash reported in PR 8235. We still lose debug info for the unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case.
llvm-svn: 115323
2010-10-01 19:00:44 +00:00
Gabor Greif
7d9b24e1ef typo
llvm-svn: 115310
2010-10-01 10:32:19 +00:00
Chris Lattner
97f71e71c9 fix typo
llvm-svn: 115300
2010-10-01 06:54:02 +00:00
Dale Johannesen
c14a1eda84 Massive rewrite of MMX:
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.

Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics. 

MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces.  Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.

The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.

llvm-svn: 115243
2010-09-30 23:57:10 +00:00
Jakob Stoklund Olesen
8f4d623f9a When isel is emitting instructions for an x86 target without CMOV, the CFG is
edited during emission.

If the basic block ends in a switch that gets lowered to a jump table, any
phis at the default edge were getting updated wrong. The jump table data
structure keeps a pointer to the header blocks that wasn't getting updated
after the MBB is split.

This bug was exposed on 32-bit Linux when disabling critical edge splitting in
codegen prepare.

The fix is to uipdate stale MBB pointers whenever a block is split during
emission.

llvm-svn: 115191
2010-09-30 19:44:31 +00:00
John Thompson
83fab695f4 Fix for test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll crash.
llvm-svn: 114767
2010-09-24 22:24:05 +00:00
Michael J. Spencer
87fea6690f Get rid of pop_macro warnings on MSVC.
llvm-svn: 114750
2010-09-24 19:48:47 +00:00
Evan Cheng
d24bf49867 Revert 114634 for now since buildbot claim it broke Clang self-hosting. I doubt it but it's possible it's exposing another bug somewhere.
llvm-svn: 114681
2010-09-23 18:32:19 +00:00
Evan Cheng
8266c28b96 Follow up to r114630. Do not optimize away unconditional branch following a conditional one.
llvm-svn: 114634
2010-09-23 07:18:35 +00:00
Evan Cheng
3866797d9a SDISel should not optimize a unconditional branch following a conditional branch
when the unconditional branch destination is the fallthrough block. The
canonicalization makes it easier to allow optimizations on DAGs to invert
conditional branches. The branch folding pass (and AnalyzeBranch) will clean up
the unnecessary unconditional branches later.

This is one of the patches leading up to disabling codegen prepare critical edge
splitting.

llvm-svn: 114630
2010-09-23 06:51:55 +00:00
Chris Lattner
32ec32b690 finish pushing MachinePointerInfo through selectiondags. At this point,
I think I've audited all uses, so it should be dependable for address spaces,
and the pointer+offset info should also be accurate when there.

llvm-svn: 114464
2010-09-21 18:58:22 +00:00
Bob Wilson
c4345abcc0 Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load
and store intrinsics are represented with MemIntrinsicSDNodes.

llvm-svn: 114454
2010-09-21 17:56:22 +00:00
Chris Lattner
0d430648ae continue MachinePointerInfo'izing, eliminating use of one of the old
getLoad overloads.

llvm-svn: 114443
2010-09-21 16:36:31 +00:00
Chris Lattner
f94de5bf46 reimplement memcpy/memmove/memset lowering to use MachinePointerInfo
instead of srcvalue/offset pairs.  This corrects SV info for mem 
operations whose size is > 32-bits.

llvm-svn: 114401
2010-09-21 05:40:29 +00:00
Chris Lattner
e1fc671030 simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a MachinePointerInfo
llvm-svn: 114397
2010-09-21 04:57:15 +00:00
Chris Lattner
e4db4cad3b chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo,
eliminating some weird "infer a frame address" logic which was dead.

llvm-svn: 114396
2010-09-21 04:53:42 +00:00
Devang Patel
e15f83013d Check bb to ensure that alloca is in separate basic block.
This fixes funcargs.exp regression reported by gdb testsuite.

llvm-svn: 113992
2010-09-15 18:13:55 +00:00
Devang Patel
fbc9fca6ac If dbg.declare from non-entry block is using alloca from entry block then use offset available in StaticAllocaMap to emit DBG_VALUE. Right now, this has no material impact because varible info also collected using offset table maintained in machine module info.
llvm-svn: 113967
2010-09-15 14:48:53 +00:00
John Thompson
ae3a86d6de Added skeleton for inline asm multiple alternative constraint support.
llvm-svn: 113766
2010-09-13 18:15:37 +00:00
Devang Patel
5d3e68d22b Detect undef value early and save unnecessary NodeMap query.
llvm-svn: 112864
2010-09-02 21:29:42 +00:00
Devang Patel
3080c6e860 Tidy up.
llvm-svn: 112858
2010-09-02 21:02:27 +00:00
Devang Patel
46570e6783 Reapply r112623. Included additional check for unused byval argument.
llvm-svn: 112659
2010-08-31 22:22:42 +00:00
Devang Patel
b94251aea0 Revert r112623. It is causing self host build failures.
llvm-svn: 112631
2010-08-31 19:41:03 +00:00
Devang Patel
414cbc940a Remember byval argument's frame index during argument lowering and use this info to emit debug info.
Fixes Radar 8367011.

llvm-svn: 112623
2010-08-31 18:50:09 +00:00
Devang Patel
a1ff33906b Offset is not always unsigned number.
llvm-svn: 112584
2010-08-31 06:12:08 +00:00
Chris Lattner
ecf276b787 remove unions from LLVM IR. They are severely buggy and not
being actively maintained, improved, or extended.

llvm-svn: 112356
2010-08-28 04:09:24 +00:00
Dan Gohman
507f5a8ae7 Completely disable tail calls when fast-isel is enabled, as fast-isel
doesn't currently support dealing with this.

llvm-svn: 112341
2010-08-28 00:51:03 +00:00
Devang Patel
eb68981283 Simplify.
llvm-svn: 112305
2010-08-27 22:25:51 +00:00
Devang Patel
24ad069401 Revert r112213. It is not needed.
llvm-svn: 112242
2010-08-26 23:35:15 +00:00
Devang Patel
9d4933f6e0 If node is not available then use FuncInfo.ValueMap to emit debug info for byval parameter.
llvm-svn: 112238
2010-08-26 22:53:27 +00:00
Devang Patel
81e0e2622b Speculatively revert r112207.
llvm-svn: 112216
2010-08-26 20:33:42 +00:00
Devang Patel
4dd806f321 80 col.
llvm-svn: 112215
2010-08-26 20:32:32 +00:00
Devang Patel
d2b70bf32b Update DanglingDebugInfo so that it can be used to track llvm.dbg.declare also.
llvm-svn: 112213
2010-08-26 20:06:46 +00:00