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6921 Commits

Author SHA1 Message Date
Jeff Cohen
3ffd34cac6 Silence VC++ warning. 
llvm-svn: 35975
 2007-04-13 22:52:03 +00:00
Chris Lattner
e7cab7b7a4 arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes. 
llvm-svn: 35962
 2007-04-13 06:50:55 +00:00
Reid Spencer
d31093d340 Implement review feedback .. don't double search a set. 
llvm-svn: 35957
 2007-04-12 21:57:15 +00:00
Reid Spencer
0325471d3c Provide support for intrinsics that lower themselves to a function body. 
This can happen for intrinsics that are overloaded.  In such cases it is
necessary to emit a function prototype before the body of the function
that calls the intrinsic and to ensure we don't emit it multiple times.

llvm-svn: 35954
 2007-04-12 21:00:45 +00:00
Lauro Ramos Venancio
6c5f53f6ac Implement Thread Local Storage (TLS) in CBackend. 
llvm-svn: 35951
 2007-04-12 18:42:08 +00:00
Chris Lattner
2b6b79b896 Fix mmx paddq, add support for the 'y' register class, though it isn't tested. 
llvm-svn: 35940
 2007-04-12 04:14:49 +00:00
Chris Lattner
b97b122176 Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.ll 
llvm-svn: 35926
 2007-04-11 22:29:46 +00:00
Chris Lattner
e9a9a3f172 Fix incorrect fall-throughs in addr mode code. This fixes CodeGen/ARM/arm-negative-stride.ll 
llvm-svn: 35909
 2007-04-11 16:17:12 +00:00
Chris Lattner
b7448f6187 done 
llvm-svn: 35884
 2007-04-11 05:34:00 +00:00
Reid Spencer
2792e203c5 For PR1146: 
Put the parameter attributes in their own ParamAttr name space. Adjust the
rest of llvm as a result.

llvm-svn: 35877
 2007-04-11 02:44:20 +00:00
Bill Wendling
3b1189afbf Add support for our first SSSE3 instruction "pmulhrsw". 
llvm-svn: 35869
 2007-04-10 22:10:25 +00:00
Chris Lattner
60f3ece40f new micro optzn 
llvm-svn: 35867
 2007-04-10 21:14:01 +00:00
Chris Lattner
3bbd376057 restore support for negative strides 
llvm-svn: 35859
 2007-04-10 03:48:29 +00:00
Chris Lattner
98199016ae remove dead target hooks 
llvm-svn: 35846
 2007-04-09 23:33:39 +00:00
Chris Lattner
3f9ff05309 remove some dead hooks 
llvm-svn: 35845
 2007-04-09 23:31:19 +00:00
Chris Lattner
ae6e2c0ee5 remove some dead target hooks, subsumed by isLegalAddressingMode 
llvm-svn: 35840
 2007-04-09 22:27:04 +00:00
Chris Lattner
b4ef9c8be3 Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2 
are always unsupported.

llvm-svn: 35835
 2007-04-09 22:10:05 +00:00
Jeff Cohen
f489bef844 When the number of elements is zero, don't malloc 32GB on 64-bit systems. 
Fixes unexpected failures on FreeBSD/amd64 of:
  CFrontend/2005-09-24-BitFieldCrash.c:
  CFrontend/2007-02-04-EmptyStruct.c:
  CFrontend/2007-03-26-ZeroWidthBitfield.c:
  CodeGen/Generic/2005-10-18-ZeroSizeStackObject.ll:

llvm-svn: 35828
 2007-04-09 19:26:30 +00:00
Reid Spencer
2660b8dccb For PR1146: 
Adapt handling of parameter attributes to use the new ParamAttrsList class.

llvm-svn: 35814
 2007-04-09 06:17:21 +00:00
Chris Lattner
de148c7887 move a bunch of register constraints from being handled by 
getRegClassForInlineAsmConstraint to being handled by
getRegForInlineAsmConstraint.  This allows us to let the llvm register allocator
allocate, which gives us better code.  For example, X86/2007-01-29-InlineAsm-ir.ll
used to compile to:

_run_init_process:
        subl $4, %esp
        movl %ebx, (%esp)
        xorl %ebx, %ebx
        movl $11, %eax
        movl %ebx, %ecx
        movl %ebx, %edx
        # InlineAsm Start
        push %ebx ; movl %ebx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

Now we get:
_run_init_process:
        xorl %ecx, %ecx
        movl $11, %eax
        movl %ecx, %edx
        # InlineAsm Start
        push %ebx ; movl %ecx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

llvm-svn: 35804
 2007-04-09 05:49:22 +00:00
Chris Lattner
b940a717ac implement support for CodeGen/X86/inline-asm-x-scalar.ll:test3 - i32/i64 values 
used with x constraints.

llvm-svn: 35803
 2007-04-09 05:31:48 +00:00
Chris Lattner
e2d3bf8ecf implement CodeGen/X86/inline-asm-x-scalar.ll 
llvm-svn: 35799
 2007-04-09 05:11:28 +00:00
Reid Spencer
a72beea861 Squelch a warning about mismatch between sign of constant and sign of return 
type.

llvm-svn: 35674
 2007-04-04 22:07:24 +00:00
Evan Cheng
44488cb676 Implement inline asm modifier P. 
llvm-svn: 35640
 2007-04-04 00:13:29 +00:00
Evan Cheng
d5956e4409 Typo. 
llvm-svn: 35639
 2007-04-04 00:06:07 +00:00
Bill Wendling
a4aa65bc38 Adding more MMX instructions. 
llvm-svn: 35638
 2007-04-03 23:48:32 +00:00
Chris Lattner
78271f0596 make a new missing features section 
llvm-svn: 35637
 2007-04-03 23:41:34 +00:00
Evan Cheng
2cd9df6983 Remove unused constant pool entries. 
llvm-svn: 35635
 2007-04-03 23:39:48 +00:00
Bill Wendling
ff2c460267 Updated 
llvm-svn: 35634
 2007-04-03 23:37:20 +00:00
Evan Cheng
db15aa24f9 Fixed a bug that causes codegen of noop like add r0, r0, #0. 
llvm-svn: 35627
 2007-04-03 21:31:21 +00:00
Nicolas Geoffray
681a87d9e8 Starting implementation of the ELF32 ABI specification of varargs handling. 
LowerVASTART emits the right code if the subtarget is ELF32, the other intrinsics
(VAARG, VACOPY and VAEND) are not yet implemented.

llvm-svn: 35625
 2007-04-03 13:59:52 +00:00
Nicolas Geoffray
5897c064a6 The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules 
as the 64-bit PowerOpen ABI" (Reference http://www.linux-foundation.org/spec/ELF/ppc64/).
Change all ELF tests to ELF32.

llvm-svn: 35624
 2007-04-03 12:35:28 +00:00
Nicolas Geoffray
45c3620d12 Addition to the previous commit for getCalleeSavedRegClasses: 
"The ELF ABI specifies F1-F8 registers as argument registers for double, not
F1-F10. This affects only ELF, not MachO."

llvm-svn: 35623
 2007-04-03 10:57:49 +00:00
Nicolas Geoffray
b7c0895529 The ELF ABI specifies F1-F8 registers as argument registers for double, not 
F1-F10. This affects only ELF, not MachO.

llvm-svn: 35622
 2007-04-03 10:27:07 +00:00
Evan Cheng
16696f0ad8 Inverted logic. 
llvm-svn: 35619
 2007-04-03 06:44:25 +00:00
Bill Wendling
a2eabd50c0 Changed to new MMX_ recipes. 
llvm-svn: 35617
 2007-04-03 06:18:31 +00:00
Bill Wendling
ca2124e5a9 Add FEMMS and ADDQ. Renamed MMX recipes to prepend the MMX_ to them. 
llvm-svn: 35616
 2007-04-03 06:00:37 +00:00
Chris Lattner
4d702a890c Arm supports negative strides as well, add them. This lets us compile: 
CodeGen/ARM/arm-negative-stride.ll to:

LBB1_2: @bb
        str r1, [r3, -r0, lsl #2]
        add r0, r0, #1
        cmp r0, r2
        bne LBB1_2      @bb

llvm-svn: 35609
 2007-04-03 00:13:57 +00:00
Dale Johannesen
e1c3dc7c78 fix off by 1 error in displacement computation 
llvm-svn: 35602
 2007-04-02 20:31:06 +00:00
Chris Lattner
726d461daf fix the CodeGen/ARM/2007-03-13-InstrSched.ll regression: allow IV's with scales 
to be folded into non-store instructions.

llvm-svn: 35601
 2007-04-02 18:51:18 +00:00
Chris Lattner
ff9caac83e add support for the 'w' inline asm register class. 
llvm-svn: 35598
 2007-04-02 17:24:08 +00:00
Chris Lattner
dbce9ef4b8 Fix a bug which caused us to never be able to use signed comparisons for 
equality comparisons of a constant.  This allows us to codegen the 'sintzero'
loop in PR1288 as:

LBB1_1: ;cond_next
        li r4, 0
        addi r2, r2, 1
        stw r4, 0(r3)
        addi r3, r3, 4
        cmpwi cr0, r2, -1
        bne cr0, LBB1_1 ;cond_next

instead of:

LBB1_1: ;cond_next
        addi r2, r2, 1
        li r4, 0
        xoris r5, r2, 65535
        stw r4, 0(r3)
        addi r3, r3, 4
        cmplwi cr0, r5, 65535
        bne cr0, LBB1_1 ;cond_next

This implements CodeGen/PowerPC/compare-simm.ll, and also cuts 74
instructions out of kc++.

llvm-svn: 35590
 2007-04-02 05:59:42 +00:00
Lauro Ramos Venancio
7e21418680 - Divides the comparisons in two types: comparisons that only use N and Z 
flags (ARMISD::CMPNZ) and comparisons that use all flags (ARMISD::CMP).
- Defines the instructions: TST, TEQ (ARM) and TST (Thumb).

llvm-svn: 35573
 2007-04-02 01:30:03 +00:00
Chris Lattner
4fb170e47b fix breakage from last night, simplify code. 
llvm-svn: 35560
 2007-04-01 20:49:36 +00:00
Evan Cheng
949a34fbad Add i16 address mode. 
llvm-svn: 35551
 2007-04-01 08:06:46 +00:00
Andrew Lenharth
ff1ff37be9 Readme 
llvm-svn: 35533
 2007-03-31 15:05:44 +00:00
Anton Korobeynikov
db09256c9f Consistency with native compilers 
llvm-svn: 35532
 2007-03-31 13:11:52 +00:00
Bill Wendling
8f16f4bf9c Fix comment. 
llvm-svn: 35531
 2007-03-31 09:36:12 +00:00
Chris Lattner
cea5e599ed add a note 
llvm-svn: 35530
 2007-03-31 07:06:25 +00:00
Bill Wendling
0cba5d3c15 Match GCC's MMX calling convention. 
llvm-svn: 35523
 2007-03-31 01:03:53 +00:00