Commit Graph

3096 Commits

Author SHA1 Message Date
Douglas Gregor
8a1c4fd8ce Fix comment for gen-clang-decl-nodes tblgen backend, from Michael Han
llvm-svn: 123833
2011-01-19 15:57:47 +00:00
Owen Anderson
ed4acd59cb When matching asm operands, always try to match the most restricted type first.
Unfortunately, while this is the "right" thing to do, it breaks some ARM
asm parsing tests because MemMode5 and ThumbMemModeReg are ambiguous.  This
is tricky to resolve since neither is a subset of the other.

XFAIL the test for now.  The old way was broken in other ways, just ways
we didn't happen to be testing, and our ARM asm parsing is going to require
significant revisiting at a later point anyways.

llvm-svn: 123786
2011-01-18 23:01:21 +00:00
Bruno Cardoso Lopes
94247155c4 Add support for parsing and encoding ARM's official syntax for the BFI instruction
llvm-svn: 123770
2011-01-18 20:45:56 +00:00
Daniel Dunbar
b8debfe450 Formatting tweak.
llvm-svn: 123718
2011-01-18 01:59:30 +00:00
Bob Wilson
8ca3bc94ca Fix some tablegen issues to allow using zero_reg for InstAlias definitions.
This is needed to allow an InstAlias for an instruction with an "OptionalDef"
result register (like ARM's cc_out) where you want to set the optional register
to reg0.

llvm-svn: 123490
2011-01-14 22:58:09 +00:00
Owen Anderson
18dfab2332 Add support to the ARM MC infrastructure to support mcr and friends. This requires supporting
the symbolic immediate names used for these instructions, fixing their pretty-printers, and
adding proper encoding information for them.

With this, we can properly pretty-print and encode assembly like:
	mrc p15, #0, r3, c13, c0, #3

Fixes <rdar://problem/8857858>.

llvm-svn: 123404
2011-01-13 21:46:02 +00:00
Evan Cheng
cc474b4864 Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a step
in the right direction. It eliminated some hacks and will unblock codegen
work. But it's far from being done. It doesn't reject illegal expressions,
e.g. (FOO - :lower16:BAR). It also doesn't work in Thumb2 mode at all.

llvm-svn: 123369
2011-01-13 07:58:56 +00:00
Daniel Dunbar
f14e43062c McARM: Write a silly Python script to compute some hard coded info from the
generated ARM match table, which is substantially more efficient than dealing
with tblgen.

llvm-svn: 123252
2011-01-11 19:06:26 +00:00
Daniel Dunbar
719295c2e2 MC/AsmMatcher: Fix indirect 80-col viola.
llvm-svn: 123174
2011-01-10 15:26:11 +00:00
Francois Pichet
2094592a6f On Windows, replace each occurrence of '\' by '\\' on the replacement string. This is necessary to prevent re.sub from replacing escape sequences occurring in path.
For example:

llvm\tools\clang\test
was replaced by
llvm <tab> ools\clang <tab> est

llvm-svn: 123070
2011-01-08 18:09:48 +00:00
Eric Christopher
4580fc9a0d I don't think I could find a 10.2.x box if I tried.
llvm-svn: 123051
2011-01-08 01:52:20 +00:00
Bob Wilson
4e879f0f00 Use __builtin_shufflevector to implement vget_low and vget_high intrinsics.
This was suggested by Edmund Grimley Evans in pr8411.

llvm-svn: 123043
2011-01-07 23:40:49 +00:00
David Greene
e9b2fb7e0d Rename lisp-like functions as suggested by Gabor Greif as loooong time
ago.  This is both easier to learn and easier to read.

llvm-svn: 123001
2011-01-07 17:05:37 +00:00
Francois Pichet
7b62eeaf56 Disable r122754 on Windows: was causing all lit tests to fail.
llvm-svn: 122808
2011-01-04 10:23:42 +00:00
David Greene
124695aed0 Reapply 122341 to fix PR8199 now that clang changes are in.
llvm-svn: 122754
2011-01-03 17:30:25 +00:00
Jim Grosbach
ad1b872c44 Trailing whitespace.
llvm-svn: 122542
2010-12-24 05:06:32 +00:00
Chris Lattner
01e8c46349 Flag -> Glue, the ongoing saga
llvm-svn: 122513
2010-12-23 18:28:41 +00:00
Chris Lattner
b607e7deda flags -> glue for selectiondag
llvm-svn: 122509
2010-12-23 17:24:32 +00:00
Chris Lattner
fb9ff7a4ff sdisel flag -> glue.
llvm-svn: 122507
2010-12-23 17:13:18 +00:00
Chris Lattner
15e8133b87 continue renaming flag -> glue.
llvm-svn: 122506
2010-12-23 17:03:20 +00:00
Jeffrey Yasskin
a199652a3e Change all self assignments X=X to (void)X, so that we can turn on a
new gcc warning that complains on self-assignments and
self-initializations.

llvm-svn: 122458
2010-12-23 00:58:24 +00:00
Bill Wendling
f897a6bb16 Default to armv7 instead of armv6.
llvm-svn: 122457
2010-12-23 00:49:18 +00:00
David Greene
33a91c0c9a Revert 122341. It breaks some darwin tests.
llvm-svn: 122346
2010-12-21 17:25:43 +00:00
David Greene
28140b5288 Fix PR 8199. This patch prepends the build tool dir to LLVM programs
being tested.  This ensures that we test the tools just built and not
some random tools that might happen to be in the user's PATH.  This
makes LLVM testing much more stable and predictable.

llvm-svn: 122341
2010-12-21 16:55:53 +00:00
Jim Grosbach
fda5c187d6 Tidy up a bit. Trailing whitespace, hard tabs and 80-columns.
llvm-svn: 122337
2010-12-21 16:16:00 +00:00
Chris Lattner
65c5243bd6 rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
something that just glues two nodes together, even if it is
sometimes used for flags.

llvm-svn: 122310
2010-12-21 02:38:05 +00:00
Michael J. Spencer
4701f704be Support/PathV1: Deprecate get{Basename,Dirname,Suffix}.
llvm-svn: 122157
2010-12-18 22:23:07 +00:00
Owen Anderson
7103acd18e Revert r122143 through r122140, which collectively broke the LLVMC tests on
the buildbots.

llvm-svn: 122149
2010-12-18 07:37:18 +00:00
Michael J. Spencer
6d64a36ced Support/PathV1: Deprecate get{Basename,Dirname,Suffix}.
llvm-svn: 122141
2010-12-18 04:13:36 +00:00
Bob Wilson
8d93d7b4fd Neon intrinsic tests need to be compiled for Cortex-A9 for f16 support.
llvm-svn: 122015
2010-12-17 01:21:03 +00:00
Michael J. Spencer
86f6a9ac6e MemoryBuffer now return an error_code and returns a OwningPtr<MemoryBuffer> via an out parm.
llvm-svn: 121958
2010-12-16 03:29:14 +00:00
Bob Wilson
7e64a19960 Teach the Neon intrinsic generator to widen half-precision float types.
This isn't currently used for anything but I ran into it when experimenting
with some changes, and it might be useful in the future.

llvm-svn: 121911
2010-12-15 23:16:25 +00:00
Bob Wilson
3e4aa8ec69 Add a Neon intrinsic test generator.
This is still a WIP.  It's already good enough to expose a few bugs, though.

llvm-svn: 121868
2010-12-15 16:58:45 +00:00
Bob Wilson
114df2f88a Fix Neon intrinsic immediate range checking for some double-register operands.
Some quad-register intrinsics with lane operands only take a double-register
operand for the vector containing the lane.  The valid range of lane numbers
is then half as big as you would expect from the quad-register type.
Note: This currently has no effect because those intrinsics are now handled
entirely in the header file using __builtin_shufflevector, which does its own
range checking, but I want to use this for generating tests.

llvm-svn: 121867
2010-12-15 16:58:42 +00:00
Chris Lattner
e1ee3c537d various cleanups to tblgen, patch by Garrison Venn!
llvm-svn: 121837
2010-12-15 04:48:22 +00:00
Mikhail Glushenkov
2e471b81da llvmc: make switch options ZeroOrMore by default.
llvm-svn: 121822
2010-12-15 01:21:59 +00:00
Jakob Stoklund Olesen
22ff831572 Introduce TargetRegisterInfo::getOverlaps(Reg), returning a list of all
registers that alias Reg, including itself. This is almost the same as the
existing getAliasSet() method, except for the inclusion of Reg.

The name matches the reflexive TRI::regsOverlap(x, y) relation.

It is very common to do stuff to a register and all its aliases:

  stuff(Reg)
  for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias)
    stuff(*Alias);

That can now be written as the simpler:

  for (const unsigned *Alias = TRI->getOverlaps(Reg); *Alias; ++Alias)
    stuff(*Alias);

This change requires a bit more constant space for the alias lists because Reg
is included and because the empty alias list cannot be shared any longer.

If the getAliasSet method is eventually removed, this space can be reclaimed by
sharing overlap lists. For instance, %rax and %eax have identical overlap sets.

llvm-svn: 121800
2010-12-14 23:03:42 +00:00
Jim Grosbach
1e943cc60d Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755
llvm-svn: 121798
2010-12-14 22:28:03 +00:00
Bill Wendling
61720b79f9 The tLDR et al instructions were emitting either a reg/reg or reg/imm
instruction based on the t_addrmode_s# mode and what it returned. There is some
obvious badness to this. In particular, it's hard to do MC-encoding when the
instruction may change out from underneath you after the t_addrmode_s# variable
is finally resolved.

The solution is to revert a long-ago change that merged the reg/reg and reg/imm
versions. There is the addition of several new addressing modes. They no longer
have extraneous operands associated with them. I.e., if it's reg/reg we don't
have to have a dummy zero immediate tacked on to the SDNode.

There are some obvious cleanups here, which will happen shortly.

llvm-svn: 121747
2010-12-14 03:36:38 +00:00
Owen Anderson
c84f8c23b3 Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering much later, which makes the entire
process cleaner.

llvm-svn: 121735
2010-12-14 00:36:49 +00:00
Bob Wilson
33e5e902b0 Remove the rest of the *_sfp Neon instruction patterns.
Use the same COPY_TO_REGCLASS approach as for the 2-register *_sfp instructions.
This change made a big difference in the code generated for the
CodeGen/Thumb2/cross-rc-coalescing-2.ll test: The coalescer is still doing
a fine job, but some instructions that were previously moved outside the loop
are not moved now.  It's using fewer VFP registers now, which is generally
a good thing, so I think the estimates for register pressure changed and that
affected the LICM behavior.  Since that isn't obviously wrong, I've just
changed the test file.  This completes the work for Radar 8711675.

llvm-svn: 121730
2010-12-13 23:02:37 +00:00
Owen Anderson
af1dde2673 Revert r121721, which broke buildbots.
llvm-svn: 121726
2010-12-13 22:51:08 +00:00
Owen Anderson
c298c8ed4d Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. Provide correct fixups for Thumb2 ADR,
which is _of course_ different from ARM ADR fixups, or any other Thumb2 fixup.

llvm-svn: 121721
2010-12-13 22:29:52 +00:00
Owen Anderson
4ec912b842 In Thumb2, direct branches can be encoded as either a "short" conditional branch with a null predicate, or
as a "long" direct branch.  While the mnemonics are the same, they encode the branch offset differently, and
the Darwin assembler appears to prefer the "long" form for direct branches.  Thus, in the name of bitwise
equivalence, provide encoding and fixup support for it.

llvm-svn: 121710
2010-12-13 19:31:11 +00:00
Bill Wendling
16e7d7bf2f Add support for using the `!if' operator when initializing variables:
class A<bit a, bits<3> x, bits<3> y> {
    bits<3> z;
    let z = !if(a, x, y);
  }

The variable z will get the value of x when 'a' is 1 and 'y' when a is '0'.

llvm-svn: 121666
2010-12-13 01:46:19 +00:00
Bill Wendling
ea9c4c1e11 Move <map> include out of .h and into .cpp.
llvm-svn: 121661
2010-12-13 01:05:54 +00:00
Bill Wendling
1b8163a33e Merge DEBUG statements.
llvm-svn: 121660
2010-12-13 01:03:49 +00:00
Chris Lattner
8e4bbafeb3 eliminate the Records global variable, patch by Garrison Venn!
llvm-svn: 121659
2010-12-13 00:23:57 +00:00
Chris Lattner
5e7e7c817c clean up RecordKeeper::getAllDerivedDefinitions, patch by Garrison Venn!
llvm-svn: 121658
2010-12-13 00:20:52 +00:00
Bill Wendling
59f4c83400 Get rid of ellipses.
llvm-svn: 121589
2010-12-10 22:54:30 +00:00