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1298 Commits

Author SHA1 Message Date
Evan Cheng
192fc19379 Do not select tSXTB / tSXTH in thumb2 mode. 
llvm-svn: 76600
 2009-07-21 18:15:26 +00:00
Evan Cheng
949c2404a2 Fix ARM isle code that optimize multiply by constants which are power-of-2 +/- 1. 
llvm-svn: 76520
 2009-07-21 00:31:12 +00:00
David Goodwin
c5ee8fbaa7 CMP and TST define CPSR, not use it. 
llvm-svn: 76489
 2009-07-20 22:13:31 +00:00
Bill Wendling
0407ebb4f7 Rename Mangler linkage enums to something less gross. 
llvm-svn: 76456
 2009-07-20 19:41:27 +00:00
David Goodwin
d5865e6c60 Use t2LDRri12 for frame index loads. 
llvm-svn: 76424
 2009-07-20 15:55:39 +00:00
Evan Cheng
2125e12632 Fix PR4567. Thumb1 target was using the wrong instruction to handle sp = sub fp, #c. 
llvm-svn: 76401
 2009-07-20 06:59:32 +00:00
Evan Cheng
2f6b299d6f Model fpscr to prevent fcmped / fcmpezs etc from being deleted. 
llvm-svn: 76390
 2009-07-20 02:12:31 +00:00
Bill Wendling
1a10a060cb Add plumbing for the `linker_private' linkage type. This type is meant for 
"private" symbols which the assember shouldn't strip, but which the linker may
remove after evaluation. This is mostly useful for Objective-C metadata.

This is plumbing, so we don't have a use of it yet. More to come, etc.

llvm-svn: 76385
 2009-07-20 01:03:30 +00:00
Evan Cheng
fd384e9493 Fix a regression from 76124. Thumb1 instructions default to S bit being true. 
llvm-svn: 76374
 2009-07-19 19:16:46 +00:00
Daniel Dunbar
aca95eac72 Add dependencies from TargetInfo onto .td generation. 
- Shouldn't really be necessary, but currently .inc files get included into
   some main target headers.

llvm-svn: 76349
 2009-07-19 00:21:12 +00:00
Daniel Dunbar
960ef321ca Put Target definitions inside Target specific header, and llvm namespace. 
llvm-svn: 76344
 2009-07-18 23:03:22 +00:00
Jeffrey Yasskin
1669f312b5 r76102 added the MachineCodeEmitter::processDebugLoc call and called it from 
the X86 Emitter.  This patch extends that to the rest of the targets that can
write to a MachineCodeEmitter: ARM, Alpha, and PPC.

llvm-svn: 76211
 2009-07-17 18:49:39 +00:00
Evan Cheng
490d2cc5a4 Fix tSUBspi operand definition. It reads and writes sp, which is a high register. 
llvm-svn: 76155
 2009-07-17 05:43:12 +00:00
Anton Korobeynikov
dc39f4fff8 Emit cross regclass register moves for thumb2. 
Minor code duplication cleanup.

llvm-svn: 76124
 2009-07-16 23:26:06 +00:00
Evan Cheng
7a6b20df7f Let callers decide the sub-register index on the def operand of rematerialized instructions. 
Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.

llvm-svn: 75900
 2009-07-16 09:20:10 +00:00
Daniel Dunbar
90536f6737 Kill off <TARGET>MachineModule variables, and <TARGETASMPRINTER>ForceLink 
variables.
 - Module initialization functions supplanted the need for these.

llvm-svn: 75886
 2009-07-16 01:55:13 +00:00
Daniel Dunbar
4771afe104 Lift addAssemblyEmitter into LLVMTargetMachine. 
- No functionality change.

llvm-svn: 75859
 2009-07-15 23:34:19 +00:00
Daniel Dunbar
d85e8b6334 Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine. 
- No intended functionality change.

llvm-svn: 75848
 2009-07-15 22:33:19 +00:00
Daniel Dunbar
3cff9fe21d Remove old style hacks to register AsmPrinter into TargetMachine. 
- No intended functionality change.

llvm-svn: 75843
 2009-07-15 22:01:32 +00:00
Daniel Dunbar
5707dd7f73 Reapply TargetRegistry refactoring commits. 
--- Reverse-merging r75799 into '.':
 U   test/Analysis/PointerTracking
U    include/llvm/Target/TargetMachineRegistry.h
U    include/llvm/Target/TargetMachine.h
U    include/llvm/Target/TargetRegistry.h
U    include/llvm/Target/TargetSelect.h
U    tools/lto/LTOCodeGenerator.cpp
U    tools/lto/LTOModule.cpp
U    tools/llc/llc.cpp
U    lib/Target/PowerPC/PPCTargetMachine.h
U    lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U    lib/Target/PowerPC/PPCTargetMachine.cpp
U    lib/Target/PowerPC/PPC.h
U    lib/Target/ARM/ARMTargetMachine.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/ARM/ARMTargetMachine.h
U    lib/Target/ARM/ARM.h
U    lib/Target/XCore/XCoreTargetMachine.cpp
U    lib/Target/XCore/XCoreTargetMachine.h
U    lib/Target/PIC16/PIC16TargetMachine.cpp
U    lib/Target/PIC16/PIC16TargetMachine.h
U    lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U    lib/Target/Alpha/AlphaTargetMachine.cpp
U    lib/Target/Alpha/AlphaTargetMachine.h
U    lib/Target/X86/X86TargetMachine.h
U    lib/Target/X86/X86.h
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U    lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U    lib/Target/X86/X86TargetMachine.cpp
U    lib/Target/MSP430/MSP430TargetMachine.cpp
U    lib/Target/MSP430/MSP430TargetMachine.h
U    lib/Target/CppBackend/CPPTargetMachine.h
U    lib/Target/CppBackend/CPPBackend.cpp
U    lib/Target/CBackend/CTargetMachine.h
U    lib/Target/CBackend/CBackend.cpp
U    lib/Target/TargetMachine.cpp
U    lib/Target/IA64/IA64TargetMachine.cpp
U    lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U    lib/Target/IA64/IA64TargetMachine.h
U    lib/Target/IA64/IA64.h
U    lib/Target/MSIL/MSILWriter.cpp
U    lib/Target/CellSPU/SPUTargetMachine.h
U    lib/Target/CellSPU/SPU.h
U    lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U    lib/Target/CellSPU/SPUTargetMachine.cpp
U    lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
U    lib/Target/Mips/MipsTargetMachine.cpp
U    lib/Target/Mips/MipsTargetMachine.h
U    lib/Target/Mips/Mips.h
U    lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U    lib/Target/Sparc/SparcTargetMachine.cpp
U    lib/Target/Sparc/SparcTargetMachine.h
U    lib/ExecutionEngine/JIT/TargetSelect.cpp
U    lib/Support/TargetRegistry.cpp

llvm-svn: 75820
 2009-07-15 20:24:03 +00:00
Stuart Hastings
ef732a2bea Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build. 
Will revert 75770 in the llvm-gcc trunk.

llvm-svn: 75799
 2009-07-15 17:27:11 +00:00
David Goodwin
e0552265a6 Thumb-2 only support [base_reg + offset_reg] addressing, not [base_reg - offset_reg]. 
llvm-svn: 75789
 2009-07-15 15:50:19 +00:00
Daniel Dunbar
23bba6d075 Replace large swaths of copy-n-paste code with obvious helper function... 
- Which was already present in the module!

 - I skipped this xform for Alpha, since it runs an extra pass during assembly
   emission, but not when emitting assembly via the DumpAsm flag.

 - No functionality change.

--
ddunbar@giles:llvm$ svn diff | grep '^- ' | sort | uniq -c
  18 -      PM.add(AsmPrinterCtor(ferrs(), *this, true));
  18 -    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
  18 -    if (AsmPrinterCtor)
  18 -  if (DumpAsm) {
  18 -  }
ddunbar@giles:llvm$ svn diff | grep '^+ ' | sort | uniq -c
  18 +    addAssemblyEmitter(PM, OptLevel, true, ferrs());
  18 +  if (DumpAsm)
--

llvm-svn: 75782
 2009-07-15 12:49:15 +00:00
Daniel Dunbar
2b67b4ab9f Kill off old (TargetMachine level, not Target level) match quality functions. 
llvm-svn: 75780
 2009-07-15 12:26:05 +00:00
Daniel Dunbar
51b81c9930 Provide TargetMachine implementations with reference to Target they were created 
from.
 - This commit is almost entirely propogating the reference through the
   TargetMachine subclasses' constructor calls.

llvm-svn: 75778
 2009-07-15 12:11:05 +00:00
Daniel Dunbar
a2af870bd7 Register Target's TargetMachine and AsmPrinter in the new registry. 
- This abuses TargetMachineRegistry's constructor for now, this will get
   cleaned up in time.

llvm-svn: 75762
 2009-07-15 09:22:31 +00:00
Daniel Dunbar
b70d5cdfe1 Add TargetInfo libraries for all targets. 
- Intended to match current TargetMachine implementations.

 - No facilities for linking these in yet.

llvm-svn: 75751
 2009-07-15 06:35:19 +00:00
Chris Lattner
151877b93e convert arm/darwin stubs to use the mangler to synthesize all the names instead of 
doing it with printSuffixedName.

llvm-svn: 75741
 2009-07-15 04:41:01 +00:00
Chris Lattner
499fe29f12 fix an arm codegen bug (the same as PR4482 on ppc) where available_externally 
symbols were not getting stubs.  While I'm at it, add a big testcase for
stub generation to make sure I don't break anything.

llvm-svn: 75737
 2009-07-15 04:12:33 +00:00
Chris Lattner
dd01e838c8 convert [Hidden]GVNonLazyPtrs to compute the global and stub names 
with the mangler (like x86 and ppc), instead of going through 
printSuffixedName.

llvm-svn: 75736
 2009-07-15 03:12:43 +00:00
Owen Anderson
8c85061ee6 Move EVER MORE stuff over to LLVMContext. 
llvm-svn: 75703
 2009-07-14 23:09:55 +00:00
Bob Wilson
fe2d3828e9 Fix bad indentation and 80-col violation. 
llvm-svn: 75686
 2009-07-14 21:45:58 +00:00
David Goodwin
0d1423fb22 Check for PRE_INC and POST_INC. 
llvm-svn: 75683
 2009-07-14 21:29:29 +00:00
David Greene
9c8a1b9b90 Have asm printers use formatted_raw_ostream directly to avoid a 
dynamic_cast<>.

llvm-svn: 75670
 2009-07-14 20:18:05 +00:00
David Goodwin
8cd9c88760 hasThumb2() does not mean we are compiling for thumb, must also check isThumb(). 
llvm-svn: 75660
 2009-07-14 18:48:51 +00:00
Bob Wilson
8682c6607e Remove an extra space. 
llvm-svn: 75658
 2009-07-14 18:44:34 +00:00
Chris Lattner
6ec578688d Reapply my previous asmprinter changes now with more testing and two 
additional bug fixes:

1. The bug that everyone hit was a problem in the asmprinter where it
   would remove $stub but keep the L prefix on a name when emitting the
   indirect symbol.  This is easy to fix by keeping the name of the stub
   and the name of the symbol in a StringMap instead of just keeping a
   StringSet and trying to reconstruct it late.

2. There was a problem printing the personality function.  The current
   logic to print out the personality function from the DWARF information
   is a bit of a cesspool right now that duplicates a bunch of other 
   logic in the asm printer.  The short version of it is that it depends
   on emitting both the L and _ prefix for symbols (at least on darwin)
   and until I can untangle it, it is best to switch the mangler back to
   emitting both prefixes.

llvm-svn: 75646
 2009-07-14 18:17:16 +00:00
Torok Edwin
f955a6ef49 llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. 
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").

llvm-svn: 75640
 2009-07-14 16:55:14 +00:00
Daniel Dunbar
84d593320b Revert r75615, which depended on 75610. 
--- Reverse-merging r75615 into '.':
U    lib/Target/XCore/XCoreAsmPrinter.cpp
U    lib/Target/PIC16/PIC16AsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
U    lib/Target/MSP430/MSP430AsmPrinter.cpp
U    lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U    lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U    lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U    lib/Target/MSIL/MSILWriter.cpp
U    lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U    lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp

llvm-svn: 75637
 2009-07-14 16:12:13 +00:00
Chris Lattner
8aa18612e2 Rename getValueName -> getMangledName. 
llvm-svn: 75615
 2009-07-14 06:18:50 +00:00
Evan Cheng
b8666f7abc 1. In Thumb mode, select tBx instead of ARM variants. 
2. BX does not "use" the link register, it defines it.
3. Fix a couple more places in thumb td file that still uses pre-UAL syntax.

llvm-svn: 75585
 2009-07-14 01:49:27 +00:00
David Goodwin
88f38c0380 Fix detection of valid BFC immediates. 
llvm-svn: 75576
 2009-07-14 00:57:56 +00:00
Bob Wilson
a8d7dde3ce Fix an obvious copy-and-paste error. 
llvm-svn: 75566
 2009-07-14 00:23:44 +00:00
Bob Wilson
4c76b1c7fc Revert 75309. 
llvm-svn: 75562
 2009-07-14 00:01:42 +00:00
David Goodwin
9634e3ff8f Fix FP elimination code to work for Thumb-2 addrmode AddrModeT2_so. This fixes SingleSource/Benchmarks/Stanford/Queens (among others). 
llvm-svn: 75513
 2009-07-13 21:43:08 +00:00
Bob Wilson
e0478ff8e5 Fix comment typos. 
llvm-svn: 75479
 2009-07-13 18:11:36 +00:00
Torok Edwin
62902fd6c8 Remove extra \n from LLVM_UNREACHABLE calls. 
llvm-svn: 75416
 2009-07-12 07:15:17 +00:00
Torok Edwin
ae8a3ff177 assert(0) -> LLVM_UNREACHABLE. 
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.

llvm-svn: 75379
 2009-07-11 20:10:48 +00:00
Evan Cheng
20086680b0 Don't put IT instruction before conditional branches. 
llvm-svn: 75361
 2009-07-11 07:26:20 +00:00
Evan Cheng
03d981d91b Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is feasible. 
llvm-svn: 75360
 2009-07-11 07:08:13 +00:00
Evan Cheng
268b47b1fb Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies CPSR when they are outside the IT blocks, or they can predicated when in Thumb2. Move the implicit def of CPSR to an optional def which defaults CPSR. This allows the 's' bit to be toggled dynamically. 
A side-effect of this change is asm printer is now using unified assembly. There are some minor clean ups and fixes as well.

llvm-svn: 75359
 2009-07-11 06:43:01 +00:00
Evan Cheng
e83b947a2c 80 col violation. 
llvm-svn: 75358
 2009-07-11 06:37:27 +00:00
Bob Wilson
88593195a0 Add superclasses of ARM Neon quad registers. The Q2PR class contains pairs of 
quad registers and the Q4PR class holds sets of 4 quad registers.

llvm-svn: 75309
 2009-07-10 23:09:06 +00:00
David Goodwin
1a6f4f6f8d Predicate VFP instructions on HasVFP2 instead of IsARM. This allows VFP instructions with thumb-2. 
llvm-svn: 75254
 2009-07-10 17:03:29 +00:00
David Goodwin
527180b7b0 t2LDM_RET does not fall-through. 
llvm-svn: 75250
 2009-07-10 15:33:46 +00:00
Duncan Sands
eaa9975d59 Add Thumb2ITBlockPass.cpp to CMakeLists.txt, fixing 
the cmake build.

llvm-svn: 75246
 2009-07-10 08:31:50 +00:00
Evan Cheng
6e276f4376 More info about Thumb1 predication support. 
llvm-svn: 75220
 2009-07-10 02:10:17 +00:00
Evan Cheng
74f5327e53 We don't need separate thumb1 instructions tADDSi3 etc. for addc and subc. The "normal" version always modify condition register CPSR so we should just use def : pat to match to the same instructions. 
llvm-svn: 75219
 2009-07-10 02:09:04 +00:00
Evan Cheng
24f2aefc87 Add a thumb2 pass to insert IT blocks. 
llvm-svn: 75218
 2009-07-10 01:54:42 +00:00
Evan Cheng
4d2678d1ff Move isPredicated from .cpp to .h 
llvm-svn: 75217
 2009-07-10 01:38:27 +00:00
Evan Cheng
5bdb67db63 80 col violation. 
llvm-svn: 75212
 2009-07-10 00:45:16 +00:00
Evan Cheng
4249ad4c00 Remove a bogus assertion. 
llvm-svn: 75206
 2009-07-10 00:23:48 +00:00
Bob Wilson
3309c912fb Replace TM.getRegisterInfo() calls by TRI instance variable. 
Use getAsmName() method instead of accessing AsmName field directly.

llvm-svn: 75205
 2009-07-10 00:14:05 +00:00
Bob Wilson
f5f52fa9d6 Handle 'a' modifier on inline assembly operands. 
This is part of the fix for pr4521.

llvm-svn: 75201
 2009-07-09 23:54:51 +00:00
Evan Cheng
1b15e9611e Added Thumb IT instruction. 
llvm-svn: 75198
 2009-07-09 23:43:36 +00:00
Evan Cheng
0d509459ff Another todo entry. 
llvm-svn: 75192
 2009-07-09 23:17:28 +00:00
Evan Cheng
5bde39cb50 Initial support for load / store multiple opt pass Thumb2 support (post-allocation only). It's kind of there, but not quite. I'll return to this later. 
llvm-svn: 75190
 2009-07-09 23:11:34 +00:00
Evan Cheng
57a4e81f3f Fix ldm / stm unified syntax; add t2LDM_RET. 
llvm-svn: 75188
 2009-07-09 22:58:39 +00:00
Evan Cheng
09e7791563 LDM_RET should be marked mayLoad. 
llvm-svn: 75187
 2009-07-09 22:57:41 +00:00
Evan Cheng
3b7c3fafab Fix ldrd / strd address mode matching code. It allows for +/- 8 bit offset. Also change the printer to make the scale 4 explicit. 
Note, we are not yet generating these instructions.

llvm-svn: 75181
 2009-07-09 22:21:59 +00:00
Evan Cheng
7f8e728a54 Add a Thumb readme entry. 
llvm-svn: 75173
 2009-07-09 20:50:52 +00:00
Evan Cheng
e08efed97a Correct comment. 
llvm-svn: 75172
 2009-07-09 20:40:44 +00:00
David Goodwin
6c4201dbcb Handle Thumb-2 addressing modes during FP elimination. 
llvm-svn: 75158
 2009-07-09 18:35:52 +00:00
Owen Anderson
8970999512 Thread LLVMContext through MVT and related parts of SDISel. 
llvm-svn: 75153
 2009-07-09 17:57:24 +00:00
Evan Cheng
fad8f9bea1 Reorg includes. 
llvm-svn: 75115
 2009-07-09 06:49:09 +00:00
David Goodwin
49fbd8d6b7 Use common code for both ARM and Thumb-2 instruction and register info. 
llvm-svn: 75067
 2009-07-08 23:10:31 +00:00
Evan Cheng
991f885915 - Add some NEON ld / st instruction static encoding. 
- Make bits 25-27 for ldrh, etc. explicitly zero. Previously only the JIT uses the encoding information and it's assuming anything not specified to be zero. Making them explicit so the disassembler is happy.
Patch by Sean Callanan.

llvm-svn: 75065
 2009-07-08 22:51:32 +00:00
Evan Cheng
ef49d9c75b Change how so_imm and t2_so_imm are handled. At instruction selection time, the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead. 
llvm-svn: 75048
 2009-07-08 21:03:57 +00:00
Torok Edwin
4df7c24e06 Missed an exit during the conversion. 
Will convert assert(0) that don't have abort() to LLVM_UNREACHABLE in a later
commit.

llvm-svn: 75045
 2009-07-08 20:55:50 +00:00
Torok Edwin
358888da3a Implement changes from Chris's feedback. 
Finish converting lib/Target.

llvm-svn: 75043
 2009-07-08 20:53:28 +00:00
Bob Wilson
8d4a8b9370 Implement NEON vst1 instruction. 
llvm-svn: 75037
 2009-07-08 20:32:02 +00:00
David Goodwin
94209a4c31 Generalize opcode selection in ARMBaseRegisterInfo. 
llvm-svn: 75036
 2009-07-08 20:28:28 +00:00
Xerxes Ranby
626b0317a9 Fix cmake build. 
Added ARMBaseRegisterInfo.cpp to lib/Target/ARM/CMakeLists.txt

llvm-svn: 75035
 2009-07-08 20:13:41 +00:00
David Goodwin
c571c4b457 Push methods into base class in preparation for sharing. 
llvm-svn: 75020
 2009-07-08 18:31:39 +00:00
Bob Wilson
3809b333de Implement NEON vld1 instructions. 
llvm-svn: 75019
 2009-07-08 18:11:30 +00:00
Torok Edwin
ad3be984b7 Start converting to new error handling API. 
cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)

llvm-svn: 75018
 2009-07-08 18:01:40 +00:00
David Goodwin
7b4570ee1d Start breaking out common base functionality for register info. 
llvm-svn: 75016
 2009-07-08 17:28:55 +00:00
David Goodwin
5bdef4b3f7 Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first. 
llvm-svn: 75010
 2009-07-08 16:09:28 +00:00
Nick Lewycky
d46a7b2d22 Remove the vicmp and vfcmp instructions. Because we never had a release with 
these instructions, no autoupgrade or backwards compatibility support is
provided.

llvm-svn: 74991
 2009-07-08 03:04:38 +00:00
Evan Cheng
18d70ca551 Add a Thumb2 instruction flag to that indicates whether the instruction can be transformed to 16-bit variant. 
llvm-svn: 74988
 2009-07-08 01:46:35 +00:00
Evan Cheng
51549009b4 Add a todo. 
llvm-svn: 74976
 2009-07-08 00:05:05 +00:00
Evan Cheng
835946d309 Also statically set bit 25 for BR_JT instructions. 
llvm-svn: 74974
 2009-07-07 23:45:10 +00:00
Evan Cheng
834ee3625c Statically encode bit 25 to indicate immediate form of data processing instructions. Patch by Sean Callanan. 
llvm-svn: 74972
 2009-07-07 23:40:25 +00:00
Evan Cheng
393e38e44b Add Thumb2 movcc instructions. 
llvm-svn: 74946
 2009-07-07 20:39:03 +00:00
Evan Cheng
409ea11513 Add BX and BXr9 encodings. Patch by Sean Callanan. 
llvm-svn: 74938
 2009-07-07 19:16:24 +00:00
Evan Cheng
fa864ab886 Add Thumb2 pkhbt / pkhtb. 
llvm-svn: 74895
 2009-07-07 05:35:52 +00:00
Evan Cheng
46b98516f6 Add some more Thumb2 multiplication instructions. 
llvm-svn: 74889
 2009-07-07 01:17:28 +00:00
Evan Cheng
3d69bea38e 80 col violation. 
llvm-svn: 74888
 2009-07-07 01:16:41 +00:00
Evan Cheng
b70366baa4 isThumb2 really should mean thumb2 only, not thumb2+. 
llvm-svn: 74871
 2009-07-06 22:29:14 +00:00
Evan Cheng
5a279bb4b2 Add bfc to armv6t2. 
llvm-svn: 74868
 2009-07-06 22:23:46 +00:00
Evan Cheng
2570d8b541 Added ARM::mls for armv6t2. 
llvm-svn: 74866
 2009-07-06 22:05:45 +00:00
Bruno Cardoso Lopes
38373542a1 Add the Object Code Emitter class. Original patch by Aaron Gray, I did some 
cleanup, removed some #includes and moved Object Code Emitter out-of-line.

llvm-svn: 74813
 2009-07-06 05:09:34 +00:00
Tilmann Scheller
cea3c16aa5 Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed arguments in a vararg call. 
With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put 
into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack.

The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list.

llvm-svn: 74764
 2009-07-03 06:44:53 +00:00
Evan Cheng
f20e4fba49 Add thumb2 sign / zero extend with rotate instructions. 
llvm-svn: 74755
 2009-07-03 01:43:10 +00:00
Evan Cheng
f3672575d6 Add Thumb2 load / store multiple instructions. Not used yet. 
llvm-svn: 74749
 2009-07-03 00:18:36 +00:00
Evan Cheng
07bcde3709 t2LDR_PRE etc are loads. 
llvm-svn: 74741
 2009-07-03 00:08:19 +00:00
Evan Cheng
162bd9cead Added indexed stores. 
llvm-svn: 74740
 2009-07-03 00:06:39 +00:00
Evan Cheng
fcab8e743a Sign extending pre/post indexed loads. 
llvm-svn: 74736
 2009-07-02 23:16:11 +00:00
David Goodwin
81075a5d30 Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2. 
llvm-svn: 74731
 2009-07-02 22:18:33 +00:00
Douglas Gregor
b523a25108 CMake build fixes, from Xerxes Ranby 
llvm-svn: 74720
 2009-07-02 18:53:52 +00:00
Evan Cheng
dad6a41d14 Thumb2 pre/post indexed loads. 
llvm-svn: 74696
 2009-07-02 07:28:31 +00:00
Evan Cheng
7249bab8a5 80 col violation. 
llvm-svn: 74693
 2009-07-02 06:44:30 +00:00
Evan Cheng
57bb186a0c Change the meaning of predicate hasThumb2 to mean thumb2 ISA is available, not that it's in thumb mode and thumb2 is available. Added isThumb2 predicate to replace the old predicate. 
llvm-svn: 74692
 2009-07-02 06:38:40 +00:00
Evan Cheng
bdf117bfac 80 col violation. 
llvm-svn: 74683
 2009-07-02 01:30:04 +00:00
Evan Cheng
d9f23ceeb9 Factor out ARM indexed load matching code. 
llvm-svn: 74681
 2009-07-02 01:23:32 +00:00
Bob Wilson
810a970c6f Add a new addressing mode for NEON load/store instructions. 
llvm-svn: 74658
 2009-07-01 23:16:05 +00:00
Bob Wilson
e3f8a640ac Fix a comment typo. 
llvm-svn: 74650
 2009-07-01 21:59:43 +00:00
Bob Wilson
11cddb5deb Fix up a comment: besides the >80col lines, the operation for this 
addressing mode is encoded in the second operand, not the third.

llvm-svn: 74641
 2009-07-01 21:22:45 +00:00
Bill Wendling
fdd5badace Update comments to make it clear that the function alignment is the Log2 of the 
bytes and not bytes.

llvm-svn: 74624
 2009-07-01 18:50:55 +00:00
Evan Cheng
37503e9671 Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details. 
llvm-svn: 74580
 2009-07-01 01:59:31 +00:00
Daniel Dunbar
bc3d149e98 Remove unused AsmPrinter OptLevel argument, and propogate. 
- This more or less amounts to a revert of r65379. I'm curious to know what
   happened that caused this variable to become unused.

llvm-svn: 74579
 2009-07-01 01:48:54 +00:00
David Goodwin
19aa5c7d51 Add PIC load and store patterns for Thumb-2. 
llvm-svn: 74577
 2009-07-01 00:01:13 +00:00
David Goodwin
aa1f876954 Thumb-2 load and store double description. But nothing yet creates them. 
llvm-svn: 74566
 2009-06-30 22:50:01 +00:00
Bill Wendling
c0fb316bd3 Add an "alignment" field to the MachineFunction object. It makes more sense to 
have the alignment be calculated up front, and have the back-ends obey whatever
alignment is decided upon.

This allows for future work that would allow for precise no-op placement and the
like.

llvm-svn: 74564
 2009-06-30 22:38:32 +00:00
David Goodwin
5805e9aef5 Add thumb-2 store word, halfword, and byte. 
llvm-svn: 74555
 2009-06-30 22:11:34 +00:00
David Goodwin
aad223dd8a Improve Thumb-2 jump table support. 
llvm-svn: 74549
 2009-06-30 19:50:22 +00:00
David Goodwin
5545d82866 Add conditional and unconditional thumb-2 branch. Add thumb-2 jump table. 
llvm-svn: 74543
 2009-06-30 18:04:13 +00:00
Evan Cheng
2a527c3419 A few more load instructions. 
llvm-svn: 74500
 2009-06-30 02:15:48 +00:00
David Goodwin
4f53387d26 Add Thumb-2 support for TEQ amd TST. 
llvm-svn: 74468
 2009-06-29 22:49:42 +00:00
David Goodwin
9e1280adf3 Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative. 
llvm-svn: 74423
 2009-06-29 15:33:01 +00:00
Duncan Sands
660e9c2106 Include the new file ThumbRegisterInfo.cpp to CMakeLists.txt 
to make sure ThumbRegisterInfo.cpp are compiled and linked in.
Patch by Xerxes.

llvm-svn: 74421
 2009-06-29 13:11:32 +00:00
Evan Cheng
093adf3ff9 Implement Thumb2 ldr. 
After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.

llvm-svn: 74420
 2009-06-29 07:51:04 +00:00
Anton Korobeynikov
7231e149ef Simplify a bit 
llvm-svn: 74385
 2009-06-27 12:59:03 +00:00
Anton Korobeynikov
1db77899c1 ARM refactoring. Step 2: split RegisterInfo 
llvm-svn: 74384
 2009-06-27 12:16:40 +00:00
Douglas Gregor
6ee152cc94 Add ThumbInstrInfo.cpp to the CMake makefiles 
llvm-svn: 74382
 2009-06-27 07:44:59 +00:00
Evan Cheng
817712377a Renaming for consistency. 
llvm-svn: 74368
 2009-06-27 02:26:13 +00:00
David Goodwin
e1979dfbf5 Remove outdated comment. 
llvm-svn: 74357
 2009-06-26 23:39:02 +00:00
David Goodwin
90fc344e41 When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has a narrow version and eor(i) does not. 
llvm-svn: 74355
 2009-06-26 23:13:13 +00:00
Anton Korobeynikov
aab56476b2 Split thumb-related stuff into separate classes. 
Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo

llvm-svn: 74329
 2009-06-26 21:28:53 +00:00
David Goodwin
921faa64cd Thumb-2 has CLZ. 
llvm-svn: 74322
 2009-06-26 20:47:43 +00:00
David Goodwin
9da977f216 Use "adcs/sbcs" only when the carry-out is live, otherwise use "adc/sbc". 
llvm-svn: 74321
 2009-06-26 20:45:56 +00:00
David Goodwin
46eb5a7a2d ADC used to implement adde should use "adcs" opcode instead of "adc". 
llvm-svn: 74293
 2009-06-26 18:07:25 +00:00
David Goodwin
877790aa5f Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction. That instruction cannot write the flags so it should use T2I instead of T2sI. 
Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate.

llvm-svn: 74288
 2009-06-26 16:10:07 +00:00
Evan Cheng
b93625f89e Simplify predicate CarryDefIsUsed. 
llvm-svn: 74277
 2009-06-26 06:10:18 +00:00
Devang Patel
a7a5664fbb Let's ignore MDStrings also! 
llvm-svn: 74255
 2009-06-26 02:26:12 +00:00
Evan Cheng
2eb1525e2a Add a note about commuting conditional move. 
llvm-svn: 74241
 2009-06-26 00:28:48 +00:00
Evan Cheng
f23c8a5c8a These are done / no longer applicable. 
llvm-svn: 74239
 2009-06-26 00:25:27 +00:00
Evan Cheng
4f0e461e97 Mark a bunch of instructions commutable. 
llvm-svn: 74237
 2009-06-26 00:19:44 +00:00
Evan Cheng
e45355b804 tst is also commutable. 
llvm-svn: 74236
 2009-06-26 00:19:07 +00:00
Evan Cheng
4ac765118d Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry bit def is not used. 
llvm-svn: 74228
 2009-06-25 23:34:10 +00:00