Craig Topper
9667d599eb
Make l/q suffixes on AVX forms of scalar convert instructions consistent with their non-AVX forms.
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llvm-svn: 160775
2012-07-26 07:48:28 +00:00
Craig Topper
b144f3b6db
Make x86 asm parser to check for xmm vs ymm for index register in gather instructions. Also fix Intel syntax for gather instructions to use 'DWORD PTR' or 'QWORD PTR' to match gas.
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llvm-svn: 160420
2012-07-18 04:11:12 +00:00
Craig Topper
b346ce8240
Reverse assembler/disassembler operand order for gather instructions.
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llvm-svn: 159983
2012-07-10 06:38:33 +00:00
Manman Ren
63bf58865a
X86: add more GATHER intrinsics in LLVM
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Corrected type for index of llvm.x86.avx2.gather.d.pd.256
from 256-bit to 128-bit.
Corrected types for src|dst|mask of llvm.x86.avx2.gather.q.ps.256
from 256-bit to 128-bit.
Support the following intrinsics:
llvm.x86.avx2.gather.d.q, llvm.x86.avx2.gather.q.q
llvm.x86.avx2.gather.d.q.256, llvm.x86.avx2.gather.q.q.256
llvm.x86.avx2.gather.d.d, llvm.x86.avx2.gather.q.d
llvm.x86.avx2.gather.d.d.256, llvm.x86.avx2.gather.q.d.256
llvm-svn: 159402
2012-06-29 00:54:20 +00:00
Manman Ren
6be46b7b4c
X86: add GATHER intrinsics (AVX2) in LLVM
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Support the following intrinsics:
llvm.x86.avx2.gather.d.pd, llvm.x86.avx2.gather.q.pd
llvm.x86.avx2.gather.d.pd.256, llvm.x86.avx2.gather.q.pd.256
llvm.x86.avx2.gather.d.ps, llvm.x86.avx2.gather.q.ps
llvm.x86.avx2.gather.d.ps.256, llvm.x86.avx2.gather.q.ps.256
Modified Disassembler to handle VSIB addressing mode.
llvm-svn: 159221
2012-06-26 19:47:59 +00:00
Craig Topper
5c8bdeb3f3
Remove some duplicate instructions that exist only to given different mnemonics for the assembler. Use InstAlias instead.
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llvm-svn: 159184
2012-06-26 04:12:49 +00:00
Craig Topper
ce6c05e0df
Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo.
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llvm-svn: 153935
2012-04-03 05:20:24 +00:00
Eli Friedman
f626b19bda
Make sure we correctly note the existence of an i8 immediate for vblendvps and friends, so we compute fixups correctly. PR11586.
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llvm-svn: 146709
2011-12-15 23:46:18 +00:00
Bruno Cardoso Lopes
906f64c461
The wrong relocation was being emitted for several SSSE3 instructions.
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This fixes PR10963. Thanks to Benjamin for finding the wrong tablegen
declaration.
llvm-svn: 140184
2011-09-20 21:39:21 +00:00
Bruno Cardoso Lopes
de0dc10d6d
Fix PR10949. Fix the encoding of VMOVPQIto64rr.
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llvm-svn: 140098
2011-09-19 23:36:59 +00:00
Bruno Cardoso Lopes
9979e44f1b
Re-write part of VEX encoding logic, to be more easy to read! Also fix
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a bug and add a testcase!
llvm-svn: 138123
2011-08-19 22:27:29 +00:00
Bruno Cardoso Lopes
306110c29a
Fix PR10677. Initial patch and idea by Peter Cooper but I've changed the
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implementation!
llvm-svn: 138029
2011-08-19 02:23:56 +00:00
Bob Wilson
5b04895bb8
Revert r133452: "Emit movq for 64-bit register to XMM register moves..."
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This is breaking compiler-rt and llvm-gcc builds on MacOSX when not using
the integrated assembler.
llvm-svn: 133524
2011-06-21 17:35:13 +00:00
Nick Lewycky
831fb8200d
Emit movq for 64-bit register to XMM register moves, but continue to accept
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movd when assembling.
llvm-svn: 133452
2011-06-20 18:33:26 +00:00
Chris Lattner
2c53557b0d
move X86 subdir up a level
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llvm-svn: 115292
2010-10-01 04:32:20 +00:00
