RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-06 11:19:09 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
53,600 Commits 4 Branches 5 Tags 634 MiB
8243ac1abf
Commit Graph

2538 Commits

Author SHA1 Message Date
Evan Cheng
ce9d8e2737 Remove an irrelevant and poorly reduced test case. 
llvm-svn: 85794
 2009-11-02 07:11:54 +00:00
Evan Cheng
57f7c7c914 Unbreak ARMBaseRegisterInfo::copyRegToReg. 
llvm-svn: 85787
 2009-11-02 04:44:55 +00:00
Anton Korobeynikov
09147da530 Handle splats of undefs properly. This includes the testcase for PR5364 as well. 
llvm-svn: 85767
 2009-11-02 00:12:06 +00:00
Anton Korobeynikov
ed410a8ee3 64-bit FP loads & stores operate on both NEON and VFP pipelines. 
llvm-svn: 85765
 2009-11-02 00:11:06 +00:00
Evan Cheng
4a0d47f209 Make use of imm12 version of Thumb2 ldr / str instructions more aggressively. 
llvm-svn: 85743
 2009-11-01 21:12:51 +00:00
Evan Cheng
0151329ce5 Fix tests. 
llvm-svn: 85723
 2009-11-01 18:13:29 +00:00
Chris Lattner
4cf2980e59 improve x86 codegen support for blockaddress. We now compile 
the testcase into:

_test1:                                                     ## @test1
## BB#0:                                                    ## %entry
	leaq	L_test1_bb6(%rip), %rax
	jmpq	*%rax
L_test1_bb:                                                 ## Address Taken
LBB1_1:                                                     ## %bb
	movb	$1, %al
	ret
L_test1_bb6:                                                ## Address Taken
LBB1_2:                                                     ## %bb6
	movb	$2, %al
	ret

Note, it is very very strange that BlockAddressSDNode doesn't carry 
around TargetFlags.  Dan, please fix this.

llvm-svn: 85703
 2009-11-01 03:25:03 +00:00
Evan Cheng
de16fff3e8 Use cbz and cbnz instructions. 
llvm-svn: 85698
 2009-10-31 23:46:45 +00:00
Jim Grosbach
5b094f3b36 vml[as].f32 cause stalls in following advanced SIMD instructions. Avoid using 
them for scalar floating point operations for now.

llvm-svn: 85697
 2009-10-31 22:57:36 +00:00
Jim Grosbach
7dfa53d978 Consolidate test files 
llvm-svn: 85696
 2009-10-31 22:20:56 +00:00
Jim Grosbach
acb31ebed1 Change to use FileCheck 
llvm-svn: 85695
 2009-10-31 22:16:14 +00:00
Jim Grosbach
93bcf7b8ce Make tests more explicit about which instructions are expected. 
llvm-svn: 85694
 2009-10-31 22:14:17 +00:00
Jim Grosbach
84e67e8e5c Grammar tweak to comments 
llvm-svn: 85693
 2009-10-31 22:12:44 +00:00
Jim Grosbach
c003ed5615 Update test to be more explicit about what instruction sequences are expected for each operation. 
llvm-svn: 85691
 2009-10-31 22:10:38 +00:00
Jim Grosbach
2a445e5d0a Update test to be more explicit about what instruction sequences are expected for each operation. 
llvm-svn: 85689
 2009-10-31 21:52:58 +00:00
Jim Grosbach
ace75c4288 Expand 64-bit logical shift right inline 
llvm-svn: 85687
 2009-10-31 21:42:19 +00:00
Jim Grosbach
16ae289667 Expand 64-bit arithmetic shift right inline 
llvm-svn: 85685
 2009-10-31 21:00:56 +00:00
Benjamin Kramer
2cc5f86d43 Force triple; darwin's ASM syntax differs from linux's. 
llvm-svn: 85676
 2009-10-31 19:54:06 +00:00
Jim Grosbach
534d2cb249 Expand 64 bit left shift inline rather than using the libcall. For now, this 
is unconditional. Making it still use the libcall when optimizing for size
would be a good adjustment.

llvm-svn: 85675
 2009-10-31 19:38:01 +00:00
Benjamin Kramer
60dac7de40 Add missing colons for FileCheck. 
llvm-svn: 85674
 2009-10-31 19:22:24 +00:00
Jim Grosbach
78a5bcfa02 Convert to FileCheck 
llvm-svn: 85673
 2009-10-31 19:06:53 +00:00
Evan Cheng
9178904e56 It's safe to remat t2LDRpci; Add PseudoSourceValue to load / store's to enable more machine licm. More changes coming. 
llvm-svn: 85643
 2009-10-31 03:39:36 +00:00
Dan Gohman
d5dbd3f588 Add a target triple so that this test behaves consistently across hosts. 
llvm-svn: 85640
 2009-10-31 00:15:28 +00:00
Dan Gohman
14157e31a3 Fix the -mattr line for this test so that it passes on hosts that lack SSSE3. 
llvm-svn: 85637
 2009-10-30 23:18:27 +00:00
Dan Gohman
ad6c6a3d33 Fix MachineLICM to use the correct virtual register class when 
unfolding loads for hoisting.  getOpcodeAfterMemoryUnfold returns the
opcode of the original operation without the load, not the load
itself, MachineLICM needs to know the operand index in order to get
the correct register class. Extend getOpcodeAfterMemoryUnfold to
return this information.

llvm-svn: 85622
 2009-10-30 22:18:41 +00:00
Evan Cheng
52d6e56ac9 I forgot to commit this test. 
llvm-svn: 85608
 2009-10-30 20:03:40 +00:00
Rafael Espindola
d4fadd76da This fixes functions like 
void f (int a1, int a2, int a3, int a4, int a5,...)

In ARMTargetLowering::LowerFormalArguments if the function has 4 or
more regular arguments we used to set VarArgsFrameIndex using an
offset of 0, which is only correct if the function has exactly 4
regular arguments.

llvm-svn: 85590
 2009-10-30 14:33:14 +00:00
Bob Wilson
f13be9d41e Reimplement BranchFolding change to avoid tail merging for a 1 instruction 
common tail, except when the OptimizeForSize function attribute is present.
Radar 7338114.

llvm-svn: 85441
 2009-10-28 22:10:20 +00:00
Dan Gohman
076a3b5e25 Teach MachineLICM to unfold loads from constant memory from 
otherwise unhoistable instructions in order to allow the loads
to be hoisted.

llvm-svn: 85364
 2009-10-28 03:21:57 +00:00
Evan Cheng
1babe43881 Use fconsts and fconstd to materialize small fp constants. 
llvm-svn: 85362
 2009-10-28 01:44:26 +00:00
Dan Gohman
00c9f3e905 Mark dead physregdefs dead immediately. This helps MachineSink and 
MachineLICM and other things which run before LiveVariables is run.

llvm-svn: 85360
 2009-10-28 01:13:53 +00:00
Dan Gohman
a9fb025f00 Allow constants of different types to share constant pool entries 
if they have compatible encodings.

llvm-svn: 85359
 2009-10-28 01:12:16 +00:00
Rafael Espindola
9cafe9e468 Add missing testcase. 
llvm-svn: 85266
 2009-10-27 17:59:03 +00:00
Bob Wilson
aadcaed95f Fix Thumb2 failures by converting them to FileCheck. 
llvm-svn: 85210
 2009-10-27 06:31:02 +00:00
Bob Wilson
cc098c98de Fix the rest of the ARM failures by converting them to FileCheck. 
llvm-svn: 85208
 2009-10-27 06:16:45 +00:00
Bob Wilson
5753a34ebb Fix some more failures by converting to FileCheck. 
llvm-svn: 85207
 2009-10-27 05:50:28 +00:00
Bob Wilson
37191c825b Convert to FileCheck, fixing failure due to tab change in the process. 
llvm-svn: 85204
 2009-10-27 05:30:47 +00:00
David Goodwin
f6199e95b0 Break anti-dependence breaking out into its own class. 
llvm-svn: 85127
 2009-10-26 16:59:04 +00:00
Dan Gohman
3d0c010ee4 Make LSR's OptimizeShadowIV ignore induction variables with negative 
strides for now, because it doesn't handle them correctly. This fixes a
miscompile of SingleSource/Benchmarks/Misc-C++/ray.

This problem was usually hidden because indvars transforms such induction
variables into negations of canonical induction variables.

llvm-svn: 85118
 2009-10-26 15:32:57 +00:00
Evan Cheng
4443642def - Revert some changes from 85044, 85045, and 85047 that broke x86_64 tests and 
bootstrapping. It's not safe to leave identity subreg_to_reg and insert_subreg
  around.
- Relax register scavenging to allow use of partially "not-live" registers. It's
  common for targets to operate on registers where the top bits are undef. e.g.
  s0 =
  d0 = insert_subreg d0<undef>, s0, 1
  ...
     = d0
  When the insert_subreg is eliminated by the coalescer, the scavenger used to
  complain. The previous fix was to keep to insert_subreg around. But that's
  brittle and it's overly conservative when we want to use the scavenger to 
  allocate registers. It's actually legal and desirable for other instructions
  to use the "undef" part of d0. e.g.
  s0 =
  d0 = insert_subreg d0<undef>, s0, 1
  ...
  s1 =
     = s1
     = d0
  We probably need add a "partial-undef" marker on machine operand so the
  machine verifier would not complain.

llvm-svn: 85091
 2009-10-26 04:56:07 +00:00
Chris Lattner
e3508acbef fix PR5295 where the .ll parser didn't reject a function after a global 
or global after a function with conflicting names.  Update some testcases
that were accidentally depending on this behavior.

llvm-svn: 85081
 2009-10-25 23:22:50 +00:00
Evan Cheng
a308ae55a5 Add a couple of ARM cross-rc coalescing tests. 
llvm-svn: 85051
 2009-10-25 08:01:41 +00:00
Evan Cheng
1c169777ca Update tests. 
llvm-svn: 85050
 2009-10-25 07:53:48 +00:00
Dan Gohman
b15fee5666 APInt-ify the gep scaling code, so that it correctly handles the case where 
the scale overflows pointer-sized arithmetic. This fixes PR5281.

llvm-svn: 84954
 2009-10-23 17:57:43 +00:00
Evan Cheng
aa03d9926d Update tests for 84931. 
llvm-svn: 84932
 2009-10-23 05:58:34 +00:00
David Goodwin
82c1dd9754 Allow the target to select the level of anti-dependence breaking that should be performed by the post-RA scheduler. The default is none. 
llvm-svn: 84911
 2009-10-22 23:19:17 +00:00
Bob Wilson
8f4f73da55 Revert 84843. Evan, this was breaking some of the if-conversion tests. 
llvm-svn: 84868
 2009-10-22 16:52:21 +00:00
Evan Cheng
2edd1efa46 Move if-conversion before post-regalloc scheduling so the predicated instruction get scheduled properly. 
llvm-svn: 84843
 2009-10-22 06:48:32 +00:00
Evan Cheng
8fdd1661fa Don't generate sbfx / ubfx with negative lsb field. Patch by David Conrad. 
llvm-svn: 84813
 2009-10-22 00:40:00 +00:00
Anton Korobeynikov
bbc637e96d Use special DAG-to-DAG preprocessing to allow mem-mem instructions to be selected. 
Yay for ASCII graphics!

llvm-svn: 84808
 2009-10-22 00:16:00 +00:00