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27309 Commits

Author SHA1 Message Date
Zhou Sheng
670d50e102 Ignore dbg info intrinsics when folding conditional branch to 
conditional branch predecessors.

llvm-svn: 65509
 2009-02-26 06:56:37 +00:00
Owen Anderson
32d31bc5cc Enable stack slot coloring DCE. Evan's spiller fixes were needed before this could happen. 
llvm-svn: 65501
 2009-02-26 04:47:57 +00:00
Evan Cheng
4014a9a5b8 ADDS{D|S}rr_Int and MULS{D|S}rr_Int are not commutable. The users of these intrinsics expect the high bits will not be modified. 
llvm-svn: 65499
 2009-02-26 03:12:02 +00:00
Evan Cheng
86fc9440db The last commit was overly conservative. It's ok to reuse value that's already marked livein. 
llvm-svn: 65498
 2009-02-26 03:02:21 +00:00
Evan Cheng
435dbd4665 If an available register falls through to a succ block, unset the last kill. Sorry, it's impossible to reduce a sensible test case. It basically requires the moon and stars to align in order to cause a failure. 
llvm-svn: 65497
 2009-02-26 02:30:42 +00:00
Evan Cheng
ec34226c2b Revert BuildVectorSDNode related patches: 65426, 65427, and 65296. 
llvm-svn: 65482
 2009-02-25 22:49:59 +00:00
Dale Johannesen
9a6ca304f1 Fix big-endian codegen bug. We're splitting up 
overly long ints, e.g. i96, into pieces at PHIs
and the nodes that feed into them; however big-endian
reverses the order of the pieces (for some reason), and
wasn't doing it the same way on both sides, so
the pieces didn't match and runtime failures ensued.
Fixes 188.ammp and sqlite3 on ppc32.

llvm-svn: 65481
 2009-02-25 22:39:13 +00:00
Devang Patel
2fd41ecef5 Print variable's display name in dwarf DIE. 
llvm-svn: 65468
 2009-02-25 19:41:35 +00:00
Chris Lattner
1443cb8f77 Fix PR3667 
llvm-svn: 65464
 2009-02-25 18:20:01 +00:00
Zhou Sheng
241d74737b Don't block basic block with only SwitchInst to fold into predecessors. 
llvm-svn: 65456
 2009-02-25 15:34:27 +00:00
Evan Cheng
befebff8fc Clean up dwarf writer, part 1. This eliminated the horrible recursive getGlobalVariablesUsing and replaced it something readable. It eliminated use of slow UniqueVector and replaced it with StringMap, SmallVector, and DenseMap, etc. It also fixed some non-deterministic behavior. 
This is a very minor compile time win.

llvm-svn: 65438
 2009-02-25 07:04:34 +00:00
Nick Lewycky
8672fb675c Add a totally synthetic situation I came up with while looking at a bug in 
related code.

llvm-svn: 65437
 2009-02-25 06:52:48 +00:00
Scott Michel
3f273a8412 Expand tabs to spaces (overlooked in previous commit) 
llvm-svn: 65427
 2009-02-25 03:57:49 +00:00
Scott Michel
29d7559c09 Remove all "cached" data from BuildVectorSDNode, preferring to retrieve 
results via reference parameters.

This patch also appears to fix Evan's reported problem supplied as a
reduced bugpoint test case.

llvm-svn: 65426
 2009-02-25 03:12:50 +00:00
Mon P Wang
c9b4dab417 Added support to have TableGen provide information if an intrinsic (core 
or target) can be overloaded or not.

llvm-svn: 65404
 2009-02-24 23:17:49 +00:00
Devang Patel
936c18daca If compile unit's language is not set then don't crash while dump'ing compile unit. 
llvm-svn: 65402
 2009-02-24 23:15:09 +00:00
Daniel Dunbar
d5e0934e30 Extension of GEP in constant folder was broken (apparently this code 
has never been run!).
 - Sorry, don't know how to make an LLVM test case for this.

llvm-svn: 65383
 2009-02-24 19:10:46 +00:00
Dan Gohman
dd9c79d45b Rename ScalarEvolution's getIterationCount to getBackedgeTakenCount, 
to more accurately describe what it does. Expand its doxygen comment
to describe what the backedge-taken count is and how it differs
from the actual iteration count of the loop. Adjust names and
comments in associated code accordingly.

llvm-svn: 65382
 2009-02-24 18:55:53 +00:00
Bill Wendling
9d4eb136da Overhaul my earlier submission due to feedback. It's a large patch, but most of 
them are generic changes.

- Use the "fast" flag that's already being passed into the asm printers instead
  of shoving it into the DwarfWriter.

- Instead of calling "MI->getParent()->getParent()" for every MI, set the
  machine function when calling "runOnMachineFunction" in the asm printers.

llvm-svn: 65379
 2009-02-24 08:30:20 +00:00
Owen Anderson
ffcb59129f Add a debugging option for SSC DCE. 
llvm-svn: 65375
 2009-02-24 05:44:18 +00:00
Bill Wendling
0d8316c5e0 - Use the "Fast" flag instead of "OptimizeForSize" to determine whether to emit 
a DBG_LABEL or not. We want to fall back to the original way of emitting debug
  info when we're in -O0/-fast mode.
- Add plumbing in to pass the "Fast" flag to places that need it.
- XFAIL DebugInfo/deaddebuglabel.ll. This is finding 11 labels instead of 8. I
  need to investigate still.

llvm-svn: 65367
 2009-02-24 02:35:30 +00:00
Dan Gohman
1197d46ccf Fix a ValueTracking rule: RHS means operand 1, not 0. Add a simple 
ashr instcombine to help expose this code. And apply the fix to
SelectionDAG's copy of this code too.

llvm-svn: 65364
 2009-02-24 02:00:40 +00:00
Dan Gohman
f5bb2d8747 Generalize the ChangeCompareStride code, in preparation for 
handling non-constant strides. No functionality change.

llvm-svn: 65363
 2009-02-24 01:58:00 +00:00
Dan Gohman
3a3b51162b Preserve the DominanceFrontier analysis in the LoopDeletion pass. 
llvm-svn: 65359
 2009-02-24 01:21:53 +00:00
Devang Patel
49b26ded5d gdb uses DW_AT_prototyped to identify K&R style in C based languages. 
This fixes objc.dg/dwarf-prototypes.m scan-assembler DW_AT_prototyped from llvmgcc42 test suite.

llvm-svn: 65357
 2009-02-24 00:52:19 +00:00
Devang Patel
702836b2dd While folding unconditional return move DbgRegionEndInst into the predecessor, instead of removing it. This fixes following tests from llvmgcc42 testsuite. 
gcc.c-torture/execute/20000605-3.c
gcc.c-torture/execute/20020619-1.c
gcc.c-torture/execute/20030920-1.c
gcc.c-torture/execute/loop-ivopts-1.c

llvm-svn: 65353
 2009-02-24 00:05:16 +00:00
Devang Patel
98ea831c24 If there is not any debug info available for any global variables and any subprograms then there is not any debug info to emit. 
llvm-svn: 65352
 2009-02-24 00:02:15 +00:00
Dan Gohman
1d93a1d2cb Back out the change in 64918 that used sign-extensions when promoting 
trip counts that use signed comparisons. It's not obviously the best
approach for preserving trip count information, and at any rate there
isn't anything in the tree right now that makes use of that, so for
now always using zero-extensions is preferable.

llvm-svn: 65347
 2009-02-23 23:20:35 +00:00
Dan Gohman
3766eeea36 Fast-isel can't do TLS yet, so it should fall back to SDISel 
if it sees TLS addresses.

llvm-svn: 65341
 2009-02-23 22:03:08 +00:00
Dan Gohman
f7d0d6fe22 LoopDeletion needs to inform ScalarEvolution when a loop is deleted, 
so that ScalarEvolution doesn't hang onto a dangling Loop*, which
could be a problem if another Loop happens to get allocated at the
same address.

llvm-svn: 65323
 2009-02-23 17:10:29 +00:00
Dan Gohman
67530bbc77 IndVarSimplify preserves ScalarEvolution. In the 
-std-compile-opts sequence, this avoids the need for ScalarEvolution to
be rerun before LoopDeletion.

llvm-svn: 65318
 2009-02-23 16:29:41 +00:00
Zhou Sheng
d3008c8b1c Should reset DBI_Prev if DBI_Next == 0. 
llvm-svn: 65314
 2009-02-23 10:14:11 +00:00
Evan Cheng
dd139e795c Only v1i16 (i.e. _m64) is returned via RAX / RDX. 
llvm-svn: 65313
 2009-02-23 09:03:22 +00:00
Nate Begeman
e0093d2501 Generate better code for v8i16 shuffles on SSE2 
Generate better code for v16i8 shuffles on SSE2 (avoids stack)
Generate pshufb for v8i16 and v16i8 shuffles on SSSE3 where it is fewer uops.
Document the shuffle matching logic and add some FIXMEs for later further
  cleanups.
New tests that test the above.

Examples:

New:
_shuf2:
	pextrw	$7, %xmm0, %eax
	punpcklqdq	%xmm1, %xmm0
	pshuflw	$128, %xmm0, %xmm0
	pinsrw	$2, %eax, %xmm0

Old:
_shuf2:
	pextrw	$2, %xmm0, %eax
	pextrw	$7, %xmm0, %ecx
	pinsrw	$2, %ecx, %xmm0
	pinsrw	$3, %eax, %xmm0
	movd	%xmm1, %eax
	pinsrw	$4, %eax, %xmm0
	ret

=========

New:
_shuf4:
	punpcklqdq	%xmm1, %xmm0
	pshufb	LCPI1_0, %xmm0

Old:
_shuf4:
	pextrw	$3, %xmm0, %eax
	movsd	%xmm1, %xmm0
	pextrw	$3, %xmm1, %ecx
	pinsrw	$4, %ecx, %xmm0
	pinsrw	$5, %eax, %xmm0

========

New:
_shuf1:
	pushl	%ebx
	pushl	%edi
	pushl	%esi
	pextrw	$1, %xmm0, %eax
	rolw	$8, %ax
	movd	%xmm0, %ecx
	rolw	$8, %cx
	pextrw	$5, %xmm0, %edx
	pextrw	$4, %xmm0, %esi
	pextrw	$3, %xmm0, %edi
	pextrw	$2, %xmm0, %ebx
	movaps	%xmm0, %xmm1
	pinsrw	$0, %ecx, %xmm1
	pinsrw	$1, %eax, %xmm1
	rolw	$8, %bx
	pinsrw	$2, %ebx, %xmm1
	rolw	$8, %di
	pinsrw	$3, %edi, %xmm1
	rolw	$8, %si
	pinsrw	$4, %esi, %xmm1
	rolw	$8, %dx
	pinsrw	$5, %edx, %xmm1
	pextrw	$7, %xmm0, %eax
	rolw	$8, %ax
	movaps	%xmm1, %xmm0
	pinsrw	$7, %eax, %xmm0
	popl	%esi
	popl	%edi
	popl	%ebx
	ret

Old:
_shuf1:
	subl	$252, %esp
	movaps	%xmm0, (%esp)
	movaps	%xmm0, 16(%esp)
	movaps	%xmm0, 32(%esp)
	movaps	%xmm0, 48(%esp)
	movaps	%xmm0, 64(%esp)
	movaps	%xmm0, 80(%esp)
	movaps	%xmm0, 96(%esp)
	movaps	%xmm0, 224(%esp)
	movaps	%xmm0, 208(%esp)
	movaps	%xmm0, 192(%esp)
	movaps	%xmm0, 176(%esp)
	movaps	%xmm0, 160(%esp)
	movaps	%xmm0, 144(%esp)
	movaps	%xmm0, 128(%esp)
	movaps	%xmm0, 112(%esp)
	movzbl	14(%esp), %eax
	movd	%eax, %xmm1
	movzbl	22(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm1, %xmm2
	movzbl	42(%esp), %eax
	movd	%eax, %xmm1
	movzbl	50(%esp), %eax
	movd	%eax, %xmm3
	punpcklbw	%xmm1, %xmm3
	punpcklbw	%xmm2, %xmm3
	movzbl	77(%esp), %eax
	movd	%eax, %xmm1
	movzbl	84(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm1, %xmm2
	movzbl	104(%esp), %eax
	movd	%eax, %xmm1
	punpcklbw	%xmm1, %xmm0
	punpcklbw	%xmm2, %xmm0
	movaps	%xmm0, %xmm1
	punpcklbw	%xmm3, %xmm1
	movzbl	127(%esp), %eax
	movd	%eax, %xmm0
	movzbl	135(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm0, %xmm2
	movzbl	155(%esp), %eax
	movd	%eax, %xmm0
	movzbl	163(%esp), %eax
	movd	%eax, %xmm3
	punpcklbw	%xmm0, %xmm3
	punpcklbw	%xmm2, %xmm3
	movzbl	188(%esp), %eax
	movd	%eax, %xmm0
	movzbl	197(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm0, %xmm2
	movzbl	217(%esp), %eax
	movd	%eax, %xmm4
	movzbl	225(%esp), %eax
	movd	%eax, %xmm0
	punpcklbw	%xmm4, %xmm0
	punpcklbw	%xmm2, %xmm0
	punpcklbw	%xmm3, %xmm0
	punpcklbw	%xmm1, %xmm0
	addl	$252, %esp
	ret

llvm-svn: 65311
 2009-02-23 08:49:38 +00:00
Mon P Wang
75d957dba4 Changed option name from inline-threshold to basic-inline-threshold because 
inline-threshold option is used by the inliner.

llvm-svn: 65309
 2009-02-23 07:07:56 +00:00
Chris Lattner
29437eb4c3 fix some typos that Duncan noticed 
llvm-svn: 65306
 2009-02-23 05:56:17 +00:00
Bill Wendling
3151437f5c Propagate debug loc info through prologue/epilogue. 
llvm-svn: 65298
 2009-02-23 00:42:30 +00:00
Scott Michel
3f8637305f Introduce the BuildVectorSDNode class that encapsulates the ISD::BUILD_VECTOR 
instruction. The class also consolidates the code for detecting constant
splats that's shared across PowerPC and the CellSPU backends (and might be
useful for other backends.) Also introduces SelectionDAG::getBUID_VECTOR() for
generating new BUILD_VECTOR nodes.

llvm-svn: 65296
 2009-02-22 23:36:09 +00:00
Dan Gohman
b105ab4e42 Revert the part of 64623 that attempted to align the source in a 
memcpy to match the alignment of the destination. It isn't necessary
for making loads and stores handled like the SSE loadu/storeu
intrinsics, and it was causing a performance regression in
MultiSource/Applications/JM/lencod.

The problem appears to have been a memcpy that copies from some
highly aligned array into an alloca; the alloca was then being
assigned a large alignment, which required codegen to perform
dynamic stack-pointer re-alignment, which forced the enclosing
function to have a frame pointer, which led to increased spilling.

llvm-svn: 65289
 2009-02-22 18:06:32 +00:00
Dan Gohman
a78fb41553 Properly parenthesize this expression, fixing a real bug in the new 
-full-lsr code, as well as a GCC warning.

llvm-svn: 65288
 2009-02-22 16:40:52 +00:00
Evan Cheng
41687ff389 If a use operand is marked isKill, don't forget to add kill to its live interval as well. 
llvm-svn: 65279
 2009-02-22 08:35:56 +00:00
Evan Cheng
3ea8bd42f3 Add a note. 
llvm-svn: 65275
 2009-02-22 08:13:45 +00:00
Evan Cheng
4385f393f7 Be bug compatible with gcc by returning MMX values in RAX. 
llvm-svn: 65274
 2009-02-22 08:05:12 +00:00
Evan Cheng
9d9688ec15 Do not consider MMX_MOVD64rr a move instructions. The source register is in GR32, the destination is VR64. They are not compatible. 
llvm-svn: 65273
 2009-02-22 08:04:23 +00:00
Evan Cheng
ba3f6fa814 Only try to sink immediate when TLI is not null. It needs to check if immediate would fit in target addressing field. 
llvm-svn: 65268
 2009-02-22 07:31:19 +00:00
Nick Lewycky
2c8f0fd57f Don't sign extend the char when expanding char -> int during 
load(bitcast(char[4] to i32*)) evaluation.

llvm-svn: 65246
 2009-02-21 20:50:42 +00:00
Richard Pennington
7a2ebd7d09 bug 3610: Floating point vaarg not softened. 
llvm-svn: 65239
 2009-02-21 19:11:18 +00:00
Anton Korobeynikov
5df82e3e25 Drop bunch of half-working stuff in the ext_weak linkage support. 
Now we're using one gross, but quite robust hack :) (previous ones
did not work, for example, when ext_weak symbol was used deep inside
constant expression in the initializer).

The proper fix of this problem will require some quite huge asmprinter
changes and that's why was postponed. This fixes PR3629 by the way :)

llvm-svn: 65230
 2009-02-21 11:53:32 +00:00
Evan Cheng
74d0dda00f Add AddrModeMatcher.cpp 
llvm-svn: 65228
 2009-02-21 07:05:11 +00:00
Evan Cheng
d4dc06f55a If two-address def is dead and the instruction does not define other registers, and it doesn't produce side effects, just delete the instruction. 
llvm-svn: 65218
 2009-02-21 03:14:25 +00:00