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Author SHA1 Message Date
Bob Wilson
c4345abcc0 Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load 
and store intrinsics are represented with MemIntrinsicSDNodes.

llvm-svn: 114454
 2010-09-21 17:56:22 +00:00
Chris Lattner
5f584efd31 eliminate some uses of the getStore overload. 
llvm-svn: 114453
 2010-09-21 17:50:43 +00:00
Chris Lattner
86b3f287ce eliminate an old SelectionDAG::getTruncStore method, propagating 
MachinePointerInfo around more.

llvm-svn: 114452
 2010-09-21 17:42:31 +00:00
Chris Lattner
bf98f86fed eliminate last SelectionDAG::getLoad old entrypoint, on to stores. 
llvm-svn: 114450
 2010-09-21 17:28:52 +00:00
Chris Lattner
8af4fb7aed fix the code that infers SV info to be correct when dealing 
with an indexed load/store that has an offset in the index.

llvm-svn: 114449
 2010-09-21 17:24:05 +00:00
Jakob Stoklund Olesen
03451a0e51 Add LiveInterval::find and use it for most LiveRange searching operations 
instead of calling lower_bound or upper_bound directly.

This cleans up the search logic a bit because {lower,upper}_bound compare
LR->start by default, and it is usually simpler to search LR->end.

Funnelling all searches through one function also makes it possible to replace
the search algorithm with something faster than binary search.

llvm-svn: 114448
 2010-09-21 17:12:18 +00:00
Jakob Stoklund Olesen
73d2940daa Remove dead method. 
llvm-svn: 114447
 2010-09-21 17:12:15 +00:00
Chris Lattner
cdfd993df0 propagate MachinePointerInfo through various uses of the old 
SelectionDAG::getExtLoad overload, and eliminate it.

llvm-svn: 114446
 2010-09-21 17:04:51 +00:00
Jim Grosbach
32cfcf5bba Fix errant printing of [v]ldm instructions that aren't a pop 
llvm-svn: 114445
 2010-09-21 16:45:31 +00:00
Benjamin Kramer
98e1aab5a8 Simplify code. 
llvm-svn: 114444
 2010-09-21 16:41:29 +00:00
Chris Lattner
0d430648ae continue MachinePointerInfo'izing, eliminating use of one of the old 
getLoad overloads.

llvm-svn: 114443
 2010-09-21 16:36:31 +00:00
Chris Lattner
5c0bdf4543 convert dagcombine off the old form of getLoad. This fixes several bugs 
with SVOffset computation.

llvm-svn: 114442
 2010-09-21 16:08:50 +00:00
Benjamin Kramer
a81f2ba27e Make CreateComplexVariable independent of SmallVector. 
llvm-svn: 114439
 2010-09-21 16:00:03 +00:00
Chris Lattner
637762e6d1 simplify DAGCombiner::SimplifySelectOps step #2/2. 
llvm-svn: 114437
 2010-09-21 15:58:55 +00:00
Chris Lattner
e3616071c5 substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps. 
no functionality change (step #1)

llvm-svn: 114436
 2010-09-21 15:46:59 +00:00
Mikhail Glushenkov
94fc12258f Trailing whitespace, 80-col violations. 
llvm-svn: 114435
 2010-09-21 14:59:50 +00:00
Mikhail Glushenkov
eacda4d1ca llvmc: split llvm_gcc_based into llvm_gcc_{pch,comp}_based. 
llvm-svn: 114434
 2010-09-21 14:59:47 +00:00
Mikhail Glushenkov
35e2ea68d2 llvmc: Allow multiple output languages. 
llvm-svn: 114433
 2010-09-21 14:59:42 +00:00
Mikhail Glushenkov
637b2871f8 Trailing whitespace. 
llvm-svn: 114432
 2010-09-21 14:59:34 +00:00
Lang Hames
f2e621dcb8 Fixed ambiguous call. 
llvm-svn: 114431
 2010-09-21 13:47:10 +00:00
Gabor Greif
324a43436f Fix buglet when the TST instruction directly uses the AND result. 
I am unable to write a test for this case, help is solicited, though...
What I did is to tickle the code in the debugger and verify that we do the right thing.

llvm-svn: 114430
 2010-09-21 13:30:57 +00:00
Lang Hames
eae68e1117 Added an additional PBQP problem builder which adds coalescing costs (both between pairs of virtuals, and between virtuals and physicals). 
llvm-svn: 114429
 2010-09-21 13:19:36 +00:00
Gabor Greif
99c07b1d95 Move the search for the appropriate AND instruction 
into OptimizeCompareInstr.
This necessitates the passing of CmpValue around,
so widen the virtual functions to accomodate.

No functionality changes.

llvm-svn: 114428
 2010-09-21 12:01:15 +00:00
Mikhail Glushenkov
2294629636 llvmc: put linker options in a separate OptList. 
llvm-svn: 114427
 2010-09-21 11:57:04 +00:00
Chris Lattner
b68bd70665 a few more trivial updates. This fixes PerformInsertVectorEltInMemory to not 
pass a completely incorrect SrcValue, which would result in a miscompile with
combiner-aa.

llvm-svn: 114411
 2010-09-21 07:32:19 +00:00
Chris Lattner
4320dda4fb convert the targets off the non-MachinePointerInfo of getLoad. 
llvm-svn: 114410
 2010-09-21 06:44:06 +00:00
Chris Lattner
1cad885bf7 add some accessors 
llvm-svn: 114409
 2010-09-21 06:43:24 +00:00
Chris Lattner
112cf9bc89 it's more elegant to put the "getConstantPool" and 
"getFixedStack" on the MachinePointerInfo class.  While
this isn't the problem I'm setting out to solve, it is the
right way to eliminate PseudoSourceValue, so lets go with it.

llvm-svn: 114406
 2010-09-21 06:22:23 +00:00
Chris Lattner
3496d7e718 ugh, missed a file. 
llvm-svn: 114405
 2010-09-21 06:16:40 +00:00
Chris Lattner
810a630851 update the X86 backend to use the MachinePointerInfo version of one 
of the getLoad methods.  This fixes at least one bug where an incorrect
svoffset is passed in (a potential combiner-aa miscompile).

llvm-svn: 114404
 2010-09-21 06:02:19 +00:00
Chris Lattner
80d9e51351 Fix a bug where the x86 backend would lower memcpy/memset of segment relative operations 
into non-segment-relative copies.

llvm-svn: 114402
 2010-09-21 05:43:34 +00:00
Chris Lattner
f94de5bf46 reimplement memcpy/memmove/memset lowering to use MachinePointerInfo 
instead of srcvalue/offset pairs.  This corrects SV info for mem 
operations whose size is > 32-bits.

llvm-svn: 114401
 2010-09-21 05:40:29 +00:00
Chris Lattner
b6d15db75c add some helpful accessors. 
llvm-svn: 114400
 2010-09-21 05:39:30 +00:00
Chris Lattner
dbe51ad1b8 add overloads for SelectionDAG::getLoad, getStore, getTruncStore that take a 
MachinePointerInfo.  Among other virtues, this doesn't silently  truncate the
svoffset to 32-bits.

llvm-svn: 114399
 2010-09-21 05:10:45 +00:00
Chris Lattner
e1fc671030 simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a MachinePointerInfo 
llvm-svn: 114397
 2010-09-21 04:57:15 +00:00
Chris Lattner
e4db4cad3b chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo, 
eliminating some weird "infer a frame address" logic which was dead.

llvm-svn: 114396
 2010-09-21 04:53:42 +00:00
Chris Lattner
5de5fada20 don't implicitly drop the offset of a machinememoperand when legalizing atomics. 
llvm-svn: 114395
 2010-09-21 04:51:11 +00:00
Chris Lattner
af01f8d142 force clients of MachineFunction::getMachineMemOperand to provide a 
MachinePointerInfo, propagating the type out a level of API.  Remove
the old MachineFunction::getMachineMemOperand impl.

llvm-svn: 114393
 2010-09-21 04:46:39 +00:00
Chris Lattner
2edbad8a3d convert targets to the new MF.getMachineMemOperand interface. 
llvm-svn: 114391
 2010-09-21 04:39:43 +00:00
Chris Lattner
940c35a3c3 start pushing MachinePointerInfo out through the MachineMemOperand interface 
to the MachineFunction construction methods.

llvm-svn: 114390
 2010-09-21 04:32:08 +00:00
Chris Lattner
7fdf193383 refactor the Value*/offset pair from MachineMemOperand out to a new 
MachinePointerInfo struct, no functionality change.

This also adds an assert to MachineMemOperand::MachineMemOperand
that verifies that the Value* is either null or is an IR pointer type.

llvm-svn: 114389
 2010-09-21 04:23:39 +00:00
Chris Lattner
547aed434e random cruft in my tree. 
llvm-svn: 114387
 2010-09-21 04:03:39 +00:00
Chris Lattner
ecdba24738 fix rdar://8453210, a crash handling a call through a GS relative load. 
For now, just disable folding the load into the call.

llvm-svn: 114386
 2010-09-21 03:37:00 +00:00
Rafael Espindola
93f3fb8aca Revert unrelated change that was accidentally included in the previous commit. 
llvm-svn: 114383
 2010-09-21 00:40:19 +00:00
Rafael Espindola
02af3cdd58 Implement support for .local and its "interesting" interactions with .comm. 
llvm-svn: 114382
 2010-09-21 00:24:38 +00:00
Evan Cheng
1ce02d180e Enable machine sinking critical edge splitting. e.g. 
define double @foo(double %x, double %y, i1 %c) nounwind {
  %a = fdiv double %x, 3.2
  %z = select i1 %c, double %a, double %y
  ret double %z
}

Was:
_foo:
        divsd   LCPI0_0(%rip), %xmm0
        testb   $1, %dil
        jne     LBB0_2
        movaps  %xmm1, %xmm0
LBB0_2:
        ret

Now:
_foo:
        testb   $1, %dil
        je      LBB0_2
        divsd   LCPI0_0(%rip), %xmm0
        ret
LBB0_2:
        movaps  %xmm1, %xmm0
        ret

This avoids the divsd when early exit is taken.
rdar://8454886

llvm-svn: 114372
 2010-09-20 22:52:00 +00:00
Dan Gohman
6eb9263898 Relax this check to silently swallow FE_INEXACT, following directions 
from rdar://8452472. This unbreaks gcc.dg/builtins-17.c.

llvm-svn: 114368
 2010-09-20 22:32:25 +00:00
Owen Anderson
b8811b9ed9 CombinerAA is now reordering these stores. 
llvm-svn: 114354
 2010-09-20 20:56:29 +00:00
Owen Anderson
fc94b337eb When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore, 
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.

This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.

llvm-svn: 114348
 2010-09-20 20:39:59 +00:00
Jim Grosbach
cf90f8beb1 Simplify ARM callee-saved register handling by removing the distinction 
between the high and low registers for prologue/epilogue code. This was
a Darwin-only thing that wasn't providing a realistic benefit anymore.
Combining the save areas simplifies the compiler code and results in better
ARM/Thumb2 codegen.

For example, previously we would generate code like:
        push    {r4, r5, r6, r7, lr}
        add     r7, sp, #12
        stmdb   sp!, {r8, r10, r11}
With this change, we combine the register saves and generate:
        push    {r4, r5, r6, r7, r8, r10, r11, lr}
        add     r7, sp, #12

rdar://8445635

llvm-svn: 114340
 2010-09-20 19:32:20 +00:00