Commit Graph

11407 Commits

Author SHA1 Message Date
Cameron Zwarich
a1920d7f51 Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo.
llvm-svn: 127175
2011-03-07 21:56:36 +00:00
Jakob Stoklund Olesen
68b2c1d239 Handle the special case of registers begin redefined by early-clobber defs.
In this case, the value need to be available at the load index instead of the
normal use index.

llvm-svn: 127167
2011-03-07 18:56:16 +00:00
Owen Anderson
11a49e845a Use the correct LHS type when determining the legalization of a shift's RHS type.
llvm-svn: 127163
2011-03-07 18:29:47 +00:00
Eric Christopher
1da11eb2ae Typo.
llvm-svn: 127131
2011-03-06 21:13:45 +00:00
NAKAMURA Takumi
6aa6938d66 lib/CodeGen/AsmPrinter/CMakeLists.txt: Fix CMake build, following up to r127099.
llvm-svn: 127114
2011-03-06 00:13:15 +00:00
Andrew Trick
ebbe4680ae Disable a couple of experimental heuristics to get the best results from the current implementation of -pre-RA-sched=list-ilp.
llvm-svn: 127113
2011-03-06 00:03:32 +00:00
Anton Korobeynikov
62e48532b9 Some first rudimentary support for ARM EHABI: print exception table in "text mode".
llvm-svn: 127099
2011-03-05 18:43:15 +00:00
Anton Korobeynikov
c746be3dc4 Add FrameSetup MI flags
llvm-svn: 127098
2011-03-05 18:43:04 +00:00
Jakob Stoklund Olesen
1d0ca5680a Work around a coalescer bug.
The coalescer can in very rare cases leave too large live intervals around after
rematerializing cheap-as-a-move instructions.

Linear scan doesn't really care, but live range splitting gets very confused
when a live range is killed by a ghost instruction.

I will fix this properly in the coalescer after 2.9 branches.

llvm-svn: 127096
2011-03-05 18:33:49 +00:00
Andrew Trick
2451bad445 Be explicit with abs(). Visual Studio workaround.
llvm-svn: 127075
2011-03-05 10:29:25 +00:00
Andrew Trick
dd4a20e7d7 Fix for -sched-high-latency-cycles in sched=list-ilp mode.
llvm-svn: 127071
2011-03-05 09:18:16 +00:00
Andrew Trick
d267891a21 Missing comment.
llvm-svn: 127068
2011-03-05 08:04:11 +00:00
Andrew Trick
7db197d209 Increased the register pressure limit on x86_64 from 8 to 12
regs. This is the only change in this checkin that may affects the
default scheduler. With better register tracking and heuristics, it
doesn't make sense to artificially lower the register limit so much.

Added -sched-high-latency-cycles and X86InstrInfo::isHighLatencyDef to
give the scheduler a way to account for div and sqrt on targets that
don't have an itinerary. It is currently defaults to 10 (the actual
number doesn't matter much), but only takes effect on non-default
schedulers: list-hybrid and list-ilp.

Added several heuristics that can be individually disabled for the
non-default sched=list-ilp mode. This helps us determine how much
better we can do on a given benchmark than the default
scheduler. Certain compute intensive loops run much faster in this
mode with the right set of heuristics, and it doesn't seem to have
much negative impact elsewhere. Not all of the heuristics are needed,
but we still need to experiment to decide which should be disabled by
default for sched=list-ilp.

llvm-svn: 127067
2011-03-05 08:00:22 +00:00
Jakob Stoklund Olesen
52420a0a1e Rework the global split cost calculation.
The global cost is the sum of block frequencies for spill code that must be
inserted because preferences weren't met.

llvm-svn: 127062
2011-03-05 03:28:51 +00:00
Jakob Stoklund Olesen
79944a508a Compute the constraints for global live range splitting from an interference pattern.
This simplifies the code and makes it faster too.

The interference patterns are saved for each candidate register. It will be
reused for actually executing the split. Work in progress.

llvm-svn: 127054
2011-03-05 01:10:31 +00:00
Jim Grosbach
372394916e Teach the register scavenger to take subregs into account when finding a free register.
llvm-svn: 127049
2011-03-05 00:20:19 +00:00
Eric Christopher
94626fc599 Improve readability with some whitespace!
llvm-svn: 127043
2011-03-04 22:47:12 +00:00
Jakob Stoklund Olesen
87b598dd85 Extract a method. No functional change.
llvm-svn: 127040
2011-03-04 22:11:11 +00:00
Jakob Stoklund Olesen
e3b9a00584 Go back to comparing spill weights when deciding if interference can be evicted.
It gives better results. Sometimes, a live range can be large and still have
high spill weight. Such a range should not be spilled.

llvm-svn: 127036
2011-03-04 21:32:50 +00:00
Jakob Stoklund Olesen
8b66caf12a Renumber slot indexes locally when possible.
Initially, slot indexes are quad-spaced. There is room for inserting up to 3
new instructions between the original instructions.

When we run out of indexes between two instructions, renumber locally using
double-spaced indexes. The original quad-spacing means that we catch up quickly,
and we only have to renumber a handful of instructions to get a monotonic
sequence. This is much faster than renumbering the whole function as we did
before.

llvm-svn: 127023
2011-03-04 19:43:38 +00:00
Jakob Stoklund Olesen
d99d8cfdf0 Number SlotIndexes uniformly without looking at the number of defs on each instruction.
You can't really predict how many indexes will be needed from the number of
defs, so let's keep it simple.

Also remove an extra empty index that was inserted after each basic block. It
was intended for live-out ranges, but it was never used that way.

llvm-svn: 127014
2011-03-04 18:51:09 +00:00
Jakob Stoklund Olesen
dfc9b0b15f Add SlotIndex statistics.
llvm-svn: 127007
2011-03-04 18:08:29 +00:00
Jakob Stoklund Olesen
c3193f4aa8 Tweak debug output. No functional changes.
llvm-svn: 127006
2011-03-04 18:08:26 +00:00
Duncan Sands
f6c9de94f8 Revert commit 126684 "Use the correct shift amount type". It is only the correct
type after type legalization has completed.  Before then it may simply not be big
enough to hold the shift amount, particularly on x86 which uses a very small type
for shifts (this issue broke stuff in the past which is why LegalizeTypes carefully
uses a large type for shift amounts).

llvm-svn: 127000
2011-03-04 14:28:59 +00:00
Andrew Trick
1478921dc0 Minor pre-RA-sched fixes and cleanup.
Fix the PendingQueue, then disable it because it's not required for
the current schedulers' heuristics.
Fix the logic for the unused list-ilp scheduler.

llvm-svn: 126981
2011-03-04 02:03:45 +00:00
Jakob Stoklund Olesen
3c64ea5ad2 Precompute block frequencies, pow() isn't free.
llvm-svn: 126975
2011-03-04 00:58:40 +00:00
Jakob Stoklund Olesen
5bc7a96cca Use an IndexedMap instead of a DenseMap for the live-out cache.
This speeds up updateSSA() so it only accounts for 5% of the live range
splitting time.

llvm-svn: 126972
2011-03-04 00:15:36 +00:00
Bill Wendling
6e6a0422eb There are times when the landing pad won't have a call to 'eh.selector' in
it. It's been assumed up til now that it would be in its immediate
successor. However, this isn't necessarily the case. It could be in one of its
successor's successors.

Modify the code to more thoroughly check for an 'eh.selector' call in
successors. It only looks at a successor if we get there as a result of an
unconditional branch.

Testcase ObjC/exceptions-4.m in r126968.

llvm-svn: 126969
2011-03-03 23:14:05 +00:00
Eli Friedman
26f5c96de3 Revert r123908; the code in question is completely untested and wrong.
llvm-svn: 126964
2011-03-03 22:33:23 +00:00
Devang Patel
a7b5a00033 Fix typo.
llvm-svn: 126962
2011-03-03 21:49:41 +00:00
Devang Patel
3c2bd93f9e Fix thinko in previous check-in.
Add comment.

llvm-svn: 126959
2011-03-03 20:08:10 +00:00
Devang Patel
4adbb350be llvm::Function argument count is not a good indicator of how many arugments does the function have at source level. If we need more space, just resize vector conservatively. This vector is only used once per function.
llvm-svn: 126957
2011-03-03 20:02:02 +00:00
Jim Grosbach
e4ef37b298 Allow a target to choose whether to prefer the scavenger emergency spill slot
be next to the frame pointer or the stack pointer.

llvm-svn: 126956
2011-03-03 20:01:52 +00:00
Jakob Stoklund Olesen
3511ad1023 Renumber slot indexes uniformly instead of spacing according to the number of defs.
There are probably much larger speedups to be had by renumbering locally instead
of looping over the whole function. For now, the greedy register allocator is
25% faster.

llvm-svn: 126926
2011-03-03 06:29:01 +00:00
Jakob Stoklund Olesen
d0930e03c1 Represent sentinel slot indexes with a null pointer.
This is much faster than using a pointer to a ManagedStatic object accessed with
a function call. The greedy register allocator is 5% faster overall just from
the SlotIndex default constructor savings.

llvm-svn: 126925
2011-03-03 05:40:04 +00:00
Jakob Stoklund Olesen
2e6407e9aa Avoid comparing invalid slot indexes, and assert that it doesn't happen.
The SlotIndex created by the default construction does not represent a position
in the function, and it doesn't make sense to compare it to other indexes.

llvm-svn: 126924
2011-03-03 05:18:19 +00:00
Jakob Stoklund Olesen
92d724fb69 Avoid comparing invalid slot indexes.
llvm-svn: 126922
2011-03-03 04:23:52 +00:00
Jakob Stoklund Olesen
2759a169ea Cache basic block bounds instead of asking SlotIndexes::getMBBRange all the time.
This speeds up the greedy register allocator by 15%.
DenseMap is not as fast as one might hope.

llvm-svn: 126921
2011-03-03 03:41:29 +00:00
Jakob Stoklund Olesen
09a1939164 Change the SplitEditor interface to a single instance can be shared for multiple splits.
llvm-svn: 126912
2011-03-03 01:29:13 +00:00
Jakob Stoklund Olesen
df789f852e Only run the updateSSA loop when we have actually seen multiple values.
When only a single value has been seen, new PHIDefs are never needed.

llvm-svn: 126911
2011-03-03 01:29:10 +00:00
Jakob Stoklund Olesen
31949ff3f8 Fix PHI handling in LiveIntervals::shrinkToUses().
We need to wait until we meet a PHIDef in its defining block before resurrecting
PHIKills in the predecessors.

This should unbreak the llvm-gcc-build-x86_64-darwin10-x-mingw32-x-armeabi bot.

llvm-svn: 126905
2011-03-03 00:20:51 +00:00
Bob Wilson
42e5d02b10 Avoid exponential blow-up when printing DAGs.
David Greene changed CannotYetSelect() to print the full DAG including multiple
copies of operands reached through different paths in the DAG.  Unfortunately
this blows up exponentially in some cases.  The depth limit of 100 is way too
high to prevent this -- I'm seeing a message string of 150MB with a depth of
only 40 in one particularly bad case, even though the DAG has less than 200
nodes.  Part of the problem is that the printing code is following chain
operands, so if you fail to select an operation with a chain, the printer will
follow all the chained operations back to the entry node.

llvm-svn: 126899
2011-03-02 23:38:06 +00:00
Jakob Stoklund Olesen
c5dc2c61fc Turn the Edit member into a pointer so it can change dynamically.
No functional change.

llvm-svn: 126898
2011-03-02 23:31:50 +00:00
Jakob Stoklund Olesen
9697ef837c Transfer simply defined values directly without recomputing liveness and SSA.
Values that map to a single new value in a new interval after splitting don't
need new PHIDefs, and if the parent value was never rematerialized the live
range will be the same.

llvm-svn: 126894
2011-03-02 23:05:19 +00:00
Jakob Stoklund Olesen
22469169cd Extract a method. No functional change.
llvm-svn: 126893
2011-03-02 23:05:16 +00:00
Stuart Hastings
a40e563e4e Can't introduce floating-point immediate constants after legalization.
Radar 9056407.

llvm-svn: 126864
2011-03-02 19:36:30 +00:00
Cameron Zwarich
bb1d033824 Fix some typos.
llvm-svn: 126829
2011-03-02 04:03:46 +00:00
Jakob Stoklund Olesen
6751d65fd6 Move extendRange() into SplitEditor and delete the LiveRangeMap class.
Extract the updateSSA() method from the too long extendRange().

LiveOutCache can be shared among all the new intervals since there is at most
one of the new ranges live out from each basic block.

llvm-svn: 126818
2011-03-02 01:59:34 +00:00
Nick Lewycky
6ad594dd20 Quiet a compiler warning about unused variable 'ExtVNI'.
llvm-svn: 126815
2011-03-02 01:43:30 +00:00
Evan Cheng
5275ba7f98 Catch more cases where 2-address pass should 3-addressify instructions. rdar://9002648.
llvm-svn: 126811
2011-03-02 01:08:17 +00:00