34048 Commits

Author SHA1 Message Date
Kevin Enderby
a1e729dabc Fix MachOObjectFile::getSymbolSection() to not call report_fatal_error()
but to return object_error::parse_failed.  Then made the code in llvm-nm
do for Mach-O files what is done in the darwin native tools which is to
print "(?,?)" or just "s" for bad section indexes.  Also added a test to show
it prints the bad section index of "42" when printing the fields as raw hex.

llvm-svn: 258434
2016-01-21 21:13:27 +00:00
Sanjay Patel
1087b8fb2a [LibCallSimplifier] don't get fooled by a fake fmin()
This is similar to the bug/fix:
https://llvm.org/bugs/show_bug.cgi?id=26211
http://reviews.llvm.org/rL258325

The fmin() test case reveals another bug caused by sloppy
code duplication. It will crash without this patch because
fp128 is a valid floating-point type, but we would think
that we had matched a function that used doubles.

The new helper function can be used to replace similar
checks that are used in several other places in this file.

llvm-svn: 258428
2016-01-21 20:19:54 +00:00
David Majnemer
4981d2326a [InstCombine] Simplify (x >> y) <= x
This commit extends the patterns recognised by InstSimplify to also handle (x >> y) <= x in the same way as (x /u y) <= x.

The missing optimisation was found investigating why LLVM did not optimise away bound checks in a binary search: https://github.com/rust-lang/rust/pull/30917

Patch by Andrea Canciani!

Differential Revision: http://reviews.llvm.org/D16402

llvm-svn: 258422
2016-01-21 18:55:54 +00:00
Rong Xu
6c08b3c582 [PGO] IR level instrumentation of indirect call value profiling
This patch adds the instrumentation for indirect call value profiling. It finds all the indirect call-sites and generates instrprof_value_profile intrinsic calls. A new opt level option -disable-vp is introduced to disable this instrumentation.

Reviewers: davidxl, betulb, vsk

Differential Revision: http://reviews.llvm.org/D16016

llvm-svn: 258417
2016-01-21 18:11:44 +00:00
Matthew Simpson
d8f9568a4c Revert "[SLP] Truncate expressions to minimum required bit width"
This reverts commit r258404.

llvm-svn: 258408
2016-01-21 17:17:20 +00:00
Vedant Kumar
28de1d0a47 [GCOV] Avoid emitting profile arcs for module and skeleton CUs
Do not emit profile arc files and note files for module and skeleton
CU's.

Our users report seeing unexpected *.gcda and *.gcno files in their
projects when using gcov-style profiling with modules or frameworks.
The unwanted files come from these modules. This is not very helpful
for end-users. Further, we've seen reports of instrumented programs
crashing while writing these files out (due to I/O failures).

rdar://problem/22838296

Reviewed-by: aprantl

Differential Revision: http://reviews.llvm.org/D15997

llvm-svn: 258406
2016-01-21 17:04:42 +00:00
Matthew Simpson
14b16e7ee1 [SLP] Truncate expressions to minimum required bit width
This change attempts to produce vectorized integer expressions in bit widths
that are narrower than their scalar counterparts. The need for demotion arises
especially on architectures in which the small integer types (e.g., i8 and i16)
are not legal for scalar operations but can still be used in vectors. Like
similar work done within the loop vectorizer, we rely on InstCombine to perform
the actual type-shrinking. We use the DemandedBits analysis and
ComputeNumSignBits from ValueTracking to determine the minimum required bit
width of an expression.

Differential revision: http://reviews.llvm.org/D15815

llvm-svn: 258404
2016-01-21 16:31:55 +00:00
Scott Egerton
18d74225d6 [mips] Allowed dla instructions on 32-bit architectures.
Summary:
This is now the same as the behaviour of the GNU assembler. This was done
as it is required in order to build the Linux kernel with the integrated
assembler enabled.

Reviewers: dsanders, vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D13594

llvm-svn: 258400
2016-01-21 15:11:01 +00:00
Teresa Johnson
c88ea8cc50 Revert obsolete llvm-link -preserve-modules option/test
This testing mode is now obsolete with the change to linkInModule
to take a std::unique_ptr to Module.

llvm-svn: 258399
2016-01-21 14:28:52 +00:00
Igor Breger
73167c5d63 AVX512: Masked move intrinsic implementation.
Implemented intrinsic for the follow instructions (reg move) : VMOVDQU8/16, VMOVDQA32/64, VMOVAPS/PD.

Differential Revision: http://reviews.llvm.org/D16316

llvm-svn: 258398
2016-01-21 14:18:11 +00:00
Michael Zuckerman
42638cd6f9 [AVX512] Adding VPERMT2B and VPERMI2B Intrinsics
Differential Revision: http://reviews.llvm.org/D16398

llvm-svn: 258397
2016-01-21 13:36:01 +00:00
Marina Yatsina
a348761e3d [X86] - Removing warning on legal cases caused by commit r258132
There's an overloading of the "movsd" and "cmpsd" instructions, e.g. movsd can be either "Move Data from String to String" or "Move or Merge Scalar Double-Precision Floating-Point Value".
The former should produce warnings when parsing a memory operand that is not ESI/EDI, but the latter should not.

Fixed the code to produce warnings only after making sure we're dealing with the first case.

Expanded the tests of the produced warnings + fixed RUN line of the test so that it would check both stdout and stderr

Differential Revision: http://reviews.llvm.org/D16359

llvm-svn: 258393
2016-01-21 11:37:06 +00:00
Xinliang David Li
45d037347b re-submit test case (withright format-version)
llvm-svn: 258384
2016-01-21 02:35:59 +00:00
Xinliang David Li
c16f1f078e Revert 258376 -- wrong version
llvm-svn: 258377
2016-01-21 01:21:00 +00:00
Xinliang David Li
7a6b4b2882 [Coverage] Add a test case for comdat
The binary contains two (merged) covmap sections which
have duplicate CovMapRecords from comdat (template instantation).
This test makes sure the reader reads it properly. It also
tests that the coverage data from different instantiations
of the same template function are properly merged in show
output.

llvm-svn: 258376
2016-01-21 00:57:42 +00:00
Dan Gohman
2536ce124f [SelectionDAG] Fix constant offset folding to avoid commuting non-commutative operators.
This fixes a miscompile in MultiSource/Benchmarks/MiBench/consumer-lame
introduced in r258296.

llvm-svn: 258366
2016-01-20 23:16:59 +00:00
Chad Rosier
176047fcfd MachineScheduler: Honor optnone functions in the pre-ra scheduler.
llvm-svn: 258363
2016-01-20 22:38:25 +00:00
Evgeniy Stepanov
6c4fc98afa Fix PR26152.
Fix the condition for when the new global takes over the name of
the existing one to be the negation of the condition for the new
global to get internal linkage.

llvm-svn: 258355
2016-01-20 22:05:50 +00:00
Tom Stellard
1f5cbb2395 AMDGPU/SI: Promote i1 SETCC operations
Summary:
While working on uniform branching, I've hit a few cases where we emit
i1 SETCC operations.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D16233

llvm-svn: 258352
2016-01-20 21:48:24 +00:00
Matt Arsenault
8442657275 AMDGPU: Remove AMDGPU.trunc intrinsic
llvm-svn: 258348
2016-01-20 21:05:53 +00:00
Matt Arsenault
ef8d51e654 AMDGPU: Remove AMDIL.fraction intrinsic
llvm-svn: 258347
2016-01-20 21:05:49 +00:00
Matt Arsenault
d256fbf59a AMDGPU: Remove AMDIL.round.nearest intrinsic
llvm-svn: 258346
2016-01-20 21:05:40 +00:00
Matt Arsenault
c463ea6063 AMDGPU: Remove abs intrinsic
llvm-svn: 258343
2016-01-20 20:58:29 +00:00
Matt Arsenault
97bf24516f AMDGPU: Remove min/max intrinsics
This removes support for mesa 11.0.x

llvm-svn: 258342
2016-01-20 20:50:19 +00:00
Sanjoy Das
b0b3d4c99d Add a "gc-transition" operand bundle
Summary:
This adds a new kind of operand bundle to LLVM denoted by the
`"gc-transition"` tag.  Inputs to `"gc-transition"` operand bundle are
lowered into the "transition args" section of `gc.statepoint` by
`RewriteStatepointsForGC`.

This removes the last bit of functionality that was unsupported in the
deopt bundle based code path in `RewriteStatepointsForGC`.

Reviewers: pgavlin, JosephTremoulet, reames

Subscribers: sanjoy, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D16342

llvm-svn: 258338
2016-01-20 19:50:25 +00:00
Simon Atanasyan
65cb28f51e [llvm-readobj][ELF] Teach llvm-readobj to show arch specific ELF section's flags
Some architecture specific ELF section flags might have the same value
(for example SHF_X86_64_LARGE and SHF_HEX_GPREL) and we have to check
machine architectures to select an appropriate set of possible flags.

The patch selects architecture specific flags into separate arrays
`ElfxxxSectionFlags` and combines `ElfSectionFlags` and `ElfxxxSectionFlags`
before pass to the `StreamWriter::printFlags()` method.

Differential Revision: http://reviews.llvm.org/D16269

llvm-svn: 258334
2016-01-20 19:15:18 +00:00
Quentin Colombet
acf8746c63 [GlobalISel] Add a generic machine opcode for ADD.
The selection process being split into separate passes, we need generic opcodes
to translate the LLVM IR to target independent code.

This patch adds an opcode for addition: G_ADD.

Differential Revision: http://reviews.llvm.org/D15472

llvm-svn: 258333
2016-01-20 19:14:55 +00:00
Rafael Espindola
a193e28818 Accept subtractions involving a weak symbol.
When a symbol S shows up in an expression in assembly there are two
possible interpretations
* The expression is referring to the value of S in this file.
* The expression is referring to the value after symbol resolution.

In the first case the assembler can reason about the value and try to
produce a relocation.
In the second case, that is only possible if the symbol cannot be
preempted.

Assemblers are not very consistent about which interpretation gets used.
This changes MC to agree with GAS in the case of an expression of the
form "Sym - WeakSym".

llvm-svn: 258329
2016-01-20 18:57:48 +00:00
Sanjay Patel
3635b71b45 [LibCallSimplifier] don't get fooled by a fake sqrt()
The test case will crash without this patch because the subsequent call to
hasUnsafeAlgebra() assumes that the call instruction is an FPMathOperator
(ie, returns an FP type).

This part of the function signature check was omitted for the sqrt() case, 
but seems to be in place for all other transforms.

Before:
http://reviews.llvm.org/rL257400
...we would have needlessly continued execution in optimizeSqrt(), but the
bug was harmless because we'd eventually fail some other check and return
without damage.

This should fix:
https://llvm.org/bugs/show_bug.cgi?id=26211

Differential Revision: http://reviews.llvm.org/D16198

llvm-svn: 258325
2016-01-20 17:41:14 +00:00
Keith Walker
a38818ea04 Write AArch64 big endian data fixup entries as BE.
There was support for writing the AArch64 big endian data fixup entries in
the .eh_frame section in BE.    This is changed to write all such fixup
entries in BE with no restriction on the section.  This is similar to
the existing support for fixup entries for ARM.

A test is added to check the length field in the .debug_line section as
this is an example of where such a fixup occurs.

Differential Revision: http://reviews.llvm.org/D16064

llvm-svn: 258320
2016-01-20 15:59:14 +00:00
Michael Zuckerman
852ec66515 [AVX512] Adding VPERMB Intrinsics
Differential Revision: http://reviews.llvm.org/D16296

llvm-svn: 258316
2016-01-20 15:24:56 +00:00
Krzysztof Parzyszek
d1195ef11e Proper handling of diamond-like cases in if-conversion
If converter was somewhat careless about "diamond" cases, where there
was no join block, or in other words, where the true/false blocks did
not have analyzable branches. In such cases, it was possible for it to
remove (needed) branches, resulting in a loss of entire basic blocks.

Differential Revision: http://reviews.llvm.org/D16156

llvm-svn: 258310
2016-01-20 13:14:52 +00:00
Igor Breger
866bd3ac74 AVX512: Store (MOVNTPD, MOVNTPS, MOVNTDQ) using non-temporal hint intrinsic implementation.
Differential Revision: http://reviews.llvm.org/D16350

llvm-svn: 258309
2016-01-20 13:11:47 +00:00
Oliver Stannard
80ad1149bf [AArch64] Fix two bugs in the .inst directive
The AArch64 .inst directive was implemented using EmitIntValue, which resulted
in both $x and $d (code and data) mapping symbols being emitted at the same
address. This fixes it to only emit the $x mapping symbol.

EmitIntValue also emits the value in big-endian order when targeting big-endian
systems, but instructions are always emitted in little-endian order for
AArch64.

Differential Revision: http://reviews.llvm.org/D16349

llvm-svn: 258308
2016-01-20 12:54:31 +00:00
Dan Gohman
4d1c91fc4d [SelectionDAG] Fold more offsets into GlobalAddresses
SelectionDAG previously missed opportunities to fold constants into
GlobalAddresses in several areas. For example, given `(add (add GA, c1), y)`, it
would often reassociate to `(add (add GA, y), c1)`, missing the opportunity to
create `(add GA+c, y)`. This isn't often visible on targets such as X86 which
effectively reassociate adds in their complex address-mode folding logic,
however it is currently visible on WebAssembly since it currently has very
simple address mode folding code that doesn't reassociate anything.

This patch fixes this by making SelectionDAG fold offsets into GlobalAddresses
at the same times that it folds constants together, so that it doesn't miss any
opportunities to perform such folding.

Differential Revision: http://reviews.llvm.org/D16090

llvm-svn: 258296
2016-01-20 07:03:08 +00:00
Dan Gohman
eee0a5fe68 [WebAssembly] Tighten up some regexes in some tests.
llvm-svn: 258295
2016-01-20 05:55:09 +00:00
Dan Gohman
e0f4353910 [WebAssembly] Don't stackify stores across instructions with side effects.
llvm-svn: 258285
2016-01-20 04:21:16 +00:00
Joseph Tremoulet
de5c9a8723 [Inliner/WinEH] Honor implicit nounwinds
Summary:
Funclet EH tables require that a given funclet have only one unwind
destination for exceptional exits.  The verifier will therefore reject
e.g. two cleanuprets with different unwind dests for the same cleanup, or
two invokes exiting the same funclet but to different unwind dests.
Because catchswitch has no 'nounwind' variant, and because IR producers
are not *required* to annotate calls which will not unwind as 'nounwind',
it is legal to nest a call or an "unwind to caller" catchswitch within a
funclet pad that has an unwind destination other than caller; it is
undefined behavior for such a call or catchswitch to unwind.

Normally when inlining an invoke, calls in the inlined sequence are
rewritten to invokes that unwind to the callsite invoke's unwind
destination, and "unwind to caller" catchswitches in the inlined sequence
are rewritten to unwind to the callsite invoke's unwind destination.
However, if such a call or "unwind to caller" catchswitch is located in a
callee funclet that has another exceptional exit with an unwind
destination within the callee, applying the normal transformation would
give that callee funclet multiple unwind destinations for its exceptional
exits.  There would be no way for EH table generation to determine which
is the "true" exit, and the verifier would reject the function
accordingly.

Add logic to the inliner to detect these cases and leave such calls and
"unwind to caller" catchswitches as calls and "unwind to caller"
catchswitches in the inlined sequence.

This fixes PR26147.


Reviewers: rnk, andrew.w.kaylor, majnemer

Subscribers: alexcrichton, llvm-commits

Differential Revision: http://reviews.llvm.org/D16319

llvm-svn: 258273
2016-01-20 02:15:15 +00:00
Tom Stellard
936d0be6f9 AMDGPU/SI: Prevent the DAGCombiner from creating setcc with i1 inputs
Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D15035

llvm-svn: 258256
2016-01-20 00:13:22 +00:00
Sanjoy Das
d2d9b2b709 [MachineSink] Don't break ImplicitNulls
Summary:
This teaches MachineSink to not sink instructions that might break the
implicit null check optimization that runs later.  This should not
affect frontends that do not use implicit null checks.

Reviewers: aadg, reames, hfinkel, atrick

Subscribers: majnemer, llvm-commits

Differential Revision: http://reviews.llvm.org/D14632

llvm-svn: 258254
2016-01-20 00:06:14 +00:00
Quentin Colombet
2fd9288cb1 [X86] Do not run shrink-wrapping on function with split-stack attribute or HiPE
calling convention.
The implementation of the related callbacks in the x86 backend for such
functions are not ready to deal with a prologue block that is not the entry
block of the function.

This fixes PR26107, but the longer term solution would be to fix those callbacks.

llvm-svn: 258221
2016-01-19 23:29:03 +00:00
Sanjay Patel
691c821001 add tests to show missing memset/malloc optimizations (PR25892)
llvm-svn: 258218
2016-01-19 23:07:10 +00:00
David Majnemer
7c946c0aa3 [MC, COFF] Add .reloc support for WinCOFF
This adds rudimentary support for a few relocations that we will use for
the CodeView debug format.

llvm-svn: 258216
2016-01-19 23:05:27 +00:00
Simon Pilgrim
709595fe14 [X86][SSE] Add VZEXT_MOVL target shuffle decoding.
Add support for decoding VZEXT_MOVL target shuffle masks, allowing it to be used as a source in target shuffle combines.

llvm-svn: 258215
2016-01-19 23:04:56 +00:00
Simon Pilgrim
f1e3dd87e3 [X86][SSE] Add INSERTPS target shuffle combines.
As vector shuffles can only reference two inputs many (V)INSERTPS patterns end up being split over two targets shuffles.

This patch adds combines to attempt to combine (V)INSERTPS nodes with input/output nodes that are just zeroing out these additional vector elements.

Differential Revision: http://reviews.llvm.org/D16072

llvm-svn: 258205
2016-01-19 22:24:12 +00:00
Sanjoy Das
c6887c7e27 [SCEV] Fix PR26207
In some cases, the max backedge taken count can be more conservative
than the exact backedge taken count (for instance, because
ScalarEvolution::getRange is not control-flow sensitive whereas
computeExitLimitFromICmp can be).  In these cases,
computeExitLimitFromCond (specifically the bit that deals with `and` and
`or` instructions) can create an ExitLimit instance with a
`SCEVCouldNotCompute` max backedge count expression, but a computable
exact backedge count expression.  This violates an implicit SCEV
assumption: a computable exact BE count should imply a computable max BE
count.

This change

 - Makes the above implicit invariant explicit by adding an assert to
   ExitLimit's constructor

 - Changes `computeExitLimitFromCond` to be more robust around
   conservative max backedge counts

llvm-svn: 258184
2016-01-19 20:53:51 +00:00
Michael Zuckerman
553ef84e85 [AVX512] Adding VPERMT2B and VPERMI2B instruction .
Differential Revision: http://reviews.llvm.org/D16297

llvm-svn: 258161
2016-01-19 18:47:02 +00:00
Sanjay Patel
a2ab3d6165 [LibCallSimplifier] use instruction-level fast-math-flags to shrink calls
This is a continuation of adding FMF to call instructions:
http://reviews.llvm.org/rL255555

llvm-svn: 258158
2016-01-19 18:38:52 +00:00
Sanjay Patel
a46637dede [LibCallSimplifier] use instruction-level fast-math-flags to transform pow(x, [small integer]) calls
This is a continuation of adding FMF to call instructions:
http://reviews.llvm.org/rL255555

As with D15937, the intent of the patch is to preserve the current behavior of the transform
except that we use the pow call's 'fast' attribute as a trigger rather than a function-level
attribute.

The TODO comment notes a potential follow-on patch that would propagate FMF to the new
instructions.

Differential Revision: http://reviews.llvm.org/D16122

llvm-svn: 258153
2016-01-19 18:15:12 +00:00
Michael Zuckerman
71a84dc5a5 [AVX512] Adding VPERMB instruction
Differential Revision: http://reviews.llvm.org/D16294

llvm-svn: 258144
2016-01-19 17:07:43 +00:00