Commit Graph

20969 Commits

Author SHA1 Message Date
Justin Bogner
aaa0b69577 Support: Fix option handling when using cl::Required with aliasopt
Until now, attempting to create an alias of a required option would
complain if the user supplied the alias, because the required option
didn't have a value. Similarly, if you said the alias was required,
then using the base option would complain that the alias wasn't
supplied. Lastly, if you put required on both, *neither* option would
work.

By changning alias to overload addOccurrence and setting cl::Required
on the original option, we can get this to behave in a more useful
way. I've also added a test and updated a user that was getting this
wrong.

llvm-svn: 212986
2014-07-14 20:53:57 +00:00
Matt Arsenault
85ca1395b9 Add CreatePointerBitCastOrAddrSpaceCast to IRBuilder and co.
llvm-svn: 212962
2014-07-14 17:24:35 +00:00
Matt Arsenault
b15bee9f9a Update comments to include addrspacecast
llvm-svn: 212961
2014-07-14 17:24:31 +00:00
Matt Arsenault
13de5a5273 Remove GCC 3.3 workaround
llvm-svn: 212960
2014-07-14 17:11:20 +00:00
Saleem Abdulrasool
1a4a32525a MC: make MCWin64EHInstruction a POD-like struct
This is the first of a number of changes designed to generalise
MCWin64EHInstruction to support different target architectures.  An ordered set
(vector) of these instructions is saved per frame to permit the emission of
information for Windows NT style unwinding.  The only bit of information which
is actually target specific here is the Opcode for the unwinding bytecode.  The
remainder of the information is simply generic information that is relevant to
the Windows NT unwinding model.

Remove the accessors for the fields, making them const and public instead.  Sink
the knowledge of the alias'ed name into the single source and sink a single-use
check method into the use.

llvm-svn: 212914
2014-07-13 19:03:45 +00:00
Saleem Abdulrasool
9786281f88 MC: make DWARF and Windows unwinding handling more similar
Rename member variables and functions for the MCStreamer for DWARF-like
unwinding management.  Rename the Windows ones as well and make the naming and
handling similar across the two.  No functional change intended.

llvm-svn: 212912
2014-07-13 19:03:36 +00:00
Matt Arsenault
ef03e8a51b Try to fix MSVC warning.
llvm-svn: 212889
2014-07-12 23:16:26 +00:00
Matt Arsenault
99aaf6b5f7 Try to fix MSVC build
llvm-svn: 212888
2014-07-12 23:09:02 +00:00
Matt Arsenault
c5722e9461 Try to fix MSVC build
llvm-svn: 212886
2014-07-12 22:19:49 +00:00
Matt Arsenault
3d717281d0 Templatify DominanceFrontier.
Theoretically this should now work for MachineBasicBlocks.

llvm-svn: 212885
2014-07-12 21:59:52 +00:00
Saleem Abdulrasool
00c379d824 AArch64: add support for llvm.aarch64.hint intrinsic
This adds a llvm.aarch64.hint intrinsic to mirror the llvm.arm.hint in order to
support the various hint intrinsic functions in the ACLE.

Add an optional pattern field that permits the subclass to specify the pattern
that matches the selection.  The intrinsic pattern is set as mayLoad, mayStore,
so overload the value for the definition of the hint instruction.

llvm-svn: 212883
2014-07-12 21:20:49 +00:00
Saleem Abdulrasool
d18037e2c8 MC: rename MCW64UnwindInfo to MCWinFrameInfo
This structure contains information related to the call frame used to generate
unwinding information.  Rename this to reflect the future use to represent the
shared state between various architectures for WinCFI information.

llvm-svn: 212881
2014-07-12 20:49:09 +00:00
Duncan P. N. Exon Smith
72e8fb652a BFI: Add constructor for Weight
llvm-svn: 212868
2014-07-12 00:26:00 +00:00
Duncan P. N. Exon Smith
fdb4eaa3bf BFI: Clean up BlockMass
Implementation is small now -- the interesting logic was moved to
`BranchProbability` a while ago.  Move it into `bfi_detail` and get rid
of the related TODOs.

I was originally planning to define it within `BlockFrequencyInfoImpl`
(or `BFIIBase`), but it seems cleaner in a namespace.  Besides,
`isPodLike` needs to be specialized before `BlockMass` can be used in
some of the other data structures, and there isn't a clear way to do
that.

llvm-svn: 212866
2014-07-12 00:21:30 +00:00
Reid Kleckner
baa1dcd25b Option: Propagate flags from groups to options in each group
This should make it easy to set a flag for a whole group of clang driver
options.

llvm-svn: 212865
2014-07-12 00:18:58 +00:00
Duncan P. N. Exon Smith
8c157be757 BFI: Mark the end of namespaces
llvm-svn: 212861
2014-07-11 23:56:50 +00:00
Juergen Ributzka
a073ea35a3 [FastISel] Add target-independent patchpoint intrinsic support. WIP.
This implements the target-independent lowering for the patchpoint
intrinsic. Targets have to implement the FastLowerCall
hook to support this intrinsic.

Related to <rdar://problem/17427052>

llvm-svn: 212849
2014-07-11 22:19:02 +00:00
Juergen Ributzka
d2becf0ab9 [FastISel] Add basic infrastructure to support a target-independent call lowering hook in FastISel. WIP
The infrastructure mimics the call lowering we have already in place for
SelectionDAG, but with limitations. For example structure return demotion and
non-simple types are not supported (yet).

Currently every backend has its own implementation and duplicated code for call
lowering. There is also no specified interface that could be called from
target-independent code. The target-hook is opt-in and doesn't affect current
implementations.

llvm-svn: 212848
2014-07-11 22:01:42 +00:00
Argyrios Kyrtzidis
5daccdf69f Move the API and implementation of clang::driver::getARMCPUForMArch() to llvm::Triple::getARMCPUForArch().
Suggested by Eric Christopher.

llvm-svn: 212846
2014-07-11 21:44:54 +00:00
Juergen Ributzka
17e8cfdcf1 [FastISel] Make isInTailCallPosition independent of SelectionDAG.
Break out the arguemnts required from SelectionDAG, so that this function can
also be used by FastISel.

llvm-svn: 212844
2014-07-11 20:50:47 +00:00
Juergen Ributzka
1e7aababed [FastISel] Breakout intrinsic lowering into a separate function and add a target-hook.
Create a separate helper function for target-independent intrinsic lowering. Also
add an target-hook that allows to directly call into a target-sepcific intrinsic
lowering method. Currently the implementation is opt-in and doesn't affect
existing target implementations.

llvm-svn: 212843
2014-07-11 20:42:12 +00:00
Ulrich Weigand
b00a7fe1dd [MC] Constify MCELF::GetVisibility and MCELF::getOther
These two routines didn't take a "const MCSymbolData &SD"
like the other MCELF::Get routines for some reason ...

llvm-svn: 212834
2014-07-11 17:34:44 +00:00
Mark Heffernan
937bab3688 Partially fix PR20058: reduce compile time for loop unrolling with very high count by reducing calls to SE->forgetLoop
llvm-svn: 212782
2014-07-10 23:30:06 +00:00
Lang Hames
e8a1ad111e [RuntimeDyld] Improve error diagnostic in RuntimeDyldChecker.
The compiler often emits assembler-local labels (beginning with 'L') for use in
relocation expressions, however these aren't included in the object files.
Teach RuntimeDyldChecker to warn the user if they try to use one of these in an
expression, since it will never work.

llvm-svn: 212777
2014-07-10 23:26:20 +00:00
Jan Vesely
4866999f98 SelectionDAG: Factor FP_TO_SINT lower code out of DAGLegalizer
Move the code to a helper function to allow calls from TypeLegalizer.

No functionality change intended

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Tom Stellard <tom@stellard.net>
Reviewed-by: Owen Anderson <resistor@mac.com>
llvm-svn: 212772
2014-07-10 22:40:18 +00:00
Eric Christopher
a7f273741e Add the CSR company and the Kalimba DSP processor to Triple.
Patch by Matthew Gardiner with fixes by me.

llvm-svn: 212745
2014-07-10 17:26:54 +00:00
Hal Finkel
661274e401 Feeding isSafeToSpeculativelyExecute its DataLayout pointer
isSafeToSpeculativelyExecute can optionally take a DataLayout pointer. In the
past, this was mainly used to make better decisions regarding divisions known
not to trap, and so was not all that important for users concerned with "cheap"
instructions. However, now it also helps look through bitcasts for
dereferencable loads, and will also be important if/when we add a
dereferencable pointer attribute.

This is some initial work to feed a DataLayout pointer through to callers of
isSafeToSpeculativelyExecute, generally where one was already available.

llvm-svn: 212720
2014-07-10 14:41:31 +00:00
Chandler Carruth
b55565f54f [x86,SDAG] Introduce any- and sign-extend-vector-inreg nodes analogous
to the zero-extend-vector-inreg node introduced previously for the same
purpose: manage the type legalization of widened extend operations,
especially to support the experimental widening mode for x86.

I'm adding both because sign-extend is expanded in terms of any-extend
with shifts to propagate the sign bit. This removes the last
fundamental scalarization from vec_cast2.ll (a test case that hit many
really bad edge cases for widening legalization), although the trunc
tests in that file still appear scalarized because the the shuffle
legalization is scalarizing. Funny thing, I've been working on that.

Some initial experiments with this and SSE2 scenarios is showing
moderately good behavior already for sign extension. Still some work to
do on the shuffle combining on X86 before we're generating optimal
sequences, but avoiding scalarization is a huge step forward.

llvm-svn: 212714
2014-07-10 12:32:32 +00:00
NAKAMURA Takumi
7b68d9e309 SpecialCaseList.h: Fix -Wdocumentation with \code.
llvm-svn: 212710
2014-07-10 11:39:59 +00:00
Daniel Sanders
a59d10a761 Make it possible for ints/floats to return different values from getBooleanContents()
Summary:
On MIPS32r6/MIPS64r6, floating point comparisons return 0 or -1 but integer
comparisons return 0 or 1.

Updated the various uses of getBooleanContents. Two simplifications had to be
disabled when float and int boolean contents differ:
- ScalarizeVecRes_VSELECT except when the kind of boolean contents is trivially
  discoverable (i.e. when the condition of the VSELECT is a SETCC node).
- visitVSELECT (select C, 0, 1) -> (xor C, 1).
  Come to think of it, this one could test for the common case of 'C'
  being a SETCC too.

Preserved existing behaviour for all other targets and updated the affected
MIPS32r6/MIPS64r6 tests. This also fixes the pi benchmark where the 'low'
variable was counting in the wrong direction because it thought it could simply
add the result of the comparison.

Reviewers: hfinkel

Reviewed By: hfinkel

Subscribers: hfinkel, jholewinski, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D4389

llvm-svn: 212697
2014-07-10 10:18:12 +00:00
Hal Finkel
54ccd892b9 Allow isDereferenceablePointer to look through some bitcasts
isDereferenceablePointer should not give up upon encountering any bitcast. If
we're casting from a pointer to a larger type to a pointer to a small type, we
can continue by examining the bitcast's operand. This missing capability
was noted in a comment in the function.

In order for this to work, isDereferenceablePointer now takes an optional
DataLayout pointer (essentially all callers already had such a pointer
available). Most code uses isDereferenceablePointer though
isSafeToSpeculativelyExecute (which already took an optional DataLayout
pointer), and to enable the LICM test case, LICM needs to actually provide its DL
pointer to isSafeToSpeculativelyExecute (which it was not doing previously).

llvm-svn: 212686
2014-07-10 05:27:53 +00:00
Saleem Abdulrasool
506e2b8456 MC: add and use an accessor for WinCFI
This adds a utility method to access the WinCFI information in bulk and uses
that to iterate rather than requesting the count and individually iterating
them.  This is in preparation for restructuring WinCFI handling to enable more
clear sharing across architectures to enable unwind information emission for
Windows on ARM.

llvm-svn: 212683
2014-07-10 04:50:06 +00:00
Alexey Samsonov
bea2f2e5d8 Decouple llvm::SpecialCaseList text representation and its LLVM IR semantics.
Turn llvm::SpecialCaseList into a simple class that parses text files in
a specified format and knows nothing about LLVM IR. Move this class into
LLVMSupport library. Implement two users of this class:
  * DFSanABIList in DFSan instrumentation pass.
  * SanitizerBlacklist in Clang CodeGen library.
The latter will be modified to use actual source-level information from frontend
(source file names) instead of unstable LLVM IR things (LLVM Module identifier).

Remove dependency edge from ClangCodeGen/ClangDriver to LLVMTransformUtils.

No functionality change.

llvm-svn: 212643
2014-07-09 19:40:08 +00:00
Tim Northover
ef600d3f40 Use simpler constructor for range adapter.
It is a good idea, it's slightly clearer and simpler. Unfortunately
the headline news is: we save one line!

llvm-svn: 212641
2014-07-09 19:14:34 +00:00
Benjamin Kramer
e971397307 TargetRegisterInfo: Remove function that fell out of use years ago.
llvm-svn: 212636
2014-07-09 18:53:57 +00:00
Daniel Sanders
37f35e2a7f Add Imagination Technologies to the vendors in llvm::Triple
Summary: This is a pre-requisite for supporting the mips-img-linux-gnu triple in clang.

Differential Revision: http://reviews.llvm.org/D4435

llvm-svn: 212626
2014-07-09 16:03:10 +00:00
Tim Northover
89066c9335 Generic: add range-adapter for option parsing.
I want to use it in lld, but while I'm here I'll update LLVM uses.

llvm-svn: 212615
2014-07-09 13:03:37 +00:00
Chandler Carruth
eb00ef26a3 [x86] Add a ZERO_EXTEND_VECTOR_INREG DAG node and use it when widening
vector types to be legal and a ZERO_EXTEND node is encountered.

When we use widening to legalize vector types, extend nodes are a real
challenge. Either the input or output is likely to be legal, but in many
cases not both. As a consequence, we don't really have any way to
represent this situation and the prior code in the widening legalization
framework would just scalarize the extend operation completely.

This patch introduces a new DAG node to represent doing a zero extend of
a vector "in register". The core of the idea is to allow legal but
different vector types in the input and output. The output vector must
have fewer lanes but wider elements. The operation is defined to zero
extend the low elements of the input to the size of the output elements,
and drop all of the high elements which don't have a corresponding lane
in the output vector.

It also includes generic expansion of this node in terms of blending
a zero vector into the high elements of the vector and bitcasting
across. This in turn yields extremely nice code for x86 SSE2 when we use
the new widening legalization logic in conjunction with the new shuffle
lowering logic.

There is still more to do here. We need to support sign extension, any
extension, and potentially int-to-float conversions. My current plan is
to continue using similar synthetic nodes to model each of these
transitions with generic lowering code for each one.

However, with this patch LLVM already reaches performance parity with
GCC for the core C loops of the x264 code (assuming you disable the
hand-written assembly versions) when compiling for SSE2 and SSE3
architectures and enabling the new widening and lowering logic for
vectors.

Differential Revision: http://reviews.llvm.org/D4405

llvm-svn: 212610
2014-07-09 10:58:18 +00:00
Daniel Sanders
0ebf8e82e0 Add ability to emit internal instruction representation to CodeGen assembly output.
Summary:
This patch re-uses the implementation of 'llvm-mc -show-inst' and makes it
available to llc as 'llc -asm-show-inst'.

This is necessary to test parts of MIPS32r6/MIPS64r6 without resorting to
'llc -filetype=obj' tests. For example, on MIPS32r2 and earlier we use the
'jr $rs' instruction for indirect branches and returns. On MIPS32r6, we no
longer have 'jr $rs' and use 'jalr $zero, $rs' instead. The catch is that,
on MIPS32r6, 'jr $rs' is an alias for 'jalr $zero, $rs' and is the preferred
way of writing this instruction. As a result, all MIPS ISA's emit 'jr $rs' in
their assembly output and the assembler encodes this to different opcodes
according to the ISA.

Using this option, we can check that the MCInst really is a JR or a JALR by
matching the emitted comment. This removes the need for a 'llc -filetype=obj'
test.

Reviewers: rafael, dsanders

Reviewed By: dsanders

Subscribers: zoran.jovanovic, llvm-commits

Differential Revision: http://reviews.llvm.org/D4267

llvm-svn: 212603
2014-07-09 10:07:36 +00:00
Dmitri Gribenko
42b37ff173 SourceMgr: consistently use 'unsigned' for the memory buffer ID type
llvm-svn: 212595
2014-07-09 08:30:15 +00:00
Chandler Carruth
14de70ee01 [SDAG] At the suggestion of Hal, switch to an output parameter that
tracks which elements of the build vector are in fact undef.

This should make actually inpsecting them (likely in my next patch)
reasonably pretty. Also makes the output parameter optional as it is
clear now that *most* users are happy with undefs in their splats.

llvm-svn: 212581
2014-07-09 00:41:34 +00:00
Hal Finkel
ed72d81b90 Improve BasicAA CS-CS queries
BasicAA contains knowledge of certain intrinsics, such as memcpy and memset,
and uses that information to form more-accurate answers to CallSite vs. Loc
ModRef queries. Unfortunately, it did not use this information when answering
CallSite vs. CallSite queries.

Generically, when an intrinsic takes one or more pointers and the intrinsic is
marked only to read/write from its arguments, the offset/size is unknown. As a
result, the generic code that answers CallSite vs. CallSite (and CallSite vs.
Loc) queries in AA uses UnknownSize when forming Locs from an intrinsic's
arguments. While BasicAA's CallSite vs. Loc override could use more-accurate
size information for some intrinsics, it did not do the same for CallSite vs.
CallSite queries.

This change refactors the intrinsic-specific logic in BasicAA into a generic AA
query function: getArgLocation, which is overridden by BasicAA to supply the
intrinsic-specific knowledge, and used by AA's generic implementation. This
allows the intrinsic-specific knowledge to be used by both CallSite vs. Loc and
CallSite vs. CallSite queries, and simplifies the BasicAA implementation.

Currently, only one function, Mac's memset_pattern16, is handled by BasicAA
(all the rest are intrinsics). As a side-effect of this refactoring, BasicAA's
getModRefBehavior override now also returns OnlyAccessesArgumentPointees for
this function (which is an improvement).

llvm-svn: 212572
2014-07-08 23:16:49 +00:00
Tobias Grosser
16bbc1b589 DominanceInfo is strongly preferred over RegionInfo
This is and always was strong community consensus. Make this clear in the header
in case newcomers may not be aware.

llvm-svn: 212570
2014-07-08 22:51:03 +00:00
Renato Golin
74bbc07d65 Revert "Refactor ARM subarchitecture parsing"
This reverts commit 7b4a6882467e7fef4516a0cbc418cbfce0fc6f6d.

llvm-svn: 212521
2014-07-08 10:06:16 +00:00
Vladimir Medic
f3dd261ec8 Mips.abiflags is a new implicitly generated section that will be present on all new modules. The section contains a versioned data structure which represents essentially information to allow a program loader to determine the requirements of the application. This patch implements mips.abiflags section and provides test cases for it.
llvm-svn: 212519
2014-07-08 08:59:22 +00:00
Chandler Carruth
0764373bcc [SDAG] Build up a more rich set of APIs for querying build-vector SDAG
nodes about whether they are splats. This is factored out and improved
from r212324 which got reverted as it was far too aggressive. The new
API should help more conservatively handle buildvectors that are
a mixture of splatted and undef values.

No functionality change at this point. The hope is to slowly
re-introduce the undef-tolerant optimization of splats, but each time
being forced to make a concious decision about how to handle the undefs
in a way that doesn't lead to contradicting assumptions about the
collapsed value.

Hal has pointed out in discussions that this may not end up being the
desired API and instead it may be more convenient to get a mask of the
undef elements or something similar. I'm starting simple and will expand
the API as I adapt actual callers and see exactly what they need.

llvm-svn: 212514
2014-07-08 07:19:55 +00:00
Alexey Samsonov
ff7b6cd169 [ASan] Completely remove sanitizer blacklist file from instrumentation pass.
All blacklisting logic is now moved to the frontend (Clang).
If a function (or source file it is in) is blacklisted, it doesn't
get sanitize_address attribute and is therefore not instrumented.
If a global variable (or source file it is in) is blacklisted, it is
reported to be blacklisted by the entry in llvm.asan.globals metadata,
and is not modified by the instrumentation.

The latter may lead to certain false positives - not all the globals
created by Clang are described in llvm.asan.globals metadata (e.g,
RTTI descriptors are not), so we may start reporting errors on them
even if "module" they appear in is blacklisted. We assume it's fine
to take such risk:
  1) errors on these globals are rare and usually indicate wild memory access
  2) we can lazily add descriptors for these globals into llvm.asan.globals
     lazily.

llvm-svn: 212505
2014-07-08 00:50:49 +00:00
Renato Golin
659d34425a Refactor ARM subarchitecture parsing
According to a FIXME in ARMMCTargetDesc.cpp the ARM version parsing should be
in the Triple helper class.

Patch by: Gabor Ballabas

llvm-svn: 212479
2014-07-07 20:01:11 +00:00
Chandler Carruth
9fd1035842 [x86] Revert r212324 which was too aggressive w.r.t. allowing undef
lanes in vector splats.

The core problem here is that undef lanes can't *unilaterally* be
considered to contribute to splats. Their handling needs to be more
cautious. There is also a reported failure of the nightly testers
(thanks Tobias!) that may well stem from the same core issue. I'm going
to fix this theoretical issue, factor the APIs a bit better, and then
verify that I don't see anything bad with Tobias's reduction from the
test suite before recommitting.

Original commit message for r212324:
  [x86] Generalize BuildVectorSDNode::getConstantSplatValue to work for
  any constant, constant FP, or undef splat and to tolerate any undef
  lanes in a splat, then replace all uses of isSplatVector in X86's
  lowering with it.

  This fixes issues where undef lanes in an otherwise splat vector would
  prevent the splat logic from firing. It is a touch more awkward to use
  this interface, but it is much more accurate. Suggestions for better
  interface structuring welcome.

  With this fix, the code generated with the widening legalization
  strategy for widen_cast-4.ll is *dramatically* improved as the special
  lowering strategies for a v16i8 SRA kick in even though the high lanes
  are undef.

  We also get a slightly different choice for broadcasting an aligned
  memory location, and use vpshufd instead of vbroadcastss. This looks
  like a minor win for pipelining and domain crossing, but a minor loss
  for the number of micro-ops. I suspect its a wash, but folks can
  easily tweak the lowering if they want.

llvm-svn: 212475
2014-07-07 19:03:32 +00:00
Rafael Espindola
858b9e1423 Update the MemoryBuffer API to use ErrorOr.
llvm-svn: 212405
2014-07-06 17:43:13 +00:00