2388 Commits

Author SHA1 Message Date
Evan Cheng
ac17fbc5fe Flip -disable-post-RA-scheduler to -post-RA-scheduler.
llvm-svn: 82803
2009-09-25 21:38:11 +00:00
Dan Gohman
0ac693a89e Improve MachineMemOperand handling.
- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
   This eliminates MachineInstr's std::list member and allows the data to be
   created by isel and live for the remainder of codegen, avoiding a lot of
   copying and unnecessary translation. This also shrinks MemSDNode.
 - Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
   fields for MachineMemOperands.
 - Change MemSDNode to have a MachineMemOperand member instead of its own
   fields with the same information. This introduces some redundancy, but
   it's more consistent with what MachineInstr will eventually want.
 - Ignore alignment when searching for redundant loads for CSE, but remember
   the greatest alignment.

Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.

llvm-svn: 82794
2009-09-25 20:36:54 +00:00
Dale Johannesen
228874127f Add readonly to some sin and cos calls; transformations
being checked aren't valid without it.

llvm-svn: 82786
2009-09-25 18:15:29 +00:00
Chris Lattner
2b1f7c6a75 reimplement the regex matching strategy by building a single
regex and matching it instead of trying to match chunks at a time.
Matching chunks at a time broke with check lines like 
  CHECK: foo {{.*}}bar
because the .* would eat the entire rest of the line and bar would
never match.

Now we just escape the fixed strings for the user, so that something
like:
  CHECK: a() {{.*}}???
is matched as:
  CHECK: {{a\(\) .*\?\?\?}}
transparently "under the covers".

llvm-svn: 82779
2009-09-25 17:23:43 +00:00
Bob Wilson
94e29af5ac pr4926: ARM requires the stack pointer to be aligned, even for leaf functions.
For the AAPCS ABI, SP must always be 4-byte aligned, and at any "public
interface" it must be 8-byte aligned.  For the older ARM APCS ABI, the stack
alignment is just always 4 bytes.  For X86, we currently align SP at
entry to a function (e.g., to 16 bytes for Darwin), but no stack alignment
is needed at other times, such as for a leaf function.

After discussing this with Dan, I decided to go with the approach of adding
a new "TransientStackAlignment" field to TargetFrameInfo.  This value
specifies the stack alignment that must be maintained even in between calls.
It defaults to 1 except for ARM, where it is 4.  (Some other targets may
also want to set this if they have similar stack requirements. It's not
currently required for PPC because it sets targetHandlesStackFrameRounding
and handles the alignment in target-specific code.) The existing StackAlignment
value specifies the alignment upon entry to a function, which is how we've
been using it anyway.

llvm-svn: 82767
2009-09-25 14:41:49 +00:00
Chris Lattner
703289ef20 convert testcases to filecheck.
llvm-svn: 82759
2009-09-25 06:49:41 +00:00
Chris Lattner
a777d67d34 remove a large unreduced testcase
llvm-svn: 82756
2009-09-25 06:37:22 +00:00
Bob Wilson
4cb29f6864 Convert to FileCheck.
llvm-svn: 82710
2009-09-24 20:23:02 +00:00
Dan Gohman
f6c6858329 Add nounwind to this test.
llvm-svn: 82708
2009-09-24 20:20:08 +00:00
Evan Cheng
e9267f10c7 Fix PR5024 with a big hammer: disable the double-def assertion in the scavenger.
LiveVariables add implicit kills to correctly track partial register kills. This works well enough and is fairly accurate. But coalescer can make it impossible to maintain these markers. e.g.

        BL <ga:sss1>, %R0<kill,undef>, %S0<kill>, %R0<imp-def>, %R1<imp-def,dead>, %R2<imp-def,dead>, %R3<imp-def,dead>, %R12<imp-def,dead>, %LR<imp-def,dead>, %D0<imp-def>, ...
...
	%reg1031<def> = FLDS <cp#1>, 0, 14, %reg0, Mem:LD4[ConstantPool]
...
   	%S0<def> = FCPYS %reg1031<kill>, 14, %reg0, %D0<imp-use,kill>

When reg1031 and S0 are coalesced, the copy (FCPYS) will be eliminated the the implicit-kill of D0 is lost. In this case it's possible to move the marker to the FLDS. But in many cases, this is not possible. Suppose

	%reg1031<def> = FOO <cp#1>, %D0<imp-def>
...
   	%S0<def> = FCPYS %reg1031<kill>, 14, %reg0, %D0<imp-use,kill>

When FCPYS goes away, the definition of S0 is the "FOO" instruction. However, transferring the D0 implicit-kill to FOO doesn't work since it is the def of D0 itself. We need to fix this in another time by introducing a "kill" pseudo instruction to track liveness.

Disabling the assertion is not ideal, but machine verifier is doing that job now. It's important to know double-def is not a miscomputation since it means a register should be free but it's not tracked as free. It's a performance issue instead.

llvm-svn: 82677
2009-09-24 02:27:09 +00:00
Evan Cheng
f2090008be Clean up LiveVariables and change how it deals with partial updates and kills. This also eliminate the horrible check which scan forward to the end of the basic block. It should be faster and more accurate.
llvm-svn: 82676
2009-09-24 02:15:22 +00:00
Evan Cheng
2f7030c786 Add nounwind.
llvm-svn: 82637
2009-09-23 18:20:27 +00:00
Evan Cheng
863ed2677b Fix PR5024. LiveVariables physical register defs should *commit* only after all
of the defs are processed.
Also fix a implicit_def propagation bug: a implicit_def of a physical register
should be applied to uses of the sub-registers.

llvm-svn: 82616
2009-09-23 06:28:31 +00:00
Evan Cheng
5fc8b82e1a Fix a obvious logic error.
llvm-svn: 82610
2009-09-23 05:23:19 +00:00
Evan Cheng
97c8597450 Fix PR5024. LiveVariables::FindLastPartialDef should return a set of sub-registers that were defined by the last partial def, not just a single sub-register.
llvm-svn: 82535
2009-09-22 08:34:46 +00:00
Evan Cheng
07d521ed99 Fix a pasto. Also simplify for Bill's benefit.
llvm-svn: 82505
2009-09-22 01:48:19 +00:00
Evan Cheng
a6d602a5c1 Clean up spill weight computation. Also some changes to give loop induction
variable increment / decrement slighter high priority. 

This has major impact on some micro-benchmarks. On MultiSource/Applications
and spec tests, it's a minor win. It also reduce 256.bzip instruction count
by 8%, 55 on 164.gzip on i386 / Darwin.

llvm-svn: 82485
2009-09-21 21:12:25 +00:00
Dan Gohman
f8ca240cd0 Add a comment mentioning the rdar number associated with this test.
llvm-svn: 82471
2009-09-21 18:32:20 +00:00
Dan Gohman
7a076e642e Add support for rematerializing FsFLD0SS and FsFLD0SD as constant-pool
loads in order to reduce register pressure.

llvm-svn: 82470
2009-09-21 18:30:38 +00:00
Dan Gohman
5eb4fde3c3 Recognize SSE min and max opportunities in even more cases.
And fix a bug with the behavior of min/max instructions formed from
fcmp uge comparisons.

Also, use FiniteOnlyFPMath() for this code instead of UnsafeFPMath,
as it is more specific.

llvm-svn: 82466
2009-09-21 18:03:22 +00:00
Evan Cheng
3edb8b18a5 Fix PR4986. "r1024 = insert_subreg r1024, undef, 2" cannot be turned in an implicit_def. Instead, it's an identity copy so it should be eliminated. Also make sure to update livevariable kill information.
llvm-svn: 82436
2009-09-21 04:32:32 +00:00
Dale Johannesen
f8d05d7ce6 When computing live intervals for earlyclobber operands,
we pushed the beginning of the interval back 1, so the
interval would overlap with inputs that die.  We were
also pushing the end of the interval back 1, though,
which means the earlyclobber didn't overlap with other
output operands.  Don't do this.  PR 4964.

llvm-svn: 82342
2009-09-20 00:36:41 +00:00
Evan Cheng
7714c8412d Fix PR4926. When target hook EmitInstrWithCustomInserter() insert new basic blocks and update CFG, it should also inform sdisel of the changes so the phi source operands will come from the right basic blocks.
llvm-svn: 82311
2009-09-19 09:51:03 +00:00
Dan Gohman
17a8a0a4e0 Delete the label names from this test to make it less fragile.
llvm-svn: 82276
2009-09-18 21:23:12 +00:00
Chris Lattner
60739d60bf Make a new X8632_MachoTargetObjectFile TLOF implementation whose
getSymbolForDwarfGlobalReference is smart enough to know that it 
needs to register the stub it references with MachineModuleInfoMachO,
so that it gets emitted at the end of the file.

Move stub emission from X86ATTAsmPrinter::doFinalization to the
new X86ATTAsmPrinter::EmitEndOfAsmFile asmprinter hook.  The important
thing here is that EmitEndOfAsmFile is called *after* the ehframes are
emitted, so we get all the stubs.

This allows us to remove a gross hack from the asmprinter where it would
"just know" that it needed to output stubs for personality functions.
Now this is all driven from a consistent interface.

The testcase change is just reordering the expected output now that the
stubs come out after the ehframe instead of before.

This also unblocks other changes that Bill wants to make.

llvm-svn: 82269
2009-09-18 20:22:52 +00:00
Dale Johannesen
7d68f8de7f Model the carry bit on ppc32. Without this we could
move a SUBFC (etc.) below the SUBFE (etc.) that consumed
the carry bit.  Add missing ADDIC8, noticed along the way.

llvm-svn: 82266
2009-09-18 20:15:22 +00:00
Dan Gohman
0dcc5f9922 Add support for using the FLAGS result of or, xor, and and instructions
on x86, to avoid explicit test instructions. A few existing tests changed
due to arbitrary register allocation differences.

llvm-svn: 82263
2009-09-18 19:59:53 +00:00
Anton Korobeynikov
fb7ac49d96 Allow symbols to start from the digit if target requests it. This allows, e.g. pinning
variables to specified absolute address. Make use of this feature for MSP430.
This unbreaks PR4776.

llvm-svn: 82227
2009-09-18 16:57:42 +00:00
Chris Lattner
64f5ff4836 make this testcase check darwin32 also
llvm-svn: 82182
2009-09-17 23:56:41 +00:00
Chris Lattner
5fa26b0479 rename test
llvm-svn: 82181
2009-09-17 23:55:12 +00:00
Chris Lattner
ef6c779ba2 convert to filecheck
llvm-svn: 82179
2009-09-17 23:54:26 +00:00
Chris Lattner
9196dc197b rename file
llvm-svn: 82178
2009-09-17 23:42:06 +00:00
Daniel Dunbar
9f59aae438 Remove test cases using -regalloc=simple.
llvm-svn: 82130
2009-09-17 06:37:07 +00:00
Evan Cheng
218f882aff Fix PR4910: Broken logic in coalescer means when a physical register liveness is being shortened, the sub-registers were not. The symptom is the register allocator could not find a free register for this particular test.
llvm-svn: 82108
2009-09-17 00:57:15 +00:00
Bob Wilson
9bcea11785 Convert more tests to FileCheck.
llvm-svn: 81915
2009-09-15 20:58:02 +00:00
Chris Lattner
0f1da52ad1 fix PR4984 by ensuring that fastisel adds properly sign extended GEP displacement
values to machineinstrs.

llvm-svn: 81886
2009-09-15 18:27:02 +00:00
Chris Lattner
1eac807a0b rename test
llvm-svn: 81884
2009-09-15 18:23:37 +00:00
Chris Lattner
af20df0244 convert to filecheck
llvm-svn: 81882
2009-09-15 18:23:23 +00:00
Sandeep Patel
7727a68464 Fix superreg use in ARMAsmPrinter. Approved by Anton Korobeynikov.
llvm-svn: 81878
2009-09-15 17:53:11 +00:00
Chris Lattner
31ba68c9af several major improvements to the sparc backend: support for weak linkage
and PIC codegen.  Patch by Venkatraman Govindaraju!

llvm-svn: 81877
2009-09-15 17:46:24 +00:00
Dan Gohman
8d6df0783e Restore a comment that was lost in the merge.
llvm-svn: 81857
2009-09-15 15:09:54 +00:00
Chris Lattner
60d95bf620 this is failing on linux hosts, force a triple.
llvm-svn: 81833
2009-09-15 04:27:29 +00:00
Chris Lattner
597e46632d merge one more in.
llvm-svn: 81824
2009-09-15 02:27:23 +00:00
Chris Lattner
690af119fc merge some more cmov tests into cmov.ll
llvm-svn: 81823
2009-09-15 02:25:21 +00:00
Chris Lattner
d65ec857d1 merge two cmov tests into one.
llvm-svn: 81822
2009-09-15 02:22:47 +00:00
Dan Gohman
41a3b8fba9 Don't pull a load through a callseq_start if the load's chain
has multiple uses, as one of the other uses may be on a path
to a different node above the callseq_start, because that
leads to a cyclic graph. This problem is exposed when
-combiner-global-alias-analysis is used. This fixes PR4880.

llvm-svn: 81821
2009-09-15 01:22:01 +00:00
Dan Gohman
9401b2fcab On x86-64, the 32-bit cmov doesn't actually clear the high 32-bit of
its result if the condition is false.

llvm-svn: 81814
2009-09-15 00:14:11 +00:00
Chris Lattner
dfc3079a9e merge the linux cpool/jtbl pic tests into pic.ll and convert to filecheck.
Change the picbase symbol on non-darwin systems from ".Lllvm$4.$piclabel" to
".L4$pb".  The actual name doesn't matter and the darwin name is shorter.

llvm-svn: 81688
2009-09-13 18:46:37 +00:00
Anton Korobeynikov
fa4c7562d5 Define proper subreg sets for arm - this should fix bunch of subtle problems
with subreg - superreg mapping and also fix PR4965.

llvm-svn: 81657
2009-09-13 00:59:43 +00:00
Dan Gohman
2ef4d82155 Add -mattr=+sse2 to the -march=x86 version of this test. Without
sse, this code falls back to SelectionDAG isel which uses an x87
instruction, which is fine, but not what this test is testing for.

llvm-svn: 81656
2009-09-12 23:45:47 +00:00