Eli Friedman
85c0054183
Small fix for assembler generation on Darwin PPC64. Patch by Michael Kostylev. PR11437.
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llvm-svn: 145553
2011-12-01 01:43:47 +00:00
Jim Grosbach
5c613a4c40
Replace an assert() with an actual diagnostic.
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llvm-svn: 145535
2011-11-30 23:16:25 +00:00
Kostya Serebryany
aa616ec887
make asan work at -O0, llvm part. Patch by glider@google.com
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llvm-svn: 145530
2011-11-30 22:19:26 +00:00
Jan Sjödin
2dfb343ffa
Support for encoding all FMA4 instructions and tablegen patterns for all
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remaining FMA4 instructions and intrinsics with tests.
llvm-svn: 145525
2011-11-30 22:09:42 +00:00
Eli Friedman
2d9e4aa665
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
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<rdar://problem/10497732>.
llvm-svn: 145523
2011-11-30 21:54:15 +00:00
Bill Wendling
a51c3c5a01
More cleanups. No content change.
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llvm-svn: 145522
2011-11-30 21:52:43 +00:00
Bill Wendling
35f43aae70
Minor cleanup. No content change.
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llvm-svn: 145521
2011-11-30 21:43:43 +00:00
Bob Wilson
e18f66ff91
Remove the install-clang-c makefile target.
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When I did this before it broke a buildbot that was testing that target, but
we've removed that buildbot now.
llvm-svn: 145519
2011-11-30 21:06:12 +00:00
Bill Wendling
2d1421e389
Remove an XXX which hasn't been fixed yet. It's too late now.
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llvm-svn: 145518
2011-11-30 20:53:52 +00:00
Matt Beaumont-Gay
07afe588d4
Remove unused variable
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llvm-svn: 145517
2011-11-30 19:53:11 +00:00
Jim Grosbach
3129a92b38
Add some tests for all-lanes VLD1 parsing.
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llvm-svn: 145512
2011-11-30 19:37:38 +00:00
Jim Grosbach
6b2f6389cc
ARM parsing for VLD1 all lanes, with writeback.
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llvm-svn: 145510
2011-11-30 19:35:44 +00:00
Chad Rosier
8c6d695c1e
Add a few functions to TargetLibraryInfo.
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llvm-svn: 145508
2011-11-30 19:19:00 +00:00
Jim Grosbach
fa9f6ccd62
ARM parsing for VLD1 two register all lanes, no writeback.
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llvm-svn: 145504
2011-11-30 18:21:25 +00:00
Nadav Rotem
148d347bb7
Add test arch to make it pass on non x86 targets
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llvm-svn: 145498
2011-11-30 17:34:28 +00:00
Benjamin Kramer
fbdf17c667
X86: Turns out bulldozer also supports sse42 and lzcnt.
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While at it remove the barcelona/instanbul/shanghai subtargets, they're
unsupported by GCC and look pretty broken.
llvm-svn: 145494
2011-11-30 15:48:16 +00:00
Benjamin Kramer
359fde3539
X86: Add subtargets for AMD's bulldozer.
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llvm-svn: 145493
2011-11-30 15:27:46 +00:00
Nadav Rotem
bef49f31be
Add a tripple to the test
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llvm-svn: 145489
2011-11-30 11:20:56 +00:00
Nadav Rotem
f8e096f4ee
X86: PerformOrCombine introduced a vselect node with a wrong order of operands. This bug was introduced when a dedicated blend sdnode was replaced with the vselect node (in 139479).
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llvm-svn: 145488
2011-11-30 10:13:37 +00:00
Craig Topper
2a0fc05456
Add instruction selection support for AVX2 horizontal add/sub instructions.
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llvm-svn: 145487
2011-11-30 09:10:50 +00:00
Duncan Sands
54ca22353a
Mention that -O4 does result in more optimization when used with
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-fplugin-arg-dragonegg-enable-gcc-optzns, though it usually isn't
a win.
llvm-svn: 145486
2011-11-30 08:46:05 +00:00
Craig Topper
0ac9bb8aa1
Merge VPERM2F128/VPERM2I128 ISD node types.
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llvm-svn: 145485
2011-11-30 07:47:51 +00:00
Andrew Trick
8da55f9048
Better test case found in duplicate PR10570.
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llvm-svn: 145484
2011-11-30 06:26:42 +00:00
Craig Topper
43b885cff4
Merge decoding of VPERMILPD and VPERMILPS shuffle masks. Merge X86ISD node type for VPERMILPD/PS. Add instruction selection support for VINSERTI128/VEXTRACTI128.
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llvm-svn: 145483
2011-11-30 06:25:25 +00:00
Andrew Trick
247f749767
LSR: handle the expansion of phi operands that use postinc forms of the IV.
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Fixes PR11431: SCEVExpander::expandAddRecExprLiterally(const llvm::SCEVAddRecExpr*): Assertion `(!isa<Instruction>(Result) || SE.DT->dominates(cast<Instruction>(Result), Builder.GetInsertPoint())) && "postinc expansion does not dominate use"' failed.
llvm-svn: 145482
2011-11-30 06:07:54 +00:00
Chad Rosier
8f94cb4dd5
Whitespace.
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llvm-svn: 145470
2011-11-30 01:59:59 +00:00
Chad Rosier
8b15aca551
Alphabetize TargetLibraryInfo enum and fix doxygen comments. No functional
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change intended.
llvm-svn: 145468
2011-11-30 01:51:49 +00:00
Jim Grosbach
d97df5c06a
llvm_unreachable() is not for user diagnostics....
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llvm-svn: 145465
2011-11-30 01:15:55 +00:00
Jim Grosbach
693ce8291c
ARM parsing aliases for VLD1 single register all lanes.
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llvm-svn: 145464
2011-11-30 01:09:44 +00:00
Chad Rosier
c5fa9f413a
Add support for sqrt, sqrtl, and sqrtf in TargetLibraryInfo. Disable
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(fptrunc (sqrt (fpext x))) -> (sqrtf x) transformation if -fno-builtin is
specified.
rdar://10466410
llvm-svn: 145460
2011-11-29 23:57:10 +00:00
Jim Grosbach
9adabf4dde
Tidy up a bit.
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llvm-svn: 145458
2011-11-29 23:51:09 +00:00
Jim Grosbach
ccc984051d
Add comment.
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llvm-svn: 145456
2011-11-29 23:33:40 +00:00
Jim Grosbach
29147b45a5
ARM parsing aliases for data-size suffices on VST1.
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llvm-svn: 145454
2011-11-29 23:21:31 +00:00
Jakob Stoklund Olesen
f227c539d4
FileCheckize.
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llvm-svn: 145452
2011-11-29 23:09:16 +00:00
Akira Hatanaka
fd548b69f5
Change names for MIPS "generic" processors defined in Mips.td to match what GNU
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tools use. Patch by Simon Atanasyan.
"mips32r1" => "mips32"
"4ke" => mips32r2"
"mips64r1" => "mips64"
llvm-svn: 145451
2011-11-29 23:08:41 +00:00
Jim Grosbach
538759efa7
ARM assembly parsing and encoding for four-register VST1.
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llvm-svn: 145450
2011-11-29 22:58:48 +00:00
Daniel Dunbar
7dcd93d4fa
llvm-config: Replace with C++ version (was llvm-config-2).
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- Reapply of r144300, with lots of fixes/migration easement in between.
llvm-svn: 145449
2011-11-29 22:56:31 +00:00
Evan Cheng
5c1efd630b
Add another missing pattern. llvm-gcc likes f64 but clang likes i64 so it was generating poor code for some SSE builtins.
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llvm-svn: 145448
2011-11-29 22:48:34 +00:00
Jim Grosbach
fc7e76b194
Enable some VST1 tests and add a few more.
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llvm-svn: 145443
2011-11-29 22:40:32 +00:00
Jim Grosbach
5418e87582
ARM assembly parsing and encoding for three-register VST1.
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llvm-svn: 145442
2011-11-29 22:38:04 +00:00
Jakob Stoklund Olesen
5d6a4584d9
Make X86::FsFLD0SS / FsFLD0SD real pseudo-instructions.
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Like V_SET0, these instructions are expanded by ExpandPostRA to xorps /
vxorps so they can participate in execution domain swizzling.
This also makes the AVX variants redundant.
llvm-svn: 145440
2011-11-29 22:27:25 +00:00
Stepan Dyatkovskiy
56753569db
Potential bug in RewriteLoopBodyWithConditionConstant: use iterator should not be changed inside the uses enumeration loop.
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llvm-svn: 145432
2011-11-29 20:34:39 +00:00
Eric Christopher
58dc4573db
Update the docs for some of the test-suite configure changes and
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be more clear about what to do and how to do it.
llvm-svn: 145426
2011-11-29 19:40:56 +00:00
Chad Rosier
0ff2f46d12
If fast-isel fails, remove dead instructions generated during the failed
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attempt.
llvm-svn: 145425
2011-11-29 19:40:47 +00:00
Rafael Espindola
90c572b822
grammar.
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llvm-svn: 145423
2011-11-29 19:38:09 +00:00
Andrew Trick
a6c63bda2e
comment.
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llvm-svn: 145422
2011-11-29 19:33:49 +00:00
Daniel Dunbar
4e00f5f8fd
build/CMake: Finish removal of add_llvm_library_dependencies.
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llvm-svn: 145420
2011-11-29 19:25:30 +00:00
Benjamin Kramer
0cf194e55c
Add a link to Bill's blog post.
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llvm-svn: 145419
2011-11-29 19:24:11 +00:00
Rafael Espindola
8e06adec06
Release notes for segmented stacks.
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Patch by Sanjoy Das.
llvm-svn: 145416
2011-11-29 19:08:23 +00:00
Duncan Sands
97cc6da56c
Fix a theoretical problem (not seen in the wild): if different instances of a
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weak variable are compiled by different compilers, such as GCC and LLVM, while
LLVM may increase the alignment to the preferred alignment there is no reason to
think that GCC will use anything more than the ABI alignment. Since it is the
GCC version that might end up in the final program (as the linkage is weak), it
is wrong to increase the alignment of loads from the global up to the preferred
alignment as the alignment might only be the ABI alignment.
Increasing alignment up to the ABI alignment might be OK, but I'm not totally
convinced that it is. It seems better to just leave the alignment of weak
globals alone.
llvm-svn: 145413
2011-11-29 18:26:38 +00:00