Douglas Gregor
4cd9c97c74
Fix CMake makefiles
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llvm-svn: 85994
2009-11-04 01:32:06 +00:00
Evan Cheng
1a06b12330
Use ldr.n to workaround a darwin assembler bug.
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llvm-svn: 85980
2009-11-04 00:00:39 +00:00
Lang Hames
deed780bc6
The Indexes Patch.
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This introduces a new pass, SlotIndexes, which is responsible for numbering
instructions for register allocation (and other clients). SlotIndexes numbering
is designed to match the existing scheme, so this patch should not cause any
changes in the generated code.
For consistency, and to avoid naming confusion, LiveIndex has been renamed
SlotIndex.
The processImplicitDefs method of the LiveIntervals analysis has been moved
into its own pass so that it can be run prior to SlotIndexes. This was
necessary to match the existing numbering scheme.
llvm-svn: 85979
2009-11-03 23:52:08 +00:00
Bob Wilson
8209e942a6
Fix branch folding bug for indirect branches: for a block containing only
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an unconditional branch (possibly from tail merging), this code is
trying to redirect all of its predecessors to go directly to the branch
target, but that isn't feasible for indirect branches. The other
predecessors (that don't end with indirect branches) could theoretically
still be handled, but that is not easily done right now.
The AnalyzeBranch interface doesn't currently let us distinguish jump table
branches from indirect branches, and this code is currently handling
jump tables. To avoid punting on address-taken blocks, we would have to give
up handling jump tables. That seems like a bad tradeoff.
llvm-svn: 85975
2009-11-03 23:44:31 +00:00
Chris Lattner
b634c6cdb5
reimplement multiple return value handling in IPSCCP, making it
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more aggressive an correct. This survives building llvm in 64-bit
mode with optimizations and the built llvm passes make check.
llvm-svn: 85973
2009-11-03 23:40:48 +00:00
Evan Cheng
b50510c510
Fix t2Int_eh_sjlj_setjmp. Immediate form of orr is a 32-bit instruction. So it should be 22 bytes instead of 20 bytes long.
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llvm-svn: 85965
2009-11-03 23:13:34 +00:00
Evan Cheng
caab17007b
fconsts / fconstd immediate should be proceeded with #.
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llvm-svn: 85952
2009-11-03 21:59:33 +00:00
Evan Cheng
d783406059
Re-apply 85799. It turns out my code isn't buggy.
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llvm-svn: 85947
2009-11-03 21:40:02 +00:00
David Goodwin
629a685f05
Do a scheduling pass ignoring anti-dependencies to identify candidate registers that should be renamed.
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llvm-svn: 85939
2009-11-03 20:57:50 +00:00
Chris Lattner
10c341e8fa
finish half thunk thought
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llvm-svn: 85937
2009-11-03 20:52:57 +00:00
Victor Hernandez
628b65ea6e
Changes requested (avoid getFunction(), avoid Type creation via isVoidTy(), and avoid redundant isFreeCall cases) in feedback to r85176
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llvm-svn: 85936
2009-11-03 20:39:35 +00:00
David Goodwin
9f1cf41932
<rdar://problem/7352605>. When building schedule graph use mayAlias information to avoid chaining loads/stores of spill slots with non-aliased memory ops.
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llvm-svn: 85934
2009-11-03 20:15:00 +00:00
Victor Hernandez
046375ac3f
Changes (* location in pointer variables, avoiding include, and using APInt::getLimitedValue) based on feedback to r85814
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llvm-svn: 85933
2009-11-03 20:02:35 +00:00
Chris Lattner
2aa5962af6
fix an IPSCCP bug I introduced when I changed IPSCCP to start working on
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functions that don't have local linkage. Basically, we need to be more
careful about propagating argument information to functions whose results
we aren't tracking. This fixes a miscompilation of
LLVMCConfigurationEmitter.cpp when built with an llvm-gcc that has ipsccp
enabled.
llvm-svn: 85923
2009-11-03 19:24:51 +00:00
Duncan Sands
d4b8f9ee93
Make this code more robust by not thinking we are making progress
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if zero bytes were read.
llvm-svn: 85922
2009-11-03 19:10:22 +00:00
Devang Patel
5b0aaf3a1f
Parse debug info attached with insertvalue and extractvalue instructions.
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llvm-svn: 85921
2009-11-03 19:06:07 +00:00
Anton Korobeynikov
de7cbab064
Move subtarget check upper for NEON reg-reg fixup pass.
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llvm-svn: 85914
2009-11-03 18:46:11 +00:00
Devang Patel
7cb7017106
Ignore unnamed variables.
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llvm-svn: 85909
2009-11-03 18:30:27 +00:00
Chris Lattner
bfe755788f
fix a subtle bug I introduced when refactoring SCCP. Testcase
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to follow.
llvm-svn: 85903
2009-11-03 16:50:11 +00:00
Benjamin Kramer
c6b59b889b
Eliminate some temporaries.
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llvm-svn: 85896
2009-11-03 12:52:50 +00:00
Evan Cheng
1d4575274c
Trim unnecessary include.
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llvm-svn: 85878
2009-11-03 07:08:08 +00:00
Bob Wilson
97331f70ca
For Thumb indirect branches, use "mov pc, reg" which does not switch
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between ARM/Thumb modes and does not require the low bit of the target
address to be set for Thumb.
llvm-svn: 85874
2009-11-03 06:29:56 +00:00
Jeffrey Yasskin
bc6f9d7e70
Fix a funky "declared with greater visibility than the type of its field"
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warning from gcc by removing VISIBILITY_HIDDEN attributes.
llvm-svn: 85873
2009-11-03 06:29:36 +00:00
Evan Cheng
ed22395c61
Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8.
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llvm-svn: 85871
2009-11-03 05:52:54 +00:00
Evan Cheng
2807af42c0
Clean up copyRegToReg.
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llvm-svn: 85870
2009-11-03 05:51:39 +00:00
Evan Cheng
9bedf1b587
Add QPR_8 as a superreg class of SPR_8 and DPR_8.
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llvm-svn: 85869
2009-11-03 05:50:57 +00:00
Chris Lattner
7585c1f162
remove unneeded checks of isFreeCall
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llvm-svn: 85866
2009-11-03 05:35:19 +00:00
Chris Lattner
cbd903cd12
remove a check of isFreeCall: the argument to free is already nocapture so the generic call code works fine.
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llvm-svn: 85865
2009-11-03 05:34:51 +00:00
Chris Lattner
9d0f925cf0
remove a isFreeCall check: it is a callinst that can write to memory already.
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llvm-svn: 85863
2009-11-03 05:33:46 +00:00
Ted Kremenek
a474928cda
Update CMake file.
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llvm-svn: 85861
2009-11-03 04:14:12 +00:00
Ted Kremenek
cd7ab8bfa0
Alphabetize.
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llvm-svn: 85859
2009-11-03 04:01:53 +00:00
Chris Lattner
b1dfdadabd
turn IPSCCP back on now that the iterator invalidation bug is fixed.
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llvm-svn: 85858
2009-11-03 03:42:51 +00:00
Anton Korobeynikov
ff29071cc6
Turn neon reg-reg moves fixup code into separate pass. This should reduce the compile time.
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llvm-svn: 85850
2009-11-03 01:04:26 +00:00
Anton Korobeynikov
48b30c79be
Revert r85049, it is causing PR5367
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llvm-svn: 85847
2009-11-03 00:24:48 +00:00
Bob Wilson
7e071e14eb
Revert previous change to a comment. The BlockAddresses go in the
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constant pool so they don't get wrapped separately.
llvm-svn: 85844
2009-11-03 00:02:05 +00:00
Chris Lattner
00c9eb665d
fix a nasty iterator invalidation bug from my conversion from
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std::map to DenseMap, exposed on release llvm-gcc bootstrap.
llvm-svn: 85840
2009-11-02 23:25:39 +00:00
Evan Cheng
ca5847665b
Revert 85799 for now. It might be breaking llvm-gcc driver.
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llvm-svn: 85827
2009-11-02 21:49:14 +00:00
Bob Wilson
3144715b53
Put BlockAddresses into ARM constant pools.
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llvm-svn: 85824
2009-11-02 20:59:23 +00:00
Kevin Enderby
633b294095
Fix ARMAsmParser::ParseMemoryOffsetReg() where the parameter OffsetRegNum should
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have been passed as a reference.
llvm-svn: 85823
2009-11-02 20:14:39 +00:00
Chris Lattner
6f515d4ba8
revert r8579[56], which are causing unhappiness in buildbot land.
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llvm-svn: 85818
2009-11-02 19:31:10 +00:00
Victor Hernandez
1d2fd19df6
Set bit instead of calling pow() to compute 2 << n
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llvm-svn: 85814
2009-11-02 18:51:28 +00:00
Chris Lattner
874e573d61
typo
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llvm-svn: 85812
2009-11-02 18:28:45 +00:00
Chris Lattner
a1776913ab
disable IPSCCP support for multiple return values, it is buggy, so just
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disable it until I can fix it.
llvm-svn: 85810
2009-11-02 18:22:51 +00:00
David Goodwin
9aa890eab6
Fix schedule model for BFC.
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llvm-svn: 85809
2009-11-02 17:28:36 +00:00
Bob Wilson
0c213bed8b
Hyphenate some comments.
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llvm-svn: 85808
2009-11-02 17:10:37 +00:00
David Goodwin
0668ac893d
Chain dependencies used to enforce memory order should have latency of 0 (except for true dependency of Store followed by aliased Load... we estimate that case with a single cycle of latency assuming the hardware will bypass)
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llvm-svn: 85807
2009-11-02 17:06:28 +00:00
Bob Wilson
6eb4f53d90
Add support for BlockAddress values in ARM constant pools.
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llvm-svn: 85806
2009-11-02 16:59:06 +00:00
Bob Wilson
ac53e0c640
Prune unnecessary include.
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llvm-svn: 85805
2009-11-02 16:58:31 +00:00
Evan Cheng
ec5cb0cdbd
Initilize the machine LICM CSE map upon the first time an instruction is hoisted to
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the loop preheader. Add instructions which are already in the preheader block that
may be common expressions of those that are hoisted out. These does get a few more
instructions CSE'ed.
llvm-svn: 85799
2009-11-02 08:09:49 +00:00
Evan Cheng
e79ff8a615
These are done / no longer care.
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llvm-svn: 85798
2009-11-02 07:58:25 +00:00