328 Commits

Author SHA1 Message Date
Bill Wendling
b20cfdfe95 Merge the contents from exception-handling-rewrite to the mainline.
This adds the new instructions 'landingpad' and 'resume'.

llvm-svn: 136253
2011-07-27 20:18:04 +00:00
Jeffrey Yasskin
8a0f9f17a3 Explicitly cast narrowing conversions inside {}s that will become errors in
C++0x.

llvm-svn: 136211
2011-07-27 06:22:51 +00:00
Eli Friedman
50291d09da Initial implementation of 'fence' instruction, the new C++0x-style replacement for llvm.memory.barrier.
This is just a LangRef entry and reading/writing/memory representation; optimizer+codegen support coming soon.

llvm-svn: 136009
2011-07-25 23:16:38 +00:00
Chris Lattner
e1fe7061ce land David Blaikie's patch to de-constify Type, with a few tweaks.
llvm-svn: 135375
2011-07-18 04:54:35 +00:00
Eric Christopher
ca7ae418a5 Check register class matching instead of width of type matching
when determining validity of matching constraint. Allow i1
types access to the GR8 reg class for x86.

Fixes PR10352 and rdar://9777108

llvm-svn: 135180
2011-07-14 20:13:52 +00:00
Benjamin Kramer
1cab6179ab Don't emit a bit test if there is only one case the test can yield false. A simple SETNE is sufficient.
llvm-svn: 135126
2011-07-14 01:38:42 +00:00
Jay Foad
88fb4f4597 Convert InsertValueInst and ExtractValueInst APIs to use ArrayRef.
llvm-svn: 135040
2011-07-13 10:26:04 +00:00
Cameron Zwarich
c23366d357 Add an intrinsic and codegen support for fused multiply-accumulate. The intent
is to use this for architectures that have a native FMA instruction.

llvm-svn: 134742
2011-07-08 21:39:21 +00:00
Benjamin Kramer
560b1d3295 Apparently we can't expect a BinaryOperator here.
Should fix llvm-gcc selfhost.

llvm-svn: 134699
2011-07-08 12:08:24 +00:00
Benjamin Kramer
44c76d239a Emit a more efficient magic number multiplication for exact sdivs.
We have to do this in DAGBuilder instead of DAGCombiner, because the exact bit is lost after building.

  struct foo { char x[24]; };
  long bar(struct foo *a, struct foo *b) { return a-b; }
is now compiled into
  movl	4(%esp), %eax
  subl	8(%esp), %eax
  sarl	$3, %eax
  imull	$-1431655765, %eax, %eax
instead of
  movl	4(%esp), %eax
  subl	8(%esp), %eax
  movl	$715827883, %ecx
  imull	%ecx
  movl	%edx, %eax
  shrl	$31, %eax
  sarl	$2, %edx
  addl	%eax, %edx
  movl	%edx, %eax

llvm-svn: 134695
2011-07-08 10:31:30 +00:00
Jakub Staszak
28bcc8673e Introduce "expect" intrinsic instructions.
llvm-svn: 134516
2011-07-06 18:22:43 +00:00
Eric Christopher
40578e7885 Remove getRegClassForInlineAsmConstraint and all dependencies.
Fixes rdar://9643582

llvm-svn: 134123
2011-06-30 01:20:03 +00:00
Jakob Stoklund Olesen
557793fb60 Distinguish early clobber output operands from clobbered registers.
Both become <earlyclobber> defs on the INLINEASM MachineInstr, but we
now use two different asm operand kinds.

The new Kind_Clobber is treated identically to the old
Kind_RegDefEarlyClobber for now, but x87 floating point stack inline
assembly does care about the difference.

This will pop a register off the stack:

  asm("fstp %st" : : "t"(x) : "st");

While this will pop the input and push an output:

  asm("fst %st" : "=&t"(r) : "t"(x));

We need to know if ST0 was a clobber or an output operand, and we can't
depend on <dead> flags for that.

llvm-svn: 133902
2011-06-27 04:08:33 +00:00
Nadav Rotem
0f11d5d161 When promoting the vector elements in CopyToParts, use vector trunc
instead of scalarizing, and doing an element-by-element truncat.

llvm-svn: 133382
2011-06-19 08:49:38 +00:00
Jakub Staszak
5c7b7d64ba Introduce MachineBranchProbabilityInfo class, which has similar API to
BranchProbabilityInfo (expect setEdgeWeight which is not available here).
Branch Weights are kept in MachineBasicBlocks. To turn off this analysis
set -use-mbpi=false.

llvm-svn: 133184
2011-06-16 20:22:37 +00:00
Jakob Stoklund Olesen
3bf75a3861 Add TargetRegisterInfo::getRawAllocationOrder().
This virtual function will replace allocation_order_begin/end as the one
to override when implementing custom allocation orders. It is simpler to
have one function return an ArrayRef than having two virtual functions
computing different ends of the same array.

Use getRawAllocationOrder() in place of allocation_order_begin() where
it makes sense, but leave some clients that look like they really want
the filtered allocation orders from RegisterClassInfo.

llvm-svn: 133170
2011-06-16 17:42:25 +00:00
Bruno Cardoso Lopes
b6afc5168f Add one more argument to the prefetch intrinsic to indicate whether it's a data
or instruction cache access. Update the targets to match it and also teach
autoupgrade.

llvm-svn: 132976
2011-06-14 04:58:37 +00:00
Nadav Rotem
ba2691bc23 Improve the generated code by getCopyFromPartsVector for promoted integer types.
Instead of scalarizing, and doing an element-by-element truncat, use vector
truncate.
Add support for scalarization of vectors:  i8 -> <1 x i1> (from Duncan's
testcase).

llvm-svn: 132892
2011-06-12 14:49:38 +00:00
Eric Christopher
1ae9ec6124 Add a parameter to CCState so that it can access the MachineFunction.
No functional change.

Part of PR6965

llvm-svn: 132763
2011-06-08 23:55:35 +00:00
Nadav Rotem
5a64a09036 TypeLegalizer: Add support for passing of vector-promoted types in registers (copyFromParts/copyToParts).
llvm-svn: 132649
2011-06-04 20:58:08 +00:00
Eric Christopher
e446e0fdb9 Add a TODO about memory operands.
llvm-svn: 132559
2011-06-03 17:21:23 +00:00
Eric Christopher
d68494ffdd Have LowerOperandForConstraint handle multiple character constraints.
Part of rdar://9119939

llvm-svn: 132510
2011-06-02 23:16:42 +00:00
Eric Christopher
9fe91039e4 Allow bitcasts between valid types of the same size and vector
types if the vector type is legal.

Fixes rdar://9306086

llvm-svn: 132420
2011-06-01 19:55:10 +00:00
Devang Patel
37ab34a49f Preserve debug info during iSel by keeping DanglingDebugInfoMap live until end of function.
Patch by Micah Villmow

llvm-svn: 131908
2011-05-23 17:44:13 +00:00
Chris Lattner
ca9723d80b Eliminate some temporary variables, and don't call getByValTypeAlignment
when we're just going to throw the result away.  No functionality change.

llvm-svn: 131880
2011-05-22 23:23:02 +00:00
Devang Patel
9f871794b6 Preserve debug info for unused zero extended boolean argument.
Radar 9422775.

llvm-svn: 131422
2011-05-16 21:24:05 +00:00
Rafael Espindola
95d9ad78ea Make codegen able to handle values of empty types. This is one way
to fix PR9900. I will keep it open until sable is able to comment on it.

llvm-svn: 131294
2011-05-13 15:18:06 +00:00
Bill Wendling
453a924d29 Give the 'eh.sjlj.dispatchsetup' intrinsic call the value coming from the setjmp
intrinsic call. This prevents it from being reordered so that it appears
*before* the setjmp intrinsic (thus making it completely useless).
<rdar://problem/9409683>

llvm-svn: 131174
2011-05-11 01:11:55 +00:00
Eli Friedman
aecbcc0c8f Disable my little CopyToReg argument hack with fast-isel. rdar://problem/9413587 .
llvm-svn: 131156
2011-05-10 21:50:58 +00:00
Eric Christopher
ba60d3d108 Look through struct wrapped types for inline asm statments.
Patch by Evan Cheng.

llvm-svn: 131093
2011-05-09 20:04:43 +00:00
Evan Cheng
3cda8bc78e 80 col violations.
llvm-svn: 131015
2011-05-06 20:52:23 +00:00
Eli Friedman
09ec41fcde Avoid extra vreg copies for arguments passed in registers. Specifically, this can make MachineCSE more effective in some cases (especially in small functions). PR8361 / part of rdar://problem/8259436 .
llvm-svn: 130928
2011-05-05 16:53:34 +00:00
Devang Patel
83eac5e134 A dbg.declare may not be in entry block, even if it is referring to an incoming argument. However, It is appropriate to emit DBG_VALUE referring to this incoming argument in entry block in MachineFunction.
llvm-svn: 130129
2011-04-25 16:33:52 +00:00
Chris Lattner
0304b82f80 Fix a ton of comment typos found by codespell. Patch by
Luis Felipe Strano Moraes!

llvm-svn: 129558
2011-04-15 05:18:47 +00:00
Chris Lattner
e8dfbaef19 Avoid excess precision issues that lead to generating host-compiler-specific code.
Switch lowering probably shouldn't be using FP for this.  This resolves PR9581.

llvm-svn: 129199
2011-04-09 06:57:13 +00:00
Evan Cheng
bc053100af Change -arm-trap-func= into a non-arm specific option. Now Intrinsic::trap is lowered into a call to the specified trap function at sdisel time.
llvm-svn: 129152
2011-04-08 21:37:21 +00:00
Bill Wendling
a8db395dc1 Revamp the SjLj "dispatch setup" intrinsic.
It needed to be moved closer to the setjmp statement, because the code directly
after the setjmp needs to know about values that are on the stack. Also, the
'bitcast' of the function context was causing a dead load. This wouldn't be too
horrible, except that at -O0 it wasn't optimized out, and because it wasn't
using the correct base pointer (if there is a VLA), it would try to access a
value from a garbage address.
<rdar://problem/9130540>

llvm-svn: 128873
2011-04-05 01:37:43 +00:00
Evan Cheng
28382f9178 Add comments.
llvm-svn: 128730
2011-04-01 19:57:01 +00:00
Evan Cheng
13c73e4836 Assign node order numbers to results of call instruction lowering. This should improve src line debug info when sdisel is used. rdar://9199118
llvm-svn: 128728
2011-04-01 19:42:22 +00:00
Benjamin Kramer
f9e1ba7398 Turn SelectionDAGBuilder::GetRegistersForValue into a local function.
It couldn't be used outside of the file because SDISelAsmOperandInfo
is local to SelectionDAGBuilder.cpp. Making it a static function avoids
a weird linkage dance.

llvm-svn: 128342
2011-03-26 16:35:10 +00:00
Cameron Zwarich
cea63dc052 Move more logic into getTypeForExtArgOrReturn.
llvm-svn: 127809
2011-03-17 14:53:37 +00:00
Cameron Zwarich
a5746339cc Rename getTypeForExtendedInteger() to getTypeForExtArgOrReturn().
llvm-svn: 127807
2011-03-17 14:21:56 +00:00
Cameron Zwarich
2bb1e45ea3 The x86-64 ABI says that a bool is only guaranteed to be sign-extended to a byte
rather than an int. Thankfully, this only causes LLVM to miss optimizations, not
generate incorrect code.

This just fixes the zext at the return. We still insert an i32 ZextAssert when
reading a function's arguments, but it is followed by a truncate and another i8
ZextAssert so it is not optimized.

llvm-svn: 127766
2011-03-16 22:20:18 +00:00
Cameron Zwarich
860d06739b Don't recompute something that we already have in a local variable.
llvm-svn: 127764
2011-03-16 22:20:07 +00:00
Andrew Trick
6aa37a4a2b Replace -dag-chain-limit flag with constant. It has survived a release cycle without being touched, so no longer needs to pollute the hidden-help text.
llvm-svn: 127468
2011-03-11 17:46:59 +00:00
Owen Anderson
bd26993873 Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS.
llvm-svn: 126518
2011-02-25 21:41:48 +00:00
Jim Grosbach
61c746f927 Fix formatting of debug helper string.
llvm-svn: 126471
2011-02-25 03:59:03 +00:00
Cameron Zwarich
3d2f99227a Refactor the LiveOutInfo interface into a few methods on FunctionLoweringInfo
and make the actual map private.

llvm-svn: 126376
2011-02-24 10:00:08 +00:00
Cameron Zwarich
c942ffcae4 Roll out r126169 and r126170 in an attempt to fix the selfhost bot.
llvm-svn: 126185
2011-02-22 03:24:52 +00:00
Cameron Zwarich
63ed1f4c67 Merge information about the number of zero, one, and sign bits of live-out registers
at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine
phase. This fixes <rdar://problem/8760114>.

llvm-svn: 126170
2011-02-22 00:46:27 +00:00