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14641 Commits

Author SHA1 Message Date
Andrew Lenharth
f794ded743 inline asm, at least for floats 
llvm-svn: 28895
 2006-06-21 13:37:27 +00:00
Andrew Lenharth
78e0cc794f fix argument problem 
llvm-svn: 28893
 2006-06-21 01:00:43 +00:00
Chris Lattner
5fa6e47534 Correct returns of 64-bit values, though they seemed to work before... 
llvm-svn: 28892
 2006-06-21 00:34:03 +00:00
Chris Lattner
10d22c274e Make these predicates correct in 64-bit mode too. 
llvm-svn: 28890
 2006-06-20 23:21:20 +00:00
Chris Lattner
75e6449a0f Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file 
llvm-svn: 28889
 2006-06-20 23:18:58 +00:00
Chris Lattner
2e1d3158f1 remove unused flag 
llvm-svn: 28888
 2006-06-20 23:15:07 +00:00
Chris Lattner
c74ef80a95 add some logical ops 
llvm-svn: 28887
 2006-06-20 23:11:59 +00:00
Chris Lattner
19df1fcd72 remove some unused patterns 
llvm-svn: 28886
 2006-06-20 23:11:36 +00:00
Chris Lattner
40a0a6c400 Add some more immediate patterns. This allows us to compile: 
void test6() {
  Y = 0xABCD0123BCDE4567;
}

into:

_test6:
        lis r2, -21555
        lis r3, ha16(_Y)
        ori r2, r2, 291
        rldicr r2, r2, 32, 31
        oris r2, r2, 48350
        ori r2, r2, 17767
        std r2, lo16(_Y)(r3)
        blr

llvm-svn: 28885
 2006-06-20 23:03:01 +00:00
Chris Lattner
690b03fb44 Instead of li/xoris use li/oris. Note that this doesn't work if bit 15 is 
set, so disable the pattern in that case.

llvm-svn: 28884
 2006-06-20 22:38:59 +00:00
Chris Lattner
eede1e2c00 Add some 64-bit logical ops. 
Split imm16Shifted into a sext/zext form for 64-bit support.
Add some patterns for immediate formation.  For example, we now compile this:

static unsigned long long Y;
void test3() {
  Y = 0xF0F00F00;
}

into:

_test3:
        li r2, 3840
        lis r3, ha16(_Y)
        xoris r2, r2, 61680
        std r2, lo16(_Y)(r3)
        blr

GCC produces:

_test3:
        li r0,0
        lis r2,ha16(_Y)
        ori r0,r0,61680
        sldi r0,r0,16
        ori r0,r0,3840
        std r0,lo16(_Y)(r2)
        blr

llvm-svn: 28883
 2006-06-20 22:34:10 +00:00
Evan Cheng
b0bb6dd981 __i386__, __i386, etc. are not defined for x86-64. Use __x86_64__. 
llvm-svn: 28881
 2006-06-20 22:11:12 +00:00
Chris Lattner
4ff5f3d852 64-bit bugfix: 0xFFFF0000 cannot be formed with a single lis. 
llvm-svn: 28880
 2006-06-20 21:39:30 +00:00
Chris Lattner
c97820b17c Add some patterns for globals, so we can now compile this: 
static unsigned long long X, Y;
void test1() {
  X = Y;
}

into:

_test1:
        lis r2, ha16(_Y)
        lis r3, ha16(_X)
        ld r2, lo16(_Y)(r2)
        std r2, lo16(_X)(r3)
        blr

llvm-svn: 28879
 2006-06-20 21:23:06 +00:00
Jim Laskey
1725929173 Add support for function types. 
llvm-svn: 28874
 2006-06-20 19:41:06 +00:00
Chris Lattner
3ae4156dd7 Remove some now-unneeded casts from instruction patterns. With the casts 
removed, tblgen produces identical output to with them in.

llvm-svn: 28867
 2006-06-20 00:39:56 +00:00
Chris Lattner
19339e7a96 Add some patterns for ppc64 
llvm-svn: 28866
 2006-06-20 00:38:36 +00:00
Chris Lattner
2e64872117 Remove some ugly now-redundant casts. 
llvm-svn: 28864
 2006-06-20 00:25:29 +00:00
Chris Lattner
fbea064e90 Fix some mismatched type constraints 
llvm-svn: 28862
 2006-06-20 00:12:37 +00:00
Jim Laskey
e996378867 References need to be section relative. 
llvm-svn: 28861
 2006-06-19 19:49:42 +00:00
Evan Cheng
98d508af83 Minor clean up. 
llvm-svn: 28860
 2006-06-19 19:25:30 +00:00
Andrew Lenharth
f0ecdbe7ef Do partial inlining in BU. This resolves more call sites. Also add options to merge in globals during recursion and to back annotate DSNodes when function pointers are resolved. This makes PA work for a whole lot more things (unresolved call sites being what has been killing various DSA based passes) 
llvm-svn: 28859
 2006-06-19 18:23:36 +00:00
Jim Laskey
16fcd6389e References need to be section relative. 
llvm-svn: 28858
 2006-06-19 15:48:00 +00:00
Andrew Lenharth
3ab1711306 Fix a bug, don't drop indirect call sites, especially if there is nothing known about them yet, and restore a simple version of a removed function 
llvm-svn: 28857
 2006-06-19 15:42:47 +00:00
Jim Laskey
005825407f Handle versioning of compile unit. 
llvm-svn: 28855
 2006-06-19 12:54:15 +00:00
Rafael Espindola
14a59f5b6e initial implementation of ARMRegisterInfo::eliminateFrameIndex 
fixes test/Regression/CodeGen/ARM/ret_arg5.ll

llvm-svn: 28854
 2006-06-18 00:08:07 +00:00
Chris Lattner
9d028c26c8 Constant fold sqrtf 
llvm-svn: 28853
 2006-06-17 18:17:52 +00:00
Chris Lattner
25b04b4249 Fix IndVarsSimplify/2006-06-16-Indvar-LCSSA-Crash.ll, a case where a 
"LCSSA" phi node causes indvars to break dominance properties.  This fixes
causes indvars to avoid inserting aggressive code in this case, instead
indvars should be fixed to be more aggressive in the face of lcssa phi's.

llvm-svn: 28850
 2006-06-17 01:02:31 +00:00
Evan Cheng
e3b8db6dda A new entry. 
llvm-svn: 28848
 2006-06-17 00:45:49 +00:00
Chris Lattner
d817b32a8e Implement the getPointerRegClass method, which is required for the ptr_rc 
magic to work.

llvm-svn: 28847
 2006-06-17 00:01:04 +00:00
Jim Laskey
e62ae62e2b Forgot operands were hard coded for compile unit. 
llvm-svn: 28846
 2006-06-16 23:36:12 +00:00
Evan Cheng
78e6cefad9 Later models likely to have Yonah like attributes. 
llvm-svn: 28843
 2006-06-16 21:58:49 +00:00
Chris Lattner
89a0d10812 Upgrade some load/store instructions to use the proper addressing mode stuff. 
llvm-svn: 28841
 2006-06-16 21:29:41 +00:00
Chris Lattner
163da7cdcb In 64-bit mode, addr mode operands use G8RC instead of GPRC. 
llvm-svn: 28840
 2006-06-16 21:29:03 +00:00
Chris Lattner
81845946ff fix some assumptions that pointers can only be 32-bits. With this, we can 
now compile:

static unsigned long X;
void test1() {
  X = 0;
}

into:

_test1:
        lis r2, ha16(_X)
        li r3, 0
        stw r3, lo16(_X)(r2)
        blr

Totally amazing :)

llvm-svn: 28839
 2006-06-16 21:01:35 +00:00
Chris Lattner
cb294464e7 Split 64-bit instructions out into a separate .td file 
llvm-svn: 28838
 2006-06-16 20:22:01 +00:00
Chris Lattner
59947dda25 Force 64-bit register availability in 64-bit mode. For real. 
llvm-svn: 28837
 2006-06-16 20:05:06 +00:00
Chris Lattner
126464b577 Remove the -darwin and -aix llc options, inferring darwinism and aixism from 
the target triple & subtarget info.  woo.

llvm-svn: 28835
 2006-06-16 18:50:48 +00:00
Evan Cheng
884b3a29da Add missing casts. This fixed some regressions. 
llvm-svn: 28834
 2006-06-16 18:37:15 +00:00
Chris Lattner
5a1f56fc2a Simplify TargetData ctor call 
llvm-svn: 28832
 2006-06-16 18:24:38 +00:00
Chris Lattner
6a9ec7e80e Don't pass target name into TargetData anymore, it is never used or needed. 
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.

llvm-svn: 28830
 2006-06-16 18:22:52 +00:00
Chris Lattner
9fcdb0d7e5 Remove ctor with each piece specifyable (which causes overload ambiguities), 
add a new init method.

llvm-svn: 28828
 2006-06-16 18:11:26 +00:00
Chris Lattner
4a8f3c456a Only count instructions as code size, not constant pools and other per-function stuff. 
llvm-svn: 28827
 2006-06-16 18:09:26 +00:00
Chris Lattner
ac373d311b Simplify interpreter construction. 
llvm-svn: 28826
 2006-06-16 18:08:38 +00:00
Chris Lattner
19680a4928 Document the subtarget features better, make sure that 64-bit mode, 64-bit 
support, and 64-bit register use are all consistent with each other.

Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently.  This not makes ppc64 blow up on lots
of stuff :)

llvm-svn: 28825
 2006-06-16 17:50:12 +00:00
Chris Lattner
fa884ac11b Rename some subtarget features. A CPU now can *have* 64-bit instructions, 
can in 32-bit mode we can choose to optionally *use* 64-bit registers.

llvm-svn: 28824
 2006-06-16 17:34:12 +00:00
Andrew Lenharth
9f4587fa50 Add a error message to cbu to match bu 
llvm-svn: 28819
 2006-06-16 14:43:36 +00:00
Andrew Lenharth
71d1cfa5c4 move header 
llvm-svn: 28818
 2006-06-16 14:33:53 +00:00
Jim Laskey
120281ddcf 1. Revise vector debug support. 
2. Update docs for vector debug support and new version control.

3. Simplify serialization of DebugDescInfo subclasses.

llvm-svn: 28816
 2006-06-16 13:14:03 +00:00
Evan Cheng
763d7462d5 More libcall transformations: 
printf("%s\n", str) -> puts(str)
printf("%c", c) -> putchar(c)
Also fixed fprintf(file, "%c", c) -> fputc(c, file)

llvm-svn: 28815
 2006-06-16 08:36:35 +00:00