64587 Commits

Author SHA1 Message Date
Craig Topper
60ef08db39 Allow non-AVX form of pmovmskb to take a GR64 operand.
llvm-svn: 192341
2013-10-10 05:33:31 +00:00
Craig Topper
45f6a833a2 Remove duplicate instructions.
llvm-svn: 192340
2013-10-10 05:01:22 +00:00
Akira Hatanaka
d7e78a8926 [mips] Do not generate INS/EXT nodes if target does not have support for
ins/ext.

llvm-svn: 192330
2013-10-09 23:36:17 +00:00
Rui Ueyama
3d4e6c8475 Revert "llvm-c: Make target initializer functions external functions in lib."
This reverts commit r192316. The original change introduced circular
dependencies between libTarget and backends. That would broke a build unless
link everything into one big binary.

llvm-svn: 192329
2013-10-09 23:15:49 +00:00
Manman Ren
992ab551ae Debug Info: In DIBuilder, the context and type fields of template_type and
template_value are updated to use DIRef.

A paired commit at clang is required due to changes to DIBuilder.

llvm-svn: 192320
2013-10-09 19:46:28 +00:00
Anders Waldenborg
d556328a9c llvm-c: Make target initializer functions external functions in lib.
Making them proper functions defined in the (shared)lib instead of
static inlines defined in the header files makes it possible to
actually distribute a binary compiled against the shared library
without having to worry about getting undefined symbol errors when
calling e.g LLVMInitializeAllTargetInfos because the shared library on
the other system was compiled with different targets.

Differential Revision: http://llvm-reviews.chandlerc.com/D1714

llvm-svn: 192316
2013-10-09 19:02:09 +00:00
Manman Ren
25dbd15627 Debug Info: In DIBuilder, the context field of a forward decl is updated
to use DIScopeRef.

llvm-svn: 192309
2013-10-09 18:10:55 +00:00
Benjamin Kramer
2f83eef8d9 Flip the ownership of MCStreamer and MCTargetStreamer.
MCStreamer now owns the target streamer. This prevents leaking the target
streamer.

llvm-svn: 192303
2013-10-09 17:23:41 +00:00
Shuxin Yang
708f0cc2e4 Fix a bug in Dead Argument Elimination.
If a function seen at compile time is not necessarily the one linked to
the binary being built, it is illegal to change the actual arguments
passing to it. 

  e.g. 
   --------------------------
   void foo(int lol) {
     // foo() has linkage satisifying isWeakForLinker()
     // "lol" is not used at all.
   }

   void bar(int lo2) {
      // xform to foo(undef) is illegal, as compiler dose not know which
      // instance of foo() will be linked to the the binary being built.
      foo(lol2); 
   }
  -----------------------------

  Such functions can be captured by isWeakForLinker(). NOTE that
mayBeOverridden() is insufficient for this purpose as it dosen't include
linkage types like AvailableExternallyLinkage and LinkOnceODRLinkage.
Take link_odr* as an example, it indicates a set of *EQUIVALENT* globals
that can be merged at link-time. However, the semantic of 
*EQUIVALENT*-functions includes parameters. Changing parameters breaks
the assumption.

  Thank John McCall for help, especially for the explanation of subtle
difference between linkage types.

  rdar://11546243

llvm-svn: 192302
2013-10-09 17:21:44 +00:00
Rafael Espindola
f0991565b5 Add a GlobalAlias::isValidLinkage to reduce code duplication.
Thanks to Reid Kleckner for the suggestion.

llvm-svn: 192298
2013-10-09 16:07:32 +00:00
Venkatraman Govindaraju
aedc12be2e [Sparc] Disable tail call optimization for sparc64.
This patch fixes PR17506.

llvm-svn: 192294
2013-10-09 12:50:39 +00:00
Elena Demikhovsky
f24ecf7862 AVX-512: Added VRCP28 and VRSQRT28 instructions and intrinsics.
llvm-svn: 192283
2013-10-09 08:16:14 +00:00
Tim Northover
87db53ff7a AArch64: enable MISched by default.
Substantial SelectionDAG scheduling is going away soon, and is
interfering with Hao's attempts to implement LDn/STn instructions, so
I say we make the leap first.

There were a few reorderings (inevitably) which broke some tests. I
tried to replace them with CHECK-DAG variants mostly, but some too
complex for that to be useful and I just reordered them.

llvm-svn: 192282
2013-10-09 07:53:57 +00:00
Andrew Trick
6456fd444d Add missing HasAVX512 predicate.
This was only working because AVX had cheaper rules in all cases.
I'm sure there are other places in this file where predicates are missing.

llvm-svn: 192276
2013-10-09 05:11:10 +00:00
Craig Topper
bd2eef914f Replace a couple instructions with patterns referring to other instructions with same encoding and operands. Mark a couple other instructions as CodeGenOnly since we have FR and VR instructions and only one of them is needed by the assembler/disassembler.
llvm-svn: 192274
2013-10-09 04:54:21 +00:00
Craig Topper
ae27a7b281 Use AVX512PIi8 for the alt forms of vcmp instructions. This adds the TB prefix and keeps the mnemonic from starting with an extra 'v'
llvm-svn: 192272
2013-10-09 04:24:38 +00:00
Craig Topper
718df5110c Mark some instructions as CodeGenOnly since they aren't needed by the assembler or disassembler. Disassembler already filtered them, but asm parser still had them in its tables.
llvm-svn: 192271
2013-10-09 03:56:16 +00:00
Craig Topper
d5082631e1 Add in64BitMode/in32BitMode to the MMX/SSE2/AVX maskmovq/dq instructions. This way the asm parser will pick the right one based on the mode. Instruction selection already did the right thing based on the pointer size.
llvm-svn: 192266
2013-10-09 02:18:34 +00:00
Manman Ren
15624ed0ea Debug Info: In DIBuilder, the context field of a DICompositeType is updated
to use DIScopeRef.

A paired commit at clang is required due to changes to DIBuilder.

llvm-svn: 192256
2013-10-09 00:17:04 +00:00
Manman Ren
e31c6f626f Debug Info: In DIBuilder, the context fields of a static member and a
typedef are updated to use DIScopeRef.

llvm-svn: 192254
2013-10-08 23:49:38 +00:00
Manman Ren
7259773e8e Debug Info: In DIBuilder, the derived-from field of DICompositeType
is updated to use DITypeRef.

A paired commit at clang is required due to changes to DIBuilder.

llvm-svn: 192251
2013-10-08 23:28:51 +00:00
Manman Ren
d3dd477f4b Debug Info: In DIBuilder, the derived-from field of DIDerivedType
is updated to use DITypeRef.

A paired commit at clang is required due to changes to DIBuilder.

llvm-svn: 192246
2013-10-08 22:56:31 +00:00
Chad Rosier
d30c4af71b [AArch64] Add support for NEON scalar floating-point reciprocal estimate,
reciprocal exponent, and reciprocal square root estimate instructions.

llvm-svn: 192242
2013-10-08 22:09:04 +00:00
Chad Rosier
e281a17b84 [AArch64] Add support for NEON scalar signed/unsigned integer to floating-point
convert instructions.

llvm-svn: 192231
2013-10-08 20:43:30 +00:00
Reid Kleckner
0aaac9bca6 Explicitly request unsigned enum types when desired
This fixes repeated -Wmicrosoft warnings when self-hosting clang on
Windows, and gets us real unsigned enum types with MSVC.

llvm-svn: 192227
2013-10-08 20:15:11 +00:00
Reed Kotler
0b1b97d48b Add fabsf to the list of inlined functions; otherwise
Mips16 will try and create a stub for it and this will
result in a link error because that function does not exist in libc.

llvm-svn: 192223
2013-10-08 19:55:01 +00:00
Manman Ren
3634a1bde6 Add DbgVariable::resolve per Eric's suggestion.
llvm-svn: 192218
2013-10-08 19:07:44 +00:00
Manman Ren
b3b1ba7540 Debug Info: rename getOriginalTypeSize to getBaseTypeSize.
llvm-svn: 192216
2013-10-08 18:46:58 +00:00
Manman Ren
12c5557523 Debug Info: take advantage of the existing CU::resolve.
llvm-svn: 192215
2013-10-08 18:42:58 +00:00
Akira Hatanaka
27a2b4e26a [mips] Simplify and optimize code.
No intended functionality change.

llvm-svn: 192213
2013-10-08 18:13:24 +00:00
Reed Kotler
57455fdc7c Let rotr and bswap be handled by expansion for Mips16 since we don't
have native instructions for this.

llvm-svn: 192207
2013-10-08 17:32:33 +00:00
Eric Christopher
033ddf451a Grammar.
llvm-svn: 192199
2013-10-08 16:47:11 +00:00
Rafael Espindola
b9b01ea30e Fix build on Solaris 11.
Patch by Vladimir Voskresensky. The erros were:

Path.inc:274:3: error: ‘Dl_info’ was not declared in this scope
...

and

usr/include/spawn.h:52:14: error: expected ‘,’ or ‘...’ before ‘argv’

llvm-svn: 192185
2013-10-08 16:12:58 +00:00
Rafael Espindola
6267c79fdb Add a MCTargetStreamer interface.
This patch fixes an old FIXME by creating a MCTargetStreamer interface
and moving the target specific functions for ARM, Mips and PPC to it.

The ARM streamer is still declared in a common place because it is
used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are
completely hidden in the corresponding Target directories.

I will send an email to llvmdev with instructions on how to use this.

llvm-svn: 192181
2013-10-08 13:08:17 +00:00
NAKAMURA Takumi
f37e42a504 SparcJITInfo.cpp: Prune "default:" label to fix a warning. [-Wcovered-switch-default]
llvm-svn: 192179
2013-10-08 10:29:09 +00:00
NAKAMURA Takumi
18fc7c1446 Prune trailing linefeeds.
llvm-svn: 192178
2013-10-08 10:29:03 +00:00
Venkatraman Govindaraju
6abd2b0367 [Sparc] Implement JIT for SPARC.
No new testcases. However, this patch makes all supported JIT testcases in 
test/ExecutionEngine  pass on Sparc.

llvm-svn: 192176
2013-10-08 07:15:22 +00:00
Craig Topper
4c3cbfbbbc Remove unneeded MMX instruction definition by moving pattern to an equivalent instruction definition and removing the filtering from the disassembler table building.
llvm-svn: 192175
2013-10-08 06:30:39 +00:00
Craig Topper
aa1a4d51f0 Remove some instructions that existed to provide aliases to the assembler. Can be done with InstAlias instead. Unfortunately, this was causing printer to use 'vmovq' or 'vmovd' based on what was parsed. To cleanup the inconsistencies convert all 'vmovd' with 64-bit registers to 'vmovq', but provide an alias so that 'vmovd' will still parse.
llvm-svn: 192171
2013-10-08 05:53:50 +00:00
Venkatraman Govindaraju
72515ccf89 [Sparc] Do not hardcode nop in the delay slot of TLS_CALL. Use DelaySlotFiller to fill the delay slot instead.
llvm-svn: 192160
2013-10-08 02:50:29 +00:00
David Majnemer
39a2e35dbc Windows: Avoiding resizing, use uninitialized data() instead
This is ever-so faster but more importantly matches what we have elsewhere.

llvm-svn: 192137
2013-10-07 21:57:07 +00:00
Arnold Schwaighofer
bfe48b104a LoopVectorize: External uses must use the last value in a reduction cycle
Otherwise, we don't perform operations that would have been performed on
the scalar version.

Fixes PR17498.

llvm-svn: 192133
2013-10-07 21:05:43 +00:00
Reed Kotler
33301878d0 Add Mips16 patterns for sign extend byte and sign extend halfword.
llvm-svn: 192130
2013-10-07 20:46:19 +00:00
Manman Ren
b284db0070 Struct byval: use the correct alignment for loads generated to load
from struct byval to registers.

We used to pass 0 which means the alignment of PtrVT. Even when the alignment
of the struct is smaller than 4, the LOADs would have alignment of 4, and
further optimizations could combine the LOADs into a ldm, which would
cause crash.

The fix is to pass the alignment of the struct byval.

rdar://problem/15144402

llvm-svn: 192126
2013-10-07 19:47:53 +00:00
Akira Hatanaka
f21023f5c6 [mips] Coding style clean up.
llvm-svn: 192125
2013-10-07 19:33:02 +00:00
Akira Hatanaka
5954578b3c [mips] Disable tail merging when long branch pass is enabled.
llvm-svn: 192124
2013-10-07 19:13:53 +00:00
Benjamin Kramer
feace9b737 X86: Fix type check. Just because an integer type is illegal doesn't mean it's i64.
Fixes PR17495, where an i24 triggered this code. It's intended to
optimize i64 loads on 32 bit x86.

llvm-svn: 192123
2013-10-07 19:11:35 +00:00
Akira Hatanaka
535ef5516d [mips] Define method MipsSubtarget::enableLongBranchPass.
llvm-svn: 192122
2013-10-07 19:06:57 +00:00
Alexey Samsonov
a04533615d Revert r191834 until we measure the effect of this benchmarks and maybe find a better way to fix it
llvm-svn: 192121
2013-10-07 19:03:24 +00:00
Akira Hatanaka
da64382f71 [mips] Fix definition of mfhi and mflo instructions to read from the whole
accumulator instead of its sub-registers, $hi and $lo. 

We need this change to prevent a mflo following a mtlo from reading an
unpredictable/undefined value, as shown in the following example:

mult $6, $7 // result of $6 * $7 is written to $lo and $hi.
mflo $2     // read lower 32-bit result from $lo.
mtlo $4     // write to $lo. the content of $hi becomes unpredictable.
mfhi $3     // read higher 32-bit from $hi, which has an unpredictable value.

I don't have a test case for this change that reliably reproduces the problem.

llvm-svn: 192119
2013-10-07 18:49:46 +00:00