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17 Commits

Author SHA1 Message Date
Johnny Chen
b74c5b564c Wrap the error msgs in DEBUG() macro so that they won't appear in NDEBUG build. 
llvm-svn: 101329
 2010-04-15 01:20:56 +00:00
Johnny Chen
a793a40572 Fixed another assert exposed by fuzzing. Now, the DisassembleVFPLdStMulFrm() 
function checks whether we have a valid submode for VLDM/VSTM (must be either
"ia" or "db") before calling ARM_AM::getAM5Opc(AMSubMode, unsigned char).

llvm-svn: 101306
 2010-04-14 22:37:17 +00:00
Johnny Chen
f609eeff77 For t2BFI disassembly, apply the same error checking as in r101205. 
Change the error msg to read "Encoding error: msb < lsb".

llvm-svn: 101293
 2010-04-14 22:04:45 +00:00
Johnny Chen
ad1fee5287 Fixed another assert exposed by fuzzing. The utility function getRegisterEnum() 
was asserting because the (RegClass, RegNum) combination doesn't make sense from
an encoding point of view.

Since getRegisterEnum() is used all over the place, to change the code to check
for encoding error after each call would not only bloat the code, but also make
it less readable.  An Err flag is added to the ARMBasicMCBuilder where a client
can set a non-zero value to indicate some kind of error condition while building
up the MCInst.  ARMBasicMCBuilder::BuildIt() checks this flag and returns false
if a non-zero value is detected.

llvm-svn: 101290
 2010-04-14 21:03:13 +00:00
Johnny Chen
07ed32d767 Fixed another assert exposed by fuzzing. Now, when an encoding error occurs 
involing getBFCInvMask() where lsb <= msb does not hold true, the disassembler
just returns false, instead of assert, to indicate disassembly error.

llvm-svn: 101205
 2010-04-14 02:05:29 +00:00
Johnny Chen
723cdf093a Fixed an assert() exposed by fuzzing. Now, instead of assert when an invalid 
instruction encoding is encountered, we just return a NULL ARMBasicMCBuilder
instance and the client just returns false to indicate disassembly error.

llvm-svn: 101201
 2010-04-14 01:17:37 +00:00
Johnny Chen
b024d0a612 Missed this one line for the previous checkin to fix build warnings. 
llvm-svn: 100697
 2010-04-07 22:21:03 +00:00
Johnny Chen
9fdf028fd3 Fixed warnings pointed out by clang. 
llvm-svn: 100696
 2010-04-07 22:03:27 +00:00
Johnny Chen
4dc93f2195 Fixed 3 warnings pointed out by clang. 
llvm-svn: 100693
 2010-04-07 21:23:48 +00:00
Evan Cheng
d765bcc4d9 Re-apply 100265 but instead disable building of ARM disassembly for now. 
llvm-svn: 100379
 2010-04-05 01:34:00 +00:00
Evan Cheng
dbf0c22d5b Reverting 100265 to try to get buildbots green again. Lots of self-hosting buildbots started complaining since this commit. Also xfail ARM disassembly tests. 
llvm-svn: 100378
 2010-04-05 01:04:27 +00:00
Johnny Chen
9da90c8593 Get rid of the middleman (ARMAlgorithm), which causes more trouble than the 
abstraction it brings.  And also get rid of the atexit() handler, it does not
belong in the lib directory. :-)

llvm-svn: 100265
 2010-04-03 04:10:56 +00:00
Johnny Chen
9b96a2cf47 Fix comment. 
llvm-svn: 100259
 2010-04-03 01:17:30 +00:00
Johnny Chen
313183d079 Register ARMAlgorithm::DoCleanup() to be called on exit to free the memory 
occuplied by the cached ARMAlgorithm objects.

llvm-svn: 100258
 2010-04-03 01:09:47 +00:00
Johnny Chen
6d9cbe7270 Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgen 
backend (ARMDecoderEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Reviewed by Chris Latter and Bob Wilson.

llvm-svn: 100233
 2010-04-02 22:27:38 +00:00
Bob Wilson
34aca030c5 --- Reverse-merging r98637 into '.': 
U    test/CodeGen/ARM/tls2.ll
U    test/CodeGen/ARM/arm-negative-stride.ll
U    test/CodeGen/ARM/2009-10-30.ll
U    test/CodeGen/ARM/globals.ll
U    test/CodeGen/ARM/str_pre-2.ll
U    test/CodeGen/ARM/ldrd.ll
U    test/CodeGen/ARM/2009-10-27-double-align.ll
U    test/CodeGen/Thumb2/thumb2-strb.ll
U    test/CodeGen/Thumb2/ldr-str-imm12.ll
U    test/CodeGen/Thumb2/thumb2-strh.ll
U    test/CodeGen/Thumb2/thumb2-ldr.ll
U    test/CodeGen/Thumb2/thumb2-str_pre.ll
U    test/CodeGen/Thumb2/thumb2-str.ll
U    test/CodeGen/Thumb2/thumb2-ldrh.ll
U    utils/TableGen/TableGen.cpp
U    utils/TableGen/DisassemblerEmitter.cpp
D    utils/TableGen/RISCDisassemblerEmitter.h
D    utils/TableGen/RISCDisassemblerEmitter.cpp
U    Makefile.rules
U    lib/Target/ARM/ARMInstrNEON.td
U    lib/Target/ARM/Makefile
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
D    lib/Target/ARM/Disassembler
U    lib/Target/ARM/ARMInstrFormats.td
U    lib/Target/ARM/ARMAddressingModes.h
U    lib/Target/ARM/Thumb2ITBlockPass.cpp

llvm-svn: 98640
 2010-03-16 16:59:47 +00:00
Johnny Chen
ff030064fb Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend 
(RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
instructions to help disassembly.

We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>.  See, for example, A8.6.57/58/60.

And modified test cases to not expect '+' in +reg or #+num.  For example,

; CHECK:       ldr.w	r9, [r7, #28]

llvm-svn: 98637
 2010-03-16 16:36:54 +00:00