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10962 Commits

Author SHA1 Message Date
Chris Lattner
45d4ddd903 Implement hook for ppc 
llvm-svn: 23374
 2005-09-17 01:03:26 +00:00
Nate Begeman
d733cf7e8b More DAG combining. Still need the branch instructions, and select_cc 
llvm-svn: 23371
 2005-09-16 00:54:12 +00:00
Chris Lattner
aa57457e20 disable this for now 
llvm-svn: 23366
 2005-09-15 21:44:00 +00:00
Chris Lattner
cd5eeef9ee Give all operands names 
llvm-svn: 23357
 2005-09-14 21:11:13 +00:00
Chris Lattner
54139f0b83 give all operands names 
llvm-svn: 23356
 2005-09-14 21:10:24 +00:00
Chris Lattner
3e8d9d8d08 Fix some issues exposed by more testing. XORIS had the wrong operands 
specified.  The various *imm operands defined by PPC are really all i32,
even though the actual immediate is restricted to a smaller value in it.

llvm-svn: 23352
 2005-09-14 20:53:05 +00:00
Chris Lattner
b97354c974 Fix some bugs noticed by new checking code 
llvm-svn: 23350
 2005-09-14 18:18:39 +00:00
Chris Lattner
c7fe78d9a1 Fix the regression last night compiling povray 
llvm-svn: 23348
 2005-09-14 17:32:56 +00:00
Chris Lattner
fa644b391f fix a major regression from my patch this afternoon 
llvm-svn: 23347
 2005-09-14 06:06:45 +00:00
Chris Lattner
c7fb54af0b we don't need this proto any longer 
llvm-svn: 23342
 2005-09-13 22:05:21 +00:00
Chris Lattner
ffab20ddeb move the #include for the generated code into the isel class body so we 
can use/define class methods

llvm-svn: 23339
 2005-09-13 22:03:06 +00:00
Chris Lattner
16700b9beb Change the arg lowering code to use copyfromreg from vregs associated 
with incoming arguments instead of the pregs themselves.  This fixes
the scheduler from causing problems by moving a copyfromreg for an argument
to after a select_cc node (now it can, and bad things won't happen).

llvm-svn: 23334
 2005-09-13 19:33:40 +00:00
Chris Lattner
b56110ff54 This has been moved to the target-indep code 
llvm-svn: 23333
 2005-09-13 19:32:18 +00:00
Chris Lattner
00bfb7812d This code is no longer needed, it is moved to the target-indep code 
llvm-svn: 23332
 2005-09-13 19:31:44 +00:00
Chris Lattner
49669dd169 If a function has liveins, and if the target requested that they be plopped 
into particular vregs, emit copies into the entry MBB.

llvm-svn: 23331
 2005-09-13 19:30:54 +00:00
Chris Lattner
075b4458cf Majik numbers are bad 
llvm-svn: 23330
 2005-09-13 19:03:13 +00:00
Chris Lattner
766369cf45 Remove some dead vectors 
llvm-svn: 23329
 2005-09-13 18:47:49 +00:00
Chris Lattner
f020513d57 Add a simple xform to simplify array accesses with casts in the way. 
This is useful for 178.galgel where resolution of dope vectors (by the
optimizer) causes the scales to become apparent.

llvm-svn: 23328
 2005-09-13 18:36:04 +00:00
Chris Lattner
26aef8992f Fix an issue where LSR would miss rewriting a use of an IV expression by a PHI node that is not the original PHI. 
This fixes up a dot-product loop in galgel, speeding it up from 18.47s to
16.13s.

llvm-svn: 23327
 2005-09-13 02:09:55 +00:00
Chris Lattner
4284014415 Add a helper function, allowing us to simplify some code a bit, changing 
indentation, no functionality change

llvm-svn: 23325
 2005-09-13 00:40:14 +00:00
Chris Lattner
d35d5d2492 Implement a simple xform to turn code like this: 
if () { store A -> P; } else { store B -> P; }

into a PHI node with one store, in the most trival case.  This implements
load.ll:test10.

llvm-svn: 23324
 2005-09-12 23:23:25 +00:00
Chris Lattner
6eee5b16b1 Another load-peephole optimization: do gcse when two loads are next to 
each other.  This implements InstCombine/load.ll:test9

llvm-svn: 23322
 2005-09-12 22:21:03 +00:00
Chris Lattner
2657841260 Implement a trivial form of store->load forwarding where the store and the 
load are exactly consequtive.  This is picked up by other passes, but this
triggers thousands of times in fortran programs that use static locals
(and is thus a compile-time speedup).

llvm-svn: 23320
 2005-09-12 22:00:15 +00:00
Chris Lattner
a949a2836d Fix a regression from last night, which caused this pass to create invalid 
code for IV uses outside of loops that are not dominated by the latch block.
We should only convert these uses to use the post-inc value if they ARE
dominated by the latch block.

Also use a new LoopInfo method to simplify some code.

This fixes Transforms/LoopStrengthReduce/2005-09-12-UsesOutOutsideOfLoop.ll

llvm-svn: 23318
 2005-09-12 17:11:27 +00:00
Chris Lattner
ab0448905e Add a new getLoopLatch() method. 
llvm-svn: 23315
 2005-09-12 17:03:55 +00:00
Chris Lattner
780ffd9c1f _test: 
li r2, 0
LBB_test_1:     ; no_exit.2
        li r5, 0
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmpwi cr0, r2, 701
        blt cr0, LBB_test_1     ; no_exit.2
LBB_test_2:     ; loopexit.2.loopexit
        addi r2, r2, 1
        stw r2, 0(r4)
        blr
[zion ~/llvm]$ cat > ~/xx
Uses of IV's outside of the loop should use hte post-incremented version
of the IV, not the preincremented version.  This helps many loops (e.g. in sixtrack)
which used to generate code like this (this is the code from the
dont-hoist-simple-loop-constants.ll testcase):

_test:
        li r2, 0                 **** IV starts at 0
LBB_test_1:     ; no_exit.2
        or r5, r2, r2            **** Copy for loop exit
        li r2, 0
        stw r2, 0(r3)
        addi r3, r3, 4
        addi r2, r5, 1
        addi r6, r5, 2           **** IV+2
        cmpwi cr0, r6, 701
        blt cr0, LBB_test_1     ; no_exit.2
LBB_test_2:     ; loopexit.2.loopexit
        addi r2, r5, 2       ****  IV+2
        stw r2, 0(r4)
        blr

And now generated code like this:

_test:
        li r2, 1               *** IV starts at 1
LBB_test_1:     ; no_exit.2
        li r5, 0
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmpwi cr0, r2, 701     *** IV.postinc + 0
        blt cr0, LBB_test_1
LBB_test_2:     ; loopexit.2.loopexit
        stw r2, 0(r4)          *** IV.postinc + 0
        blr

llvm-svn: 23313
 2005-09-12 06:04:47 +00:00
Chris Lattner
ddec75fdf6 implement Transforms/LoopStrengthReduce/dont-hoist-simple-loop-constants.ll. 
We used to emit this code for it:

_test:
        li r2, 1     ;; Value tying up a register for the whole loop
        li r5, 0
LBB_test_1:     ; no_exit.2
        or r6, r5, r5
        li r5, 0
        stw r5, 0(r3)
        addi r5, r6, 1
        addi r3, r3, 4
        add r7, r2, r5  ;; should be addi r7, r5, 1
        cmpwi cr0, r7, 701
        blt cr0, LBB_test_1     ; no_exit.2
LBB_test_2:     ; loopexit.2.loopexit
        addi r2, r6, 2
        stw r2, 0(r4)
        blr

now we emit this:

_test:
        li r2, 0
LBB_test_1:     ; no_exit.2
        or r5, r2, r2
        li r2, 0
        stw r2, 0(r3)
        addi r3, r3, 4
        addi r2, r5, 1
        addi r6, r5, 2   ;; whoa, fold those adds!
        cmpwi cr0, r6, 701
        blt cr0, LBB_test_1     ; no_exit.2
LBB_test_2:     ; loopexit.2.loopexit
        addi r2, r5, 2
        stw r2, 0(r4)
        blr

more improvement coming.

llvm-svn: 23306
 2005-09-10 01:18:45 +00:00
Chris Lattner
00e9278551 PowerPC cannot truncstore i1 natively 
llvm-svn: 23304
 2005-09-10 00:21:06 +00:00
Chris Lattner
38fb15db44 Allow targets to say they don't support truncstore i1 (which includes a mask 
when storing to an 8-bit memory location), as most don't.

llvm-svn: 23303
 2005-09-10 00:20:18 +00:00
Chris Lattner
52a8cb35e6 Add a missing #include, patch courtesy of Baptiste Lepilleur. 
llvm-svn: 23302
 2005-09-09 23:53:39 +00:00
Chris Lattner
cae9229d6e Fix a problem duraid encountered on itanium where this folding: 
select (x < y), 1, 0 -> (x < y) incorrectly: the setcc returns i1 but the
select returned i32.  Add the zero extend as needed.

llvm-svn: 23301
 2005-09-09 23:00:07 +00:00
Chris Lattner
85884e9b8a Fix a crash viewing dags that have target nodes in them 
llvm-svn: 23300
 2005-09-09 22:35:03 +00:00
Chris Lattner
ad8728e9a6 I forgot that we always spill fp values as 64-bits. Implement spill folding 
for FP as well.  This triggers a couple dozen times on 177.mesa (for example).

llvm-svn: 23299
 2005-09-09 21:59:44 +00:00
Chris Lattner
da77012825 Fix a problem that Nate noticed, where spill code was not getting coallesced 
with copies, leading to code like this:

       lwz r4, 380(r1)
       or r10, r4, r4    ;; Last use of r4

By teaching the PPC backend how to fold spills into copies, we now get this
code:

       lwz r10, 380(r1)

wow. :)

This reduces a testcase nate sent me from 1505 instructions to 1484.

Note that this could handle FP values but doesn't currently, for reasons
mentioned in the patch

llvm-svn: 23298
 2005-09-09 21:46:49 +00:00
Chris Lattner
c3959855af code cleanup 
llvm-svn: 23297
 2005-09-09 20:51:08 +00:00
Chris Lattner
e7610bc599 Use continue in the use-processing loop to make it clear what the early exits 
are, simplify logic, and cause things to not be nested as deeply.  This also
uses MRI->areAliases instead of an explicit loop.

No functionality change, just code cleanup.

llvm-svn: 23296
 2005-09-09 20:29:51 +00:00
Nate Begeman
8422b3637e Last round of 2-node folds from SD.cpp. Will move on to 3 node ops such 
as setcc and select next.

llvm-svn: 23295
 2005-09-09 19:49:52 +00:00
Chris Lattner
fc17fe0e6d remove debugging code *slaps head* 
llvm-svn: 23294
 2005-09-09 19:19:20 +00:00
Chris Lattner
8d8506f8e2 When spilling a live range that is used multiple times by one instruction, 
only add a reload live range once for the instruction.  This is one step
towards fixing a regalloc pessimization that Nate notice, but is later undone
by the spiller (so no code is changed).

llvm-svn: 23293
 2005-09-09 19:17:47 +00:00
Chris Lattner
8d654c32cb Teach the code generator that rlwimi is commutable if the rotate amount 
is zero.  This lets the register allocator elide some copies in some cases.

This implements CodeGen/PowerPC/rlwimi-commute.ll

llvm-svn: 23292
 2005-09-09 18:17:41 +00:00
Chris Lattner
e8cc191dd6 Introduce two new concepts: 
1. Add support for defining Pattern's, which can match expressions when there
   is no instruction that directly implements something.  Instructions usually
   implicitly define patterns.
2. Add support for defining SDNodeXForm's, which are node transformations.
   This seperates the concept of a node xform out from the existing predicate
   support.

Using this new stuff, we add a few instruction patterns, one for testing, and
two for OR/XOR by an arbitrary immediate.

llvm-svn: 23286
 2005-09-09 00:39:56 +00:00
Chris Lattner
a3a924efdd whitespace/comment changes, no functionality diffs 
llvm-svn: 23283
 2005-09-08 23:17:26 +00:00
Nate Begeman
1675c67c62 Move yet more folds over to the dag combiner from sd.cpp 
llvm-svn: 23278
 2005-09-08 20:18:10 +00:00
Chris Lattner
ca093b4f92 Add a bunch of stuff needed for node type inference. Move 'BLR' down with 
the rest of the instructions, add comment markers to seperate portions of
the file into logical parts

llvm-svn: 23277
 2005-09-08 19:50:41 +00:00
Chris Lattner
7d0a6e4db4 add patterns for x?oris? 
llvm-svn: 23268
 2005-09-08 17:40:49 +00:00
Chris Lattner
c23c950d73 add patterns to the addi/addis/mulli etc instructions. Define predicates 
for matching signed 16-bit and shifted 16-bit ppc immediates

llvm-svn: 23267
 2005-09-08 17:33:10 +00:00
Chris Lattner
f0d65ab5d3 Add patterns for some new instructions, allowing the use of the ineg fragment. 
llvm-svn: 23266
 2005-09-08 17:01:54 +00:00
Chris Lattner
1f7f2544fc ignore generated files 
llvm-svn: 23263
 2005-09-07 23:47:44 +00:00
Chris Lattner
1769be4699 Remove some cases handled by the generated portion of the isel 
llvm-svn: 23262
 2005-09-07 23:45:15 +00:00
Nate Begeman
c0f764ada4 Another round of dag combiner changes. This fixes some missing XOR folds 
as well as fixing how we replace old values with new values.

llvm-svn: 23260
 2005-09-07 23:25:52 +00:00