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48 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
c808be0c56 Remove RegisterClassInfo::isReserved() and isAllocatable(). 
Clients can use the equivalent functions in MRI.

llvm-svn: 165990
 2012-10-15 22:41:03 +00:00
Andrew Trick
3e809a2fba Move RegisterClassInfo.h. 
Allow targets to access this API. It's required for RegisterPressure.

llvm-svn: 158102
 2012-06-06 20:29:31 +00:00
Jakob Stoklund Olesen
be0b8939c0 Switch all register list clients to the new MC*Iterator interface. 
No functional change intended.

Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.

This makes it possible to do so without changing all clients (again).

llvm-svn: 157854
 2012-06-01 23:28:30 +00:00
Jakob Stoklund Olesen
cc0cf22b98 Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass(). 
The getPointerRegClass() hook can return register classes that depend on
the calling convention of the current function (ptr_rc_tailcall).

So far, we have been able to infer the calling convention from the
subtarget alone, but as we add support for multiple calling conventions
per target, that no longer works.

Patch by Yiannis Tsiouris!

llvm-svn: 156328
 2012-05-07 22:10:26 +00:00
Craig Topper
a95d527c6a Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size. 
llvm-svn: 152016
 2012-03-05 05:37:41 +00:00
Craig Topper
8cc9d75c6a Use uint16_t to store register overlaps to reduce static data. 
llvm-svn: 152001
 2012-03-04 10:43:23 +00:00
Craig Topper
585b4225c3 Use uint16_t to store registers in callee saved register tables to reduce size of static data. 
llvm-svn: 151996
 2012-03-04 03:33:22 +00:00
Hal Finkel
0c67e8f4d9 AggressiveAntiDepBreaker needs to skip debug values because a debug value does not have a corresponding SUnit 
llvm-svn: 148260
 2012-01-16 22:53:41 +00:00
Evan Cheng
8af07ba749 Added a late machine instruction copy propagation pass. This catches 
opportunities that only present themselves after late optimizations
such as tail duplication .e.g.
## BB#1:
        movl    %eax, %ecx
        movl    %ecx, %eax
        ret

The register allocator also leaves some of them around (due to false
dep between copies from phi-elimination, etc.)

This required some changes in codegen passes. Post-ra scheduler and the
pseudo-instruction expansion passes have been moved after branch folding
and tail merging. They were before branch folding before because it did
not always update block livein's. That's fixed now. The pass change makes
independently since we want to properly schedule instructions after
branch folding / tail duplication.

rdar://10428165
rdar://10640363

llvm-svn: 147716
 2012-01-07 03:02:36 +00:00
Evan Cheng
1acd685d87 Add bundle aware API for querying instruction properties and switch the code 
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.

llvm-svn: 146026
 2011-12-07 07:15:52 +00:00
Evan Cheng
e7e74a3250 Rename TargetSubtarget to TargetSubtargetInfo for consistency. 
llvm-svn: 134259
 2011-07-01 21:01:15 +00:00
Evan Cheng
2c06c8b3c2 More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo. 
llvm-svn: 133944
 2011-06-27 21:26:13 +00:00
Jakob Stoklund Olesen
36ac2b0ece Teach antidependency breakers to use RegisterClassInfo. 
No functional change was intended.

llvm-svn: 133202
 2011-06-16 21:56:21 +00:00
Devang Patel
6455c3f6ae Update DBG_VALUEs while breaking anti dependencies. 
llvm-svn: 132487
 2011-06-02 21:26:52 +00:00
Chris Lattner
0304b82f80 Fix a ton of comment typos found by codespell. Patch by 
Luis Felipe Strano Moraes!

llvm-svn: 129558
 2011-04-15 05:18:47 +00:00
Jakob Stoklund Olesen
03856151db Simplify AggressiveAntiDepBreaker's use of register aliases. 
llvm-svn: 121805
 2010-12-14 23:23:15 +00:00
Jim Grosbach
8a3babf59a Anti-dependency breaking needs to be careful not to use reserved regs 
llvm-svn: 112832
 2010-09-02 17:12:55 +00:00
Bill Wendling
5803639a36 Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister. This time 
make sure to allocate enough space in the std::vector.

llvm-svn: 108449
 2010-07-15 19:58:14 +00:00
Bill Wendling
6dfc02e0fc Reserve a goodly amount of room for the vectors. 
llvm-svn: 108448
 2010-07-15 19:41:20 +00:00
Bill Wendling
c4701c4f64 Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister. 
llvm-svn: 108440
 2010-07-15 18:43:09 +00:00
Chris Lattner
44b03b850b revert bill's patches in an attempt to fix the buildbot. 
llvm-svn: 108419
 2010-07-15 06:51:46 +00:00
Bill Wendling
5a80e10d56 Fix headers. 
llvm-svn: 108413
 2010-07-15 06:05:18 +00:00
Bill Wendling
491e6e24f7 Use std::vector instead of a hard-coded array. The length of that array could 
get *very* large, but we only need it to be the size of the number of pregs.

llvm-svn: 108412
 2010-07-15 06:04:38 +00:00
Rafael Espindola
4c16632cdf Convert the last use of getPhysicalRegisterRegClass and remove it. 
AggressiveAntiDepBreaker should not be using getPhysicalRegisterRegClass. An
instruction might be using a register that can only be replaced with one from
a subclass of getPhysicalRegisterRegClass.

With this patch we use getMinimalPhysRegClass. This is correct, but
conservative. We should check the uses of the register and select the
largest register class that can be used in all of them.

llvm-svn: 108122
 2010-07-12 02:55:34 +00:00
Evan Cheng
46b89e05fd Make post-ra scheduling, anti-dep breaking, and register scavenger (conservatively) aware of predicated instructions. This enables ARM to move if-conversion before post-ra scheduler. 
llvm-svn: 106091
 2010-06-16 07:35:02 +00:00
Jim Grosbach
cc4ba44538 Not all entries in the range will have an SUnit. Check for that when looking 
for debug information.

llvm-svn: 105324
 2010-06-02 15:29:36 +00:00
Jim Grosbach
7b5f627cf8 Update debug information when breaking anti-dependencies. rdar://7759363 
llvm-svn: 105300
 2010-06-01 23:48:44 +00:00
Dan Gohman
60e18d1d07 Make BreakAntiDependencies' SUnits argument const, and make the Begin 
and End arguments by-value rather than by-reference.

llvm-svn: 101830
 2010-04-19 23:11:58 +00:00
Bob Wilson
c340ffd866 Tidy whitespace. 
llvm-svn: 100904
 2010-04-09 21:38:26 +00:00
Chris Lattner
7acf9be6c4 move target-independent opcodes out of TargetInstrInfo 
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.

llvm-svn: 95687
 2010-02-09 19:54:29 +00:00
Jim Grosbach
2101815d36 80 column and whitespace cleanup 
llvm-svn: 92837
 2010-01-06 16:48:02 +00:00
David Greene
d91c862004 Change errs() to dbgs(). 
llvm-svn: 92093
 2009-12-24 00:14:25 +00:00
David Goodwin
2bc2d833ab <rdar://problem/7453528>. Track only physical registers that are valid for the target. 
llvm-svn: 90970
 2009-12-09 17:18:22 +00:00
David Goodwin
7945ead4d8 <rdar://problem/6721894>. Allow multiple registers to be renamed together (super and sub) if necessary to break an anti-dependence. 
llvm-svn: 89722
 2009-11-24 00:59:08 +00:00
David Goodwin
d5ef76388e Restructure code to allow renaming of multiple-register groups for anti-dep breaking. 
llvm-svn: 89511
 2009-11-20 23:33:54 +00:00
David Goodwin
8954ccb109 Remove some old experimental code that is no longer needed. Remove additional, speculative scheduling pass as its cost did not translate into significant performance improvement. Minor tweaks. 
llvm-svn: 89471
 2009-11-20 19:32:48 +00:00
David Goodwin
b98c542d94 Fix a couple of problems with maintaining liveness information for antidep breaking. 
llvm-svn: 89404
 2009-11-19 23:12:37 +00:00
David Goodwin
e1d06f2239 Allow target to specify regclass for which antideps will only be broken along the critical path. 
llvm-svn: 88682
 2009-11-13 19:52:48 +00:00
David Goodwin
805a319014 Rename registers to break output dependencies in addition to anti-dependencies. 
llvm-svn: 87015
 2009-11-12 19:08:21 +00:00
David Goodwin
538f9c25f8 Allow targets to specify register classes whose member registers should not be renamed to break anti-dependencies. 
llvm-svn: 86628
 2009-11-10 00:15:47 +00:00
David Goodwin
8a18560a67 Fix bug in aggressive antidep breaking; liveness was not updated correctly for regions that do not have antidep candidates. 
llvm-svn: 86172
 2009-11-05 21:06:09 +00:00
David Goodwin
66b5886123 Replace std::map.at() with std::map[]. 
llvm-svn: 86102
 2009-11-05 01:45:50 +00:00
David Goodwin
5ddf009b51 Break anti-dependencies using free registers in a round-robin manner to avoid introducing new anti-dependencies. 
llvm-svn: 86098
 2009-11-05 01:19:35 +00:00
David Goodwin
629a685f05 Do a scheduling pass ignoring anti-dependencies to identify candidate registers that should be renamed. 
llvm-svn: 85939
 2009-11-03 20:57:50 +00:00
David Goodwin
9a91b1fe3d Between scheduling regions, correctly maintain anti-dep breaking state so that we don't incorrectly rename registers that span these regions. 
llvm-svn: 85537
 2009-10-29 23:30:59 +00:00
David Goodwin
ad8a169be4 Fix a couple of bugs in aggressive anti-dep breaking. 
llvm-svn: 85522
 2009-10-29 19:17:04 +00:00
David Goodwin
0b5b62bfcf Allow the aggressive anti-dep breaker to process the same region multiple times. This is necessary because new anti-dependencies are exposed when "current" ones are broken. 
llvm-svn: 85166
 2009-10-26 22:31:16 +00:00
David Goodwin
62dc7a4d93 Add aggressive anti-dependence breaker. Currently it is not the default for any target. Enable with -break-anti-dependencies=all. 
llvm-svn: 85145
 2009-10-26 19:32:42 +00:00