Commit Graph

11328 Commits

Author SHA1 Message Date
Chris Lattner
54892b4d8d fix an encoding mismatch where "sal %eax, 1" was not using the short encoding
for shl.  Caught by inspection.

llvm-svn: 117820
2010-10-30 18:13:10 +00:00
Chris Lattner
f0bb464017 add a test for the ud2a alias.
llvm-svn: 117803
2010-10-30 17:01:25 +00:00
Duncan Sands
a7198342e7 If a function does a volatile load from a global constant, do not
consider it to be readonly.  In fact, don't even consider it to be
readonly if it does a volatile load from an AllocaInst either (it
is debatable as to whether readonly would be correct or not in this
case; play safe for the moment).  This fixes PR8279.

llvm-svn: 117783
2010-10-30 12:59:44 +00:00
Bob Wilson
183c466006 Overhaul memory barriers in the ARM backend. Radar 8601999.
There were a number of issues to fix up here:
* The "device" argument of the llvm.memory.barrier intrinsic should be
used to distinguish the "Full System" domain from the "Inner Shareable"
domain.  It has nothing to do with using DMB vs. DSB instructions.
* The compiler should never need to emit DSB instructions.  Remove the
ARMISD::SYNCBARRIER node and also remove the instruction patterns for DSB.
* Merge the separate DMB/DSB instructions for options only used for the
disassembler with the default DMB/DSB instructions.  Add the default
"full system" option ARM_MB::SY to the ARM_MB::MemBOpt enum.
* Add a separate ARMISD::MEMBARRIER_MCR node for subtargets that implement
a data memory barrier using the MCR instruction.
* Fix up encodings for these instructions (except MCR).
I also updated the tests and added a few new ones to check for DMB options
that were not currently being exercised.

llvm-svn: 117756
2010-10-30 00:54:37 +00:00
Bill Wendling
b68e0d0ee3 Some instructions end with an "ls" prefix, but it doesn't indicate that they are
conditional. Check for those instructions explicitly.

llvm-svn: 117747
2010-10-29 23:50:21 +00:00
Evan Cheng
d81c33d91e Teach machine cse to eliminate instructions with multiple physreg uses and defs. rdar://8610857.
llvm-svn: 117745
2010-10-29 23:36:03 +00:00
Rafael Espindola
0d9ac34ffa Be more strict on when we produce an undefined reference. In gas a file with
just

.type   foo,@object

will produce an undefined reference to foo. On the other hand, a file with
just

.weakref bar, foo

will not. It is somewhat hard to support both in MC since both statements
should create the symbols. It should be possible if we really need to by
adding to the flags, but hopefully that is not necessary.

With this patch we do not produce a undefined reference in any of those cases.
The assembly file needs an actual use for the undefined reference to be
present.

This is in preparation for a patch implementing .weakref.

llvm-svn: 117735
2010-10-29 23:09:31 +00:00
Bob Wilson
d7f24e831f Change instcombine's getShuffleMask to represent undef with negative values.
This code had previously used 2*N, where N is the mask length, to represent
undef.  That is not safe because the shufflevector operands may have more
than N elements -- they don't have to match the result type.

llvm-svn: 117721
2010-10-29 22:03:05 +00:00
Bob Wilson
d67dddb134 Remove DAG combiner patch to fold vector splats. Instcombiner does it now.
llvm-svn: 117720
2010-10-29 22:03:02 +00:00
Bob Wilson
996353fb5d Make instcombine a little more aggressive in combining vector shuffles.
Allow splats even if they don't match either of the original shuffles,
possibly due to undef entries in the shuffles masks.  Radar 8597790.
Also fix some 80-column violations.

llvm-svn: 117719
2010-10-29 22:02:50 +00:00
Owen Anderson
14cf6bfa0f Update testcase since we're no longer doing the constant forwarding inline with correlated value propagation.
llvm-svn: 117712
2010-10-29 21:18:23 +00:00
Owen Anderson
ccbb8e7b65 Convert this test to .s form.
llvm-svn: 117708
2010-10-29 20:39:19 +00:00
Owen Anderson
7e3af87961 Convert this test to .s form.
llvm-svn: 117704
2010-10-29 20:23:45 +00:00
Owen Anderson
1b3d8432b1 Convert this test to .s form.
llvm-svn: 117699
2010-10-29 20:17:07 +00:00
Owen Anderson
fc007fef16 Convert this test to .s form.
llvm-svn: 117696
2010-10-29 20:12:34 +00:00
Owen Anderson
2119e59322 Covert this test to .s form.
llvm-svn: 117694
2010-10-29 19:56:07 +00:00
Owen Anderson
b75ef99b0c Convert this test to .s form.
llvm-svn: 117693
2010-10-29 19:51:11 +00:00
Owen Anderson
9e3265d3da Convert this test to .s form.
llvm-svn: 117690
2010-10-29 19:45:32 +00:00
Owen Anderson
f9a6495d0a Convert this test to .s form.
llvm-svn: 117689
2010-10-29 19:37:05 +00:00
Owen Anderson
8fb42c665e Convert this test to .s form.
llvm-svn: 117686
2010-10-29 19:17:08 +00:00
Owen Anderson
230358caab Convert this test to .s form.
llvm-svn: 117685
2010-10-29 19:09:08 +00:00
Owen Anderson
4176d55f79 Covert this test to .s form.
llvm-svn: 117684
2010-10-29 19:05:26 +00:00
Owen Anderson
cc7d9dcb52 Convert this test to .s form.
llvm-svn: 117683
2010-10-29 18:58:30 +00:00
Owen Anderson
4e1532000b Convert this test to .s form.
llvm-svn: 117682
2010-10-29 18:48:59 +00:00
Owen Anderson
a84837747c Convert this file to less fragile .s form.
llvm-svn: 117681
2010-10-29 18:41:40 +00:00
Owen Anderson
8e290aafbd Replace this test with the less fragile .s version. Still XFAIL'd, since the ASM parser doesn't parse vabal yet.
llvm-svn: 117679
2010-10-29 18:31:26 +00:00
Owen Anderson
840931e8ed Covert this test to a .s file to reduce fragility.
llvm-svn: 117676
2010-10-29 18:18:40 +00:00
Evan Cheng
392d2cbdcc Avoiding overly aggressive latency scheduling. If the two nodes share an
operand and one of them has a single use that is a live out copy, favor the
one that is live out. Otherwise it will be difficult to eliminate the copy
if the instruction is a loop induction variable update. e.g.

BB:
sub r1, r3, #1
str r0, [r2, r3]
mov r3, r1
cmp
bne BB

=>

BB:
str r0, [r2, r3]
sub r3, r3, #1
cmp
bne BB

This fixed the recent 256.bzip2 regression.

llvm-svn: 117675
2010-10-29 18:09:28 +00:00
NAKAMURA Takumi
a1491c3c47 test/Scripts/macho-dump: Make hack for Python-2.4. [PR7995]
With Python-2.4, Reader::read64 always returns (unexpected) long integer.
FileCheck detects failure on test/MC/MachO among '0' and '0L'.

CentOS5(aka RHEL5 clone) provides python-2.4.

llvm-svn: 117637
2010-10-29 01:14:16 +00:00
Dan Gohman
753c9ce807 Teach memdep to use pointsToConstantMemory to determine that loads
from constant memory don't alias any stores.

llvm-svn: 117636
2010-10-29 01:14:04 +00:00
Owen Anderson
9930e7bcb6 Convert this test to a .s file, so that it's not sensitive to codegen changes.
llvm-svn: 117633
2010-10-29 01:01:56 +00:00
Dan Gohman
a592a0f539 Add a basic testcase for TBAA-aware DSE.
llvm-svn: 117632
2010-10-29 00:54:02 +00:00
Chris Lattner
115cd02d22 add simple support for addrmode5 operands, allowing
vldr.64 to work.  I have no idea if this is fully right, but 
it is in the right direction.

llvm-svn: 117626
2010-10-29 00:27:31 +00:00
Andrew Trick
e77cdffcf3 The ARM jit cannot handle these tests as of 2010-10-27.
(A PR will be linked to this rev.)

llvm-svn: 117620
2010-10-29 00:23:43 +00:00
Rafael Espindola
913ce7ebc8 Improvements to .section parsing:
* If we have a M or a G, reject sections without the type
* Only parse the flag specific arguments if we have M or G
* Parse the corresponding arguments for M and G

We ignore the G arguments and flag for now.

llvm-svn: 117608
2010-10-28 21:33:33 +00:00
Chris Lattner
1917294eb5 most simple arm instructions match correctly now,
it looks like we're not handling [] operands though

llvm-svn: 117607
2010-10-28 21:31:07 +00:00
Chris Lattner
bd838d16e5 fix the asmmatcher generator to handle targets with no RegisterPrefix
(like ARM) correctly.  With this change, we can now match "bx lr"
because we recognize lr as a register.

llvm-svn: 117606
2010-10-28 21:28:42 +00:00
Rafael Espindola
b562975139 Add support for the .string directive.
llvm-svn: 117592
2010-10-28 20:02:27 +00:00
Rafael Espindola
f230319275 Defined weak symbols should have non-zero value.
llvm-svn: 117585
2010-10-28 19:39:57 +00:00
Rafael Espindola
862d688cbd Fix relocations with renamed symbols.
llvm-svn: 117575
2010-10-28 19:08:03 +00:00
Rafael Espindola
e62cf892ae Aliases defined with .symver should copy the binding of the symbols they alias.
Move the existing patching for undefined symbols so that all the patching
is done in the same function.

llvm-svn: 117570
2010-10-28 18:33:03 +00:00
Bob Wilson
65124cd7c7 Teach the DAG combiner to fold a splat of a splat. Radar 8597790.
Also do some minor refactoring to reduce indentation.

llvm-svn: 117558
2010-10-28 17:06:14 +00:00
Roman Divacky
8555f153e9 Implement .equ directive as a synonym to .set.
llvm-svn: 117553
2010-10-28 16:22:58 +00:00
Duncan Sands
60f016b0f9 Testcase for PR8494 (invalid bitcode crashing the bitcode reader).
llvm-svn: 117552
2010-10-28 15:57:30 +00:00
Rafael Espindola
ff7e4e4e43 Implement R_X86_64_DTPOFF32.
llvm-svn: 117548
2010-10-28 15:11:03 +00:00
Rafael Espindola
1d1ff5485c Implement TLSLD.
llvm-svn: 117547
2010-10-28 15:02:40 +00:00
Rafael Espindola
8372247e83 Implement DTPOFF.
llvm-svn: 117546
2010-10-28 14:48:59 +00:00
Rafael Espindola
c44c5b374a Implement TLSLDM.
llvm-svn: 117544
2010-10-28 14:37:09 +00:00
Rafael Espindola
d8ef67f8b9 Implement VK_GOTNTPOFF and switch RelocNeedsGOT to use VariantKind.
llvm-svn: 117543
2010-10-28 14:22:44 +00:00
Evan Cheng
bc4588c439 Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.
llvm-svn: 117531
2010-10-28 06:47:08 +00:00