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27 Commits

Author SHA1 Message Date
Eric Christopher
ce677a909d Update objectsize intrinsic and associated dependencies. Fix 
lowering code and update testcases.

llvm-svn: 91979
 2009-12-23 02:51:48 +00:00
Bill Wendling
ce8aa5aab2 Remove superfluous SDNode ordering. 
llvm-svn: 91971
 2009-12-23 01:28:19 +00:00
Bill Wendling
e7107691df Remove node ordering from inline asm nodes. It's not needed. 
llvm-svn: 91961
 2009-12-23 00:47:20 +00:00
Bill Wendling
d5577d5bdc Remove node ordering from VA nodes. It's not needed. 
llvm-svn: 91958
 2009-12-23 00:44:51 +00:00
Bill Wendling
12c3fc9d60 Assign ordering to SDNodes in PromoteNode. Also fixing a subtle bug where BSWAP 
was using "Tmp1" in the first getNode call instead of Node->getOperand(0).

llvm-svn: 91936
 2009-12-22 22:53:39 +00:00
Bill Wendling
237cb134ed Allow 0 as an order number. Don't assign an order to formal arguments. 
llvm-svn: 91920
 2009-12-22 21:35:02 +00:00
Bob Wilson
c19003bca7 Report an error for bad inline assembly, where the value passed for an 
"indirect" operand is not a pointer.

llvm-svn: 91913
 2009-12-22 18:34:19 +00:00
Bill Wendling
fc4c238bd5 Add more plumbing. This time in the LowerArguments and "get" functions which 
return partial registers. This affected the back-end lowering code some.

Also patch up some places I missed before in the "get" functions.

llvm-svn: 91880
 2009-12-22 02:10:19 +00:00
Bill Wendling
5aff4bce9d Add SDNode ordering to inlined asm and VA functions. 
llvm-svn: 91876
 2009-12-22 01:25:10 +00:00
Bill Wendling
b0bd44f096 Adding more assignment of ordering to SDNodes. This time in the "call" and 
generic copy functions.

llvm-svn: 91872
 2009-12-22 01:11:43 +00:00
Bill Wendling
e01ea21d47 Add ordering of SDNodes to LowerCallTo. 
llvm-svn: 91866
 2009-12-22 00:50:32 +00:00
Bill Wendling
761507cdcc Now add ordering to SDNodes created by the massive intrinsic lowering function. 
llvm-svn: 91863
 2009-12-22 00:40:51 +00:00
Bill Wendling
d5649e184e To make things interesting, I added MORE code to set the ordering of 
SDNodes. This time in the load/store and limited-precision code.

llvm-svn: 91860
 2009-12-22 00:12:37 +00:00
Bill Wendling
88d8eb621b Add more plumbing to assign ordering to SDNodes. Have the "getValue" method 
assign the ordering when called. Combine some of the ordering assignments to
keep things simple.

llvm-svn: 91857
 2009-12-21 23:47:40 +00:00
Bill Wendling
576a9ae88d More ordering plumbing. This time for GEP. I need to remember to assign 
orderings to values returned by getValue().

llvm-svn: 91850
 2009-12-21 23:10:19 +00:00
Bill Wendling
85f5cca691 Another incremental check-in for assigning ordering to SDNodes. This time for 
shuffle and insert vector.

llvm-svn: 91847
 2009-12-21 22:42:14 +00:00
Bill Wendling
9a0bd2daca Assign ordering to more instructions. Incremental check-in. 
llvm-svn: 91846
 2009-12-21 22:30:11 +00:00
Bill Wendling
97d31ee226 - Add a bit more plumbing assigning an order to SDNodes. 
- Modify the "dump" method to emit the order of an SDNode.

llvm-svn: 91845
 2009-12-21 21:59:52 +00:00
Bill Wendling
2d7ea292a6 First wave of plumbing for assigning an ordering to SDNodes. This takes care of 
a lot of the branching instructions.

llvm-svn: 91838
 2009-12-21 19:59:38 +00:00
Bill Wendling
aed33d79ab Changes from review: 
- Move DisableScheduling flag into TargetOption.h
- Move SDNodeOrdering into its own header file. Give it a minimal interface that
  doesn't conflate construction with storage.
- Move assigning the ordering into the SelectionDAGBuilder.

This isn't used yet, so there should be no functional changes.

llvm-svn: 91727
 2009-12-18 23:32:53 +00:00
Bob Wilson
a9f20f9f6e Handle ARM inline asm "w" constraints with 64-bit ("d") registers. 
The change in SelectionDAGBuilder is needed to allow using bitcasts to convert
between f64 (the default type for ARM "d" registers) and 64-bit Neon vector
types.  Radar 7457110.

llvm-svn: 91649
 2009-12-18 01:03:29 +00:00
Bob Wilson
db6c6a5e63 Fix a comment grammaro. 
llvm-svn: 91584
 2009-12-17 05:07:36 +00:00
Daniel Dunbar
70f0e3d7d0 Reapply r91392, it was only unmasking the bug, and since TOT is still broken having it reverted does no good. 
llvm-svn: 91560
 2009-12-16 20:10:05 +00:00
Daniel Dunbar
bcd7588947 Revert "Initial work on disabling the scheduler. This is a work in progress, and 
this", this broke llvm-gcc bootstrap for release builds on
x86_64-apple-darwin10.

llvm-svn: 91533
 2009-12-16 10:56:02 +00:00
Bill Wendling
e972f48c8f Initial work on disabling the scheduler. This is a work in progress, and this 
stuff isn't used just yet.

We want to model the GCC `-fno-schedule-insns' and `-fno-schedule-insns2'
flags. The hypothesis is that the people who use these flags know what they are
doing, and have hand-optimized the C code to reduce latencies and other
conflicts.

The idea behind our scheme to turn off scheduling is to create a map "on the
side" during DAG generation. It will order the nodes by how they appeared in the
code. This map is then used during scheduling to get the ordering.

llvm-svn: 91392
 2009-12-15 01:54:51 +00:00
Dan Gohman
b2cbb1e37e Fix the result type of SELECT nodes lowered from Select instructions with 
aggregate return values. This fixes PR5754.

llvm-svn: 91145
 2009-12-11 19:50:50 +00:00
Dan Gohman
d23a0a12d9 Rename SelectionDAGLowering to SelectionDAGBuilder, and rename 
SelectionDAGBuild.cpp to SelectionDAGBuilder.cpp.

llvm-svn: 89681
 2009-11-23 18:04:58 +00:00