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716 Commits

Author SHA1 Message Date
Chris Lattner
7560c5f913 add options to view the dags before the first or second pass of dag combine. 
llvm-svn: 33249
 2007-01-16 04:55:25 +00:00
Chris Lattner
0f765fae89 Implement some trivial FP foldings when -enable-unsafe-fp-math is specified. 
This implements CodeGen/PowerPC/unsafe-math.ll

llvm-svn: 33024
 2007-01-08 23:04:05 +00:00
Chris Lattner
a975b95adb Eliminate static ctors from Statistics 
llvm-svn: 32698
 2006-12-19 22:41:21 +00:00
Evan Cheng
7775b33a32 Cannot combine an indexed load / store any further. 
llvm-svn: 32629
 2006-12-16 06:25:23 +00:00
Jim Laskey
0809c79c60 This code was usurping the sextload expand in teh legalizer. Just make 
sure the right conditions are checked.

llvm-svn: 32611
 2006-12-15 21:38:30 +00:00
Chris Lattner
df2345fcbe make this code more aggressive about turning store fpimm into store int imm. 
This is not sufficient to fix X86/store-fp-constant.ll

llvm-svn: 32465
 2006-12-12 04:16:14 +00:00
Evan Cheng
93c75d4cfb Don't convert store double C, Ptr to store long C, Ptr if i64 is not a legal type. 
llvm-svn: 32434
 2006-12-11 17:25:19 +00:00
Nate Begeman
2566f75e7a Move something that should be in the dag combiner from the legalizer to the 
dag combiner.

llvm-svn: 32431
 2006-12-11 02:23:46 +00:00
Chris Lattner
db346e68a9 Fix CodeGen/PowerPC/2006-12-07-SelectCrash.ll on PPC64 
llvm-svn: 32336
 2006-12-07 22:36:47 +00:00
Bill Wendling
23b8b13c9d Removing even more <iostream> includes. 
llvm-svn: 32320
 2006-12-07 20:04:42 +00:00
Chris Lattner
a531ce882e Detemplatize the Statistic class. The only type it is instantiated with 
is 'unsigned'.

llvm-svn: 32279
 2006-12-06 17:46:33 +00:00
Chris Lattner
aa8f67c2b5 For better or worse, load from i1 is assumed to be zero extended. Do not 
form a load from i1 from larger loads that may not be zext'd.

llvm-svn: 31933
 2006-11-27 04:40:53 +00:00
Chris Lattner
a2bbd246e0 Fix PR1011 and CodeGen/Generic/2006-11-20-DAGCombineCrash.ll 
llvm-svn: 31878
 2006-11-20 18:05:46 +00:00
Evan Cheng
43ba439abd Fix an incorrectly inverted condition. 
llvm-svn: 31773
 2006-11-16 00:08:20 +00:00
Chris Lattner
edfc824673 disallow preinc of a frameindex. This is not profitable and causes 2-addr 
pass to explode.  This fixes a bunch of llc-beta failures on ppc last night.

llvm-svn: 31661
 2006-11-11 01:00:15 +00:00
Chris Lattner
bf0c3e3a02 reduce indentation by using early exits. No functionality change. 
llvm-svn: 31660
 2006-11-11 00:56:29 +00:00
Chris Lattner
671ea7a93b move big chunks of code out-of-line, no functionality change. 
llvm-svn: 31658
 2006-11-11 00:39:41 +00:00
Chris Lattner
1f61c6c84d Fix a dag combiner bug exposed by my recent instcombine patch. This fixes 
CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast

llvm-svn: 31644
 2006-11-10 21:37:15 +00:00
Evan Cheng
78ba99caa5 When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle. 
llvm-svn: 31631
 2006-11-10 08:28:11 +00:00
Evan Cheng
17dd6dd46c Don't attempt expensive pre-/post- indexed dag combine if target does not support them. 
llvm-svn: 31598
 2006-11-09 19:10:46 +00:00
Evan Cheng
89ee587963 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
llvm-svn: 31595
 2006-11-09 17:55:04 +00:00
Evan Cheng
6b7d127df9 getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT. 
llvm-svn: 31584
 2006-11-09 04:29:46 +00:00
Evan Cheng
fcef896f6e Match more post-indexed ops. 
llvm-svn: 31569
 2006-11-08 20:27:27 +00:00
Jim Laskey
28fec74f1b Remove redundant <cmath>. 
llvm-svn: 31561
 2006-11-08 19:16:44 +00:00
Evan Cheng
1f5c4a6c43 - When performing pre-/post- indexed load/store transformation, do not worry 
about whether the new base ptr would be live below the load/store. Let two
  address pass split it back to non-indexed ops.
- Minor tweaks / fixes.

llvm-svn: 31544
 2006-11-08 08:30:28 +00:00
Evan Cheng
acc6a98286 Fixed a minor bug preventing some pre-indexed load / store transformation. 
llvm-svn: 31543
 2006-11-08 06:56:05 +00:00
Evan Cheng
e50f5e4c05 Fix a obscure post-indexed load / store dag combine bug. 
llvm-svn: 31537
 2006-11-08 02:38:55 +00:00
Evan Cheng
3db2b3aab9 Add post-indexed load / store transformations. 
llvm-svn: 31498
 2006-11-07 09:03:05 +00:00
Evan Cheng
f191d53a9a Add comment. 
llvm-svn: 31473
 2006-11-06 08:14:30 +00:00
Jeff Cohen
e1003da1a2 Unbreak VC++ build. 
llvm-svn: 31464
 2006-11-05 19:31:28 +00:00
Evan Cheng
bf7db95159 Added pre-indexed store support. 
llvm-svn: 31459
 2006-11-05 09:31:14 +00:00
Evan Cheng
466e20fca2 Rename 
llvm-svn: 31413
 2006-11-03 07:21:16 +00:00
Reid Spencer
8cac48e619 Remove dead variable. Fix 80 column violations. 
llvm-svn: 31412
 2006-11-03 03:30:34 +00:00
Evan Cheng
a0133317f7 Added DAG combiner transformation to generate pre-indexed loads. 
llvm-svn: 31410
 2006-11-03 03:06:21 +00:00
Reid Spencer
4bafa71dc1 For PR786: 
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.

llvm-svn: 31380
 2006-11-02 20:25:50 +00:00
Jim Laskey
c06a0bc853 Add option for controlling inclusion of global AA. 
llvm-svn: 31040
 2006-10-18 19:08:31 +00:00
Jim Laskey
288c230cbd Use global info for alias analysis. 
llvm-svn: 31035
 2006-10-18 12:29:57 +00:00
Chris Lattner
bfbb76e103 Fix CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll 
llvm-svn: 31019
 2006-10-17 21:24:15 +00:00
Jim Laskey
7f16ca4872 Make it simplier to dump DAGs while in DAGCombiner. Remove a nasty optimization. 
llvm-svn: 31009
 2006-10-17 19:33:52 +00:00
Evan Cheng
d9bec725a2 Make sure operand does have size and element type operands. 
llvm-svn: 30999
 2006-10-17 17:06:35 +00:00
Evan Cheng
2d9318cff1 Be careful when looking through a vbit_convert. Optimizing this: 
(vector_shuffle
  (vbitconvert (vbuildvector (copyfromreg v4f32), 1, v4f32), 4, f32),
  (undef, undef, undef, undef), (0, 0, 0, 0), 4, f32)
to the
  vbitconvert
is a very bad idea.

llvm-svn: 30989
 2006-10-16 22:49:37 +00:00
Jim Laskey
06f4428abc Pass AliasAnalysis thru to DAGCombiner. 
llvm-svn: 30984
 2006-10-16 20:52:31 +00:00
Jim Laskey
1070dfefba Tidy up after truncstore changes. 
llvm-svn: 30961
 2006-10-14 12:14:27 +00:00
Chris Lattner
08aa96b824 Make sure that the node returned by SimplifySetCC is added to the worklist 
so that it can be deleted if unused.

llvm-svn: 30955
 2006-10-14 03:52:46 +00:00
Chris Lattner
a515f322f3 fold setcc of a setcc. 
llvm-svn: 30953
 2006-10-14 01:02:29 +00:00
Chris Lattner
25ad62d132 When SimplifySetCC was moved to the DAGCombiner, it was never removed from 
SelectionDAG and it has since bitrotted.  Remove the copy from SelectionDAG.
Next, remove the constant folding piece of DAGCombiner::SimplifySetCC into
a new FoldSetCC method which can be used by getNode() and SimplifySetCC.

This fixes obscure bugs.

llvm-svn: 30952
 2006-10-14 00:41:01 +00:00
Jim Laskey
bf50140aac Reduce the workload by not adding chain users to work list. 
llvm-svn: 30948
 2006-10-13 23:32:28 +00:00
Evan Cheng
fe5bb5dbe6 Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. 
llvm-svn: 30945
 2006-10-13 21:14:26 +00:00
Chris Lattner
70444d5663 Lower X%C into X/C+stuff. This allows the 'division by a constant' logic to 
apply to rems as well as divs.  This fixes PR945 and speeds up ReedSolomon
from 14.57s to 10.90s (which is now faster than gcc).

It compiles CodeGen/X86/rem.ll into:

_test1:
        subl $4, %esp
        movl %esi, (%esp)
        movl $2155905153, %ecx
        movl 8(%esp), %esi
        movl %esi, %eax
        imull %ecx
        addl %esi, %edx
        movl %edx, %eax
        shrl $31, %eax
        sarl $7, %edx
        addl %eax, %edx
        imull $255, %edx, %eax
        subl %eax, %esi
        movl %esi, %eax
        movl (%esp), %esi
        addl $4, %esp
        ret
_test2:
        movl 4(%esp), %eax
        movl %eax, %ecx
        sarl $31, %ecx
        shrl $24, %ecx
        addl %eax, %ecx
        andl $4294967040, %ecx
        subl %ecx, %eax
        ret
_test3:
        subl $4, %esp
        movl %esi, (%esp)
        movl $2155905153, %ecx
        movl 8(%esp), %esi
        movl %esi, %eax
        mull %ecx
        shrl $7, %edx
        imull $255, %edx, %eax
        subl %eax, %esi
        movl %esi, %eax
        movl (%esp), %esi
        addl $4, %esp
        ret

instead of div/idiv instructions.

llvm-svn: 30920
 2006-10-12 20:58:32 +00:00
Chris Lattner
e38ce54cc9 add a minor dag combine noticed when looking at PR945 
llvm-svn: 30915
 2006-10-12 20:23:19 +00:00