RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-12-28 14:36:34 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
57,213 Commits 4 Branches 5 Tags 634 MiB
d823a2e8ee
Commit Graph

57213 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Chris Lattner
f1f926247f enhance the immediate field encoding to know whether the immediate 
is pc relative or not, mark call and branches as pcrel.

llvm-svn: 96026
 2010-02-12 22:27:07 +00:00
Evan Cheng
c2084b74bb Load / store multiple instructions cannot load / store sp. Sorry, can't come up with a reasonable test case. 
llvm-svn: 96023
 2010-02-12 22:17:21 +00:00
Dale Johannesen
d52ea2ffc6 This should have gone in with 26015, see comments there. 
llvm-svn: 96020
 2010-02-12 22:00:40 +00:00
Johnny Chen
a56964de27 Add halfword multiply accumulate long SMLALBB/BT/TB/TT for disassembly only. 
llvm-svn: 96019
 2010-02-12 21:59:23 +00:00
Chris Lattner
2a0d9140f5 doxygenize some comments, patch by Peter Collingbourne! 
llvm-svn: 96018
 2010-02-12 21:54:28 +00:00
Dale Johannesen
ea96b2974f When save/restoring CR at prolog/epilog, in a large 
stack frame, the prolog/epilog code was using the same
register for the copy of CR and the address of the save slot.  Oops.
This is fixed here for Darwin, sort of, by reserving R2 for this case.
A better way would be to do the store before the decrement of SP,
which is safe on Darwin due to the red zone.

SVR4 probably has the same problem, but I don't know how to fix it;
there is no red zone and R2 is already used for something else.
I'm going to leave it to someone interested in that target.

Better still would be to rewrite the CR-saving code completely;
spilling each CR subregister individually is horrible code.

llvm-svn: 96015
 2010-02-12 21:35:34 +00:00
Chris Lattner
2265d6280b Add support for a union type in LLVM IR. Patch by Talin! 
llvm-svn: 96011
 2010-02-12 20:49:41 +00:00
Johnny Chen
0f2837db87 Add SWP (Swap) and SWPB (Swap Byte) for disassembly only. 
llvm-svn: 96010
 2010-02-12 20:48:24 +00:00
Evan Cheng
3e15f48df5 Also recognize armv6t2-* and armv5te-* triplets. 
llvm-svn: 96008
 2010-02-12 20:39:35 +00:00
Dan Gohman
cdb2e784ff Fix a case of mismatched types in an Add that turned up in 447.dealII. 
llvm-svn: 96007
 2010-02-12 20:39:25 +00:00
Evan Cheng
c75a237988 Add ARM bitcode file magic. 
llvm-svn: 96006
 2010-02-12 20:13:44 +00:00
Dan Gohman
cbf5771473 Reapply 95979, a compile-time speedup, now that the bug it exposed is fixed. 
llvm-svn: 96005
 2010-02-12 19:35:25 +00:00
Dan Gohman
006952d39d Fix this code to avoid dereferencing an end() iterator in 
offset distributions it doesn't expect.

llvm-svn: 96002
 2010-02-12 19:20:37 +00:00
Johnny Chen
473d813c5d Add CPS, MRS, MRSsys, MSR, MSRsys for disassembly only. 
llvm-svn: 95999
 2010-02-12 18:55:33 +00:00
Dale Johannesen
c7b5b1dcfa Rewrite handling of DBG_VALUE; previous algorithm 
didn't handle
X =
Y<dead> = use X
DBG_VALUE(X)
I was hoping to avoid this approach as it's slower,
but I don't think it can be done.

llvm-svn: 95996
 2010-02-12 18:40:17 +00:00
Chris Lattner
ecb203898a 1. modernize the constantmerge pass, using densemap/smallvector. 
2. don't bother trying to merge globals in non-default sections,
   doing so is quite dubious at best anyway.
3. fix a bug reported by Arnaud de Grandmaison where we'd try to
   merge two globals in different address spaces.

llvm-svn: 95995
 2010-02-12 18:17:23 +00:00
Chris Lattner
fbf6ef7c34 rename test 
llvm-svn: 95993
 2010-02-12 18:05:00 +00:00
Daniel Dunbar
43ad3dfe00 Revert "Reverse the order for collecting the parts of an addrec. The order", it 
is breaking llvm-gcc bootstrap.

llvm-svn: 95988
 2010-02-12 17:27:08 +00:00
Anton Korobeynikov
c66de6687b Testcases for recent stdcall / fastcall mangling improvements 
llvm-svn: 95982
 2010-02-12 15:29:13 +00:00
Anton Korobeynikov
ffbf0f7027 Setup correct data layout to match gcc's expectations on mingw32. 
llvm-svn: 95981
 2010-02-12 15:28:56 +00:00
Anton Korobeynikov
7073515c86 Cleanup stdcall / fastcall name mangling. 
This should fix alot of problems we saw so far, e.g. PRs 5851 & 2936

llvm-svn: 95980
 2010-02-12 15:28:40 +00:00
Dan Gohman
2f46f79492 Reverse the order for collecting the parts of an addrec. The order 
doesn't matter, except that ScalarEvolution tends to need less time
to fold the results this way.

llvm-svn: 95979
 2010-02-12 11:08:26 +00:00
Dan Gohman
c40eb525ad Reapply the new LoopStrengthReduction code, with compile time and 
bug fixes, and with improved heuristics for analyzing foreign-loop
addrecs.

This change also flattens IVUsers, eliminating the stride-oriented
groupings, which makes it easier to work with.

llvm-svn: 95975
 2010-02-12 10:34:29 +00:00
Lang Hames
46f6d32509 * Updated the cost matrix normalization proceedure to better handle infinite costs. 
* Enabled R1/R2 application for nodes with infinite spill costs in the Briggs heuristic (made
safe by the changes to the normalization proceedure).
* Removed a redundant header.

llvm-svn: 95973
 2010-02-12 09:43:37 +00:00
Evan Cheng
dc2bb77b1b Update test to match 95961. 
llvm-svn: 95971
 2010-02-12 07:48:46 +00:00
Evan Cheng
06c22ed109 Test for 95961. 
llvm-svn: 95962
 2010-02-12 02:35:03 +00:00
Chris Lattner
c3dbd2e2fc add a bunch of mod/rm encoding types for fixed mod/rm bytes. 
This will work better for the disassembler for modeling things
like lfence/monitor/vmcall etc.

llvm-svn: 95960
 2010-02-12 02:06:33 +00:00
Evan Cheng
86a3020e95 Test case for 95958. 
llvm-svn: 95959
 2010-02-12 02:02:23 +00:00
Chris Lattner
bde30aec54 revert r95949, it turns out that adding new prefixes is not a 
great solution for the disassembler, we'll go with "plan b".

llvm-svn: 95957
 2010-02-12 01:55:31 +00:00
Daniel Dunbar
08f1b2f670 MC: Fix bug where trailing tied operands were forgotten; the X86 assembler 
matcher is now free of implicit operands!
 - Still need to clean up the code now that we don't to worry about implicit
   operands, and to make it a hard error if an instruction fails to specify all
   of its operands for some reason.

llvm-svn: 95956
 2010-02-12 01:46:54 +00:00
Johnny Chen
d4e67c4648 Added coprocessor Instructions CDP, CDP2, MCR, MCR2, MRC, MRC2, MCRR, MCRR2, 
MRRC, MRRc2.  For disassembly only.

llvm-svn: 95955
 2010-02-12 01:44:23 +00:00
Bob Wilson
2fd80c3d94 Add a new pass on machine instructions to optimize away PHI cycles that 
reduce down to a single value.  InstCombine already does this transformation
but DAG legalization may introduce new opportunities.  This has turned out to
be important for ARM where 64-bit values are split up during type legalization:
InstCombine is not able to remove the PHI cycles on the 64-bit values but
the separate 32-bit values can be optimized.  I measured the compile time 
impact of this (running llc on 176.gcc) and it was not significant.

llvm-svn: 95951
 2010-02-12 01:30:21 +00:00
Daniel Dunbar
c82069746b X86: Fix definition for RCL/RCR.*m? operations -- they were getting represented 
with "tied memory operands", which is wrong.

llvm-svn: 95950
 2010-02-12 01:22:03 +00:00
Chris Lattner
abfe545e92 add another bit of space for new kinds of instruction prefixes. 
llvm-svn: 95949
 2010-02-12 01:15:16 +00:00
Nate Begeman
a146ac8f86 Add a missing pattern for movhps so that we get: 
movq	(%ecx,%edx,2), %xmm2
movhps	(%ecx,%eax,2), %xmm2

rather than:

movq     (%eax, %edx, 2), %xmm2		
movq     (%eax, %ebx, 2), %xmm3		
movlhps  %xmm3, %xmm2			

Testcase forthcoming.

llvm-svn: 95948
 2010-02-12 01:10:45 +00:00
Chris Lattner
9307e00dc0 fix the encodings of monitor and mwait, which were completely 
busted in both encoders.  I'm not bothering to fix it in the
old one at this point.

llvm-svn: 95947
 2010-02-12 01:06:22 +00:00
Chris Lattner
f6aca786be improve support for minix, PR6280, patch by 
Kees van Reeuwijk!

llvm-svn: 95946
 2010-02-12 00:37:46 +00:00
Charles Davis
d69c12ecc6 Add a new function attribute, 'alignstack'. It will indicate (when the backends 
implement support for it) that the stack should be forcibly realigned in the
prologue (and the process reversed in the epilogue).

llvm-svn: 95945
 2010-02-12 00:31:15 +00:00
Jakob Stoklund Olesen
b800ff8ca9 Reapply coalescer fix for better cross-class coalescing. 
This time with fixed test cases.

llvm-svn: 95938
 2010-02-11 23:55:29 +00:00
Chris Lattner
fcce3c5ee4 enhance llvm-mc -show-inst to print the enum of an instruction, like so: 
testb	%al, %al                ## <MCInst #2412 TEST8rr
                                        ##   <MCOperand Reg:2>
                                        ##   <MCOperand Reg:2>>
	jne	LBB1_7                  ## <MCInst #938 JNE_1
                                        ##   <MCOperand Expr:(LBB1_7)>>

llvm-svn: 95935
 2010-02-11 22:57:32 +00:00
Chris Lattner
144a1b7a24 add a new MCInstPrinter::getOpcodeName interface, when it is 
implemented, llvm-mc --show-inst now uses it to print the
instruction opcode as well as the number.

llvm-svn: 95929
 2010-02-11 22:39:10 +00:00
Anton Korobeynikov
76b8d76b39 Document binutils requirements for coff targets (cygwin / mingw32). 
llvm-svn: 95928
 2010-02-11 21:51:51 +00:00
Chris Lattner
a10c41c6df improve encoding information for branches. We now know they have 
8 or 32-bit immediates, which allows the new encoder to handle
them.

llvm-svn: 95927
 2010-02-11 21:45:31 +00:00
Daniel Dunbar
3ee9e4a9a5 MC: Move assembler-backend's fixup list into the fragment. 
llvm-svn: 95926
 2010-02-11 21:29:46 +00:00
Daniel Dunbar
fa324dd09b MC: Move MCSectionData::Fixup out to MCAsmFixup. 
llvm-svn: 95925
 2010-02-11 21:29:29 +00:00
Chris Lattner
b82b965968 make getFixupKindInfo return a const reference, allowing 
the tables to be const.  Teach MCCodeEmitter to handle
the target-indep kinds so that we don't crash on them.

llvm-svn: 95924
 2010-02-11 21:27:18 +00:00
Jakob Stoklund Olesen
da3bd912ec Revert functional change. This broke a bunch of tests. 
llvm-svn: 95921
 2010-02-11 21:19:44 +00:00
Chris Lattner
a0e0de6974 switch to target-indep fixups for 1/2/4/8 byte data. 
llvm-svn: 95920
 2010-02-11 21:17:54 +00:00
Devang Patel
c83d8c3ccf revert 95903. 
llvm-svn: 95918
 2010-02-11 20:58:56 +00:00
Jakob Stoklund Olesen
8b992fb512 It is always good to do a cross-class join when the large register has a tiny interval. 
Also avoid division by zero.

llvm-svn: 95917
 2010-02-11 20:58:45 +00:00