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47 Commits

Author SHA1 Message Date
Peter Collingbourne
dad5df2ecb Support: Remove MemoryObject and DataStreamer interfaces. 
These interfaces are no longer used.

Differential Revision: https://reviews.llvm.org/D26222

llvm-svn: 285774
 2016-11-02 00:08:37 +00:00
Krzysztof Parzyszek
894aed3c86 [Hexagon] Rename operand/predicate names for unshifted integers 
For example, rename s6Ext to s6_0Ext. The names for shifted integers
include the underscore and this will make the naming consistent. It
also exposed a few duplicates that were removed.

llvm-svn: 285728
 2016-11-01 19:02:10 +00:00
Mehdi Amini
fa86e5fee9 Move the global variables representing each Target behind accessor function 
This avoids "static initialization order fiasco"

Differential Revision: https://reviews.llvm.org/D25412

llvm-svn: 283702
 2016-10-09 23:00:34 +00:00
Colin LeMahieu
7f4bcd51cf [Hexagon] NFC Removing 'V4_' prefix from duplex instruction names. 
llvm-svn: 283514
 2016-10-07 00:15:07 +00:00
Colin LeMahieu
aad216e2a8 [Hexagon] NFC. Canonicalizing absolute address instruction names. 
llvm-svn: 283507
 2016-10-06 23:02:11 +00:00
Krzysztof Parzyszek
1f843c813e [Hexagon] Fix disassembler crash after r279255 
When p0 was added as an explicit operand to the duplex subinstructions,
the disassembler was not updated to reflect this.

llvm-svn: 281104
 2016-09-09 21:45:00 +00:00
Mehdi Amini
9ff867f98c [NFC] Header cleanup 
Removed some unused headers, replaced some headers with forward class declarations.

Found using simple scripts like this one:
clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap'

Patch by Eugene Kosov <claprix@yandex.ru>

Differential Revision: http://reviews.llvm.org/D19219

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 266595
 2016-04-18 09:17:29 +00:00
Colin LeMahieu
397dce7d53 [Hexagon] Adding missing break in switch statement. Extra operands would have been appended to the end. 
llvm-svn: 263657
 2016-03-16 20:00:38 +00:00
Colin LeMahieu
7f4d873f79 [NFC] Convert tabs to spaces. 
llvm-svn: 262411
 2016-03-01 22:05:03 +00:00
Colin LeMahieu
698983cb93 [NFC] Referencing manual for reason why subregbit is checked 
llvm-svn: 259380
 2016-02-01 18:15:39 +00:00
Benjamin Kramer
75511fc092 Reflect the MC/MCDisassembler split on the include/ level. 
No functional change, just moving code around.

llvm-svn: 258818
 2016-01-26 16:44:37 +00:00
Craig Topper
bf1c629225 Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef. 
llvm-svn: 254843
 2015-12-05 07:13:35 +00:00
Craig Topper
d89e91d8dd [Hexagon] Use array_lengthof and const correct and type correct the array and array size. NFC 
llvm-svn: 254384
 2015-12-01 06:13:08 +00:00
Craig Topper
d91ffee826 Use array_lengthof instead of manually calculating it. NFC 
llvm-svn: 254383
 2015-12-01 06:13:06 +00:00
Craig Topper
b13c0bdda0 [Hexagon] Use ArrayRef to avoid needing to calculate an array size. Interestingly the original code may have had a bug because it was passing the byte size of a uint16_t array instead of the number of entries. 
llvm-svn: 254382
 2015-12-01 06:13:04 +00:00
Colin LeMahieu
bae5bb8572 [Hexagon] Factoring bundle creation in to a utility function. 
llvm-svn: 253056
 2015-11-13 17:42:46 +00:00
Colin LeMahieu
350f96d137 [Hexagon] Enabling ASM parsing on Hexagon backend and adding instruction parsing tests. General updating of the code emission. 
llvm-svn: 252443
 2015-11-09 04:07:48 +00:00
Colin LeMahieu
d7cec86ab4 [Hexagon] Fixing mistaken case fallthrough. 
llvm-svn: 251867
 2015-11-03 00:21:19 +00:00
Colin LeMahieu
fa53018d3f [Hexagon] Adding skeleton of HVX extension instructions. 
llvm-svn: 250600
 2015-10-17 01:33:04 +00:00
Cameron Esfahani
0c35a7deea Explicitly clear the MI operand list when getInstruction() is called. Call MI.clear() within MCD::OPC_Decode case and inside of translateInstruction() for the X86 target. Remove now unnecessary MI.clear() from ARMDisassembler. 
Summary: Explicitly clear the MI operand list when getInstruction() is called.

Reviewers: hfinkel, t.p.northover, hvarga, kparzysz, jyknight, qcolombet, uweigand

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11665

llvm-svn: 244557
 2015-08-11 01:15:07 +00:00
Alexander Kornienko
f993659b8f Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 
Apparently, the style needs to be agreed upon first.

llvm-svn: 240390
 2015-06-23 09:49:53 +00:00
Alexander Kornienko
40cb19d802 Fixed/added namespace ending comments using clang-tidy. NFC 
The patch is generated using this command:

tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \
  -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \
  llvm/lib/


Thanks to Eugene Kosov for the original patch!

llvm-svn: 240137
 2015-06-19 15:57:42 +00:00
Colin LeMahieu
705d770c5e [Hexagon] Adding decoders for signed operands and ensuring all signed operand types disassemble correctly. 
llvm-svn: 239477
 2015-06-10 16:52:32 +00:00
Colin LeMahieu
b9726af751 [Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing. 
llvm-svn: 239161
 2015-06-05 16:00:11 +00:00
Colin LeMahieu
b1cfdef068 Revert r239095 incorrect test tree. 
llvm-svn: 239102
 2015-06-04 21:32:42 +00:00
Colin LeMahieu
cdf9553102 [Hexagon] Adding functionality for duplexing. Duplexing is a way to compress commonly used pairs of instructions in order to reduce code size. The test case duplex.ll normally would be 8 bytes, assign register to 0 and jump to link register. After duplexing this is only 4 bytes. This also tests the HexagonMCShuffler code path which is used to make sure duplexed instructions still follow slot requirements. 
llvm-svn: 239095
 2015-06-04 21:16:16 +00:00
Colin LeMahieu
084c4d499d [Hexagon] Disassembling, printing, and emitting instructions a whole-bundle at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch. 
llvm-svn: 238556
 2015-05-29 14:44:13 +00:00
Jim Grosbach
b635db1046 MC: Modernize MCOperand API naming. NFC. 
MCOperand::Create*() methods renamed to MCOperand::create*().

llvm-svn: 237275
 2015-05-13 18:37:00 +00:00
Colin LeMahieu
2397babc56 [Hexagon] Moving remaining methods off of HexagonMCInst in to HexagonMCInstrInfo and eliminating HexagonMCInst class. 
llvm-svn: 229914
 2015-02-19 21:10:50 +00:00
Colin LeMahieu
350f7188f4 [Hexagon] Adding vector load with post-increment instructions. Adding decoder function for 64bit control register class. 
llvm-svn: 228708
 2015-02-10 16:59:36 +00:00
Chandler Carruth
0b619fcc8e [cleanup] Re-sort all the #include lines in LLVM using 
utils/sort_includes.py.

I clearly haven't done this in a while, so more changed than usual. This
even uncovered a missing include from the InstrProf library that I've
added. No functionality changed here, just mechanical cleanup of the
include order.

llvm-svn: 225974
 2015-01-14 11:23:27 +00:00
Colin LeMahieu
286196b24f [Hexagon] Adding deallocframe and circular addressing loads. 
llvm-svn: 224869
 2014-12-26 20:30:58 +00:00
Colin LeMahieu
16013f08b8 [Hexagon] Adding transfers to and from control registers. 
llvm-svn: 224599
 2014-12-19 19:06:32 +00:00
Colin LeMahieu
5f7eada35a [Hexagon] Adding DoubleRegs decoder. Moving C2_mux and A2_nop. Adding combine imm-imm form. 
llvm-svn: 223494
 2014-12-05 18:24:06 +00:00
Colin LeMahieu
a0eacebee5 [Hexagon] Marking some instructions as CodeGenOnly=0 and adding disassembly tests. 
llvm-svn: 223334
 2014-12-04 03:41:21 +00:00
Colin LeMahieu
f7ca7f6c70 [Hexagon] Converting from ADD_rr to A2_add which has encoding bits. 
Adding test to show correct instruction selection and encoding.

llvm-svn: 222249
 2014-11-18 20:28:11 +00:00
Rafael Espindola
10f65de3be Pass an ArrayRef to MCDisassembler::getInstruction. 
With this patch MCDisassembler::getInstruction takes an ArrayRef<uint8_t>
instead of a MemoryObject.

Even on X86 there is a maximum size an instruction can have. Given
that, it seems way simpler and more efficient to just pass an ArrayRef
to the disassembler instead of a MemoryObject and have it do a virtual
call every time it wants some extra bytes.

llvm-svn: 221751
 2014-11-12 02:04:27 +00:00
Rafael Espindola
8cb53479d4 Misc style fixes. NFC. 
This fixes a few cases of:

* Wrong variable name style.
* Lines longer than 80 columns.
* Repeated names in comments.
* clang-format of the above.

This make the next patch a lot easier to read.

llvm-svn: 221615
 2014-11-10 18:11:10 +00:00
Colin LeMahieu
f34b00f529 [Hexagon] Reverting 220584 to address ASAN errors. 
llvm-svn: 221210
 2014-11-04 00:14:36 +00:00
NAKAMURA Takumi
a1ef3346aa Prune CRLF. 
llvm-svn: 220678
 2014-10-27 12:37:26 +00:00
Colin LeMahieu
a5b4b06680 [Hexagon] Resubmission of 220427 
Modified library structure to deal with circular dependency between HexagonInstPrinter and HexagonMCInst.
Adding encoding bits for add opcode.
Adding llvm-mc tests.
Removing unit tests.

http://reviews.llvm.org/D5624

llvm-svn: 220584
 2014-10-24 19:00:32 +00:00
NAKAMURA Takumi
d8b493b106 Revert r220427, "[Hexagon] Adding encoding bits for add opcode." 
It brought cyclic dependecy between HexagonAsmPrinter and HexagonDesc.

llvm-svn: 220478
 2014-10-23 11:31:22 +00:00
Colin LeMahieu
88461f5b7a [Hexagon] Adding encoding bits for add opcode. 
Adding llvm-mc tests.
Removing unit tests.

http://reviews.llvm.org/D5624

llvm-svn: 220427
 2014-10-22 20:58:35 +00:00
Hans Wennborg
dbfab2bba5 Fix VS2012 build; C++11 type aliases are not supported. 
llvm-svn: 220399
 2014-10-22 17:47:49 +00:00
Colin LeMahieu
f359444940 Ammending 220393 - Removing unused decoding tables. 
llvm-svn: 220397
 2014-10-22 17:23:01 +00:00
Colin LeMahieu
05568816b4 Ammending 220393 - Removing unused functions. 
llvm-svn: 220396
 2014-10-22 17:03:19 +00:00
Colin LeMahieu
f6f8bdf091 [Hexagon] Adding basic disassembler. 
Marking all instructions as CodeGenOnly since encoding bits are not set yet.
http://reviews.llvm.org/D5829?vs=on&id=15023&whitespace=ignore-all#toc

llvm-svn: 220393
 2014-10-22 16:49:14 +00:00