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73 Commits

Author SHA1 Message Date
Bill Wendling
e35565699c Fix grammar. 
llvm-svn: 118341
 2010-11-06 10:51:53 +00:00
Bill Wendling
84ce225095 Fix grammar. 
llvm-svn: 118340
 2010-11-06 10:48:18 +00:00
Bill Wendling
f2e9379095 MatchRegisterName() returns 0 if it can't match the register. 
llvm-svn: 118339
 2010-11-06 10:45:34 +00:00
Bill Wendling
f65f39e7a1 Use TryParseRegister() instead of MatchRegisterName(). The former returns -1 
while the latter doesn't.

llvm-svn: 118338
 2010-11-06 10:40:24 +00:00
Jim Grosbach
009007e690 Hook up the '.code {16|32}' directive to the streamer. 
llvm-svn: 118310
 2010-11-05 22:40:53 +00:00
Jim Grosbach
3d432a39dd Hook up the '.thumb_func' directive to the streamer. 
llvm-svn: 118307
 2010-11-05 22:33:53 +00:00
Jim Grosbach
dfa87da932 Fix past-o. 
llvm-svn: 118304
 2010-11-05 22:11:33 +00:00
Bill Wendling
34599f4aa8 The MC code couldn't handle ARM LDR instructions with negative offsets: 
vldr.64 d1, [r0, #-32]

The problem was with how the addressing mode 5 encodes the offsets. This change
makes sure that the way offsets are handled in addressing mode 5 is consistent
throughout the MC code. It involves re-refactoring the "getAddrModeImmOpValue"
method into an "Imm12" and "addressing mode 5" version. But not to worry! The
majority of the duplicated code has been unified.

llvm-svn: 118144
 2010-11-03 01:49:29 +00:00
Jim Grosbach
acc28d1b2a Add FIXME. 
llvm-svn: 117936
 2010-11-01 18:11:14 +00:00
Jim Grosbach
76910aa62f Mark ARM subtarget features that are available for the assembler. 
llvm-svn: 117929
 2010-11-01 16:59:54 +00:00
Jim Grosbach
2605b2b54f trailing whitespace 
llvm-svn: 117927
 2010-11-01 16:44:21 +00:00
Jim Grosbach
775afa274f Tidy up. 
llvm-svn: 117782
 2010-10-30 12:59:16 +00:00
Chris Lattner
deabc3d7fa simplify this code. 
llvm-svn: 117771
 2010-10-30 04:35:59 +00:00
Chris Lattner
3a36dd4a0b split MaybeParseRegister into its two logical uses, eliminating malloc+free traffic. 
llvm-svn: 117769
 2010-10-30 04:09:10 +00:00
Bill Wendling
b68e0d0ee3 Some instructions end with an "ls" prefix, but it doesn't indicate that they are 
conditional. Check for those instructions explicitly.

llvm-svn: 117747
 2010-10-29 23:50:21 +00:00
Jim Grosbach
e811e91d02 add FIXME 
llvm-svn: 117718
 2010-10-29 21:56:51 +00:00
Jim Grosbach
edec5cc6b8 Handle ARM addrmode5 instructions with an offset. 
llvm-svn: 117672
 2010-10-29 17:41:25 +00:00
Jim Grosbach
6f257bd31b Revert 117660. Apparently it's not as trivial as that... 
llvm-svn: 117663
 2010-10-29 16:50:53 +00:00
Jim Grosbach
8c9a2ee86e ARM addrmode5 instructions have neither writeback nor post-indexed modes. 
llvm-svn: 117660
 2010-10-29 16:38:59 +00:00
Jim Grosbach
29961ebfc5 Trailing whitespace. 
llvm-svn: 117651
 2010-10-29 14:46:02 +00:00
Benjamin Kramer
f2442da5f6 ARMAsmParser: Plug a memory leak. 
llvm-svn: 117648
 2010-10-29 09:43:39 +00:00
Eric Christopher
930a767468 Add an unreachable to silence warning - the switch is actually 
fully enumerated.

llvm-svn: 117647
 2010-10-29 09:26:59 +00:00
Chris Lattner
115cd02d22 add simple support for addrmode5 operands, allowing 
vldr.64 to work.  I have no idea if this is fully right, but 
it is in the right direction.

llvm-svn: 117626
 2010-10-29 00:27:31 +00:00
Chris Lattner
ef237e6013 give better error diagnostics, for example: 
t.s:1:14: error: invalid operand for instruction
vldr.64	d17, [r0]   
       	     ^

instead of:

t.s:1:1: error: unrecognized instruction
vldr.64	d17, [r0]   
^

llvm-svn: 117611
 2010-10-28 21:41:58 +00:00
Chris Lattner
4210ffb9c5 move a method out of line. 
llvm-svn: 117605
 2010-10-28 21:28:01 +00:00
Chris Lattner
b6c7a9e204 remove the rest of hte owningptr's, no functionality change. 
llvm-svn: 117603
 2010-10-28 20:52:15 +00:00
Chris Lattner
0a21ad2553 rearrange ParseRegisterList. 
llvm-svn: 117560
 2010-10-28 17:23:41 +00:00
Chris Lattner
a9c0f00f10 refactor some code to simplify it, eliminating some owningptr's. 
llvm-svn: 117559
 2010-10-28 17:20:03 +00:00
Chandler Carruth
55850cad48 Remove remaining uses of ATTRIBUTE_UNUSED on variables, and delete three 
#includes in the process.

llvm-svn: 116919
 2010-10-20 08:27:02 +00:00
Chris Lattner
cbecb9a4d3 implement rdar://8456378 and PR7557 - support for the fstsw, 
an instruction that requires a WHOLE NEW wonderful kind of alias.

llvm-svn: 115015
 2010-09-29 01:50:45 +00:00
Chris Lattner
9b9a847b8c change the protocol TargetAsmPArser::MatchInstruction method to take an 
MCStreamer to emit into instead of an MCInst to fill in.  This allows the
matcher extra flexibility and is more convenient.

llvm-svn: 115014
 2010-09-29 01:42:58 +00:00
Chris Lattner
ffe1efe7ef fix the asmparser so that the target is responsible for skipping to 
the end of the line on a parser error, allowing skipping to happen
for syntactic errors but not for semantic errors.  Before we would
miss emitting a diagnostic about the second line, because we skipped
it due to the semantic error on the first line:

  foo %eax
  bar %al

This fixes rdar://8414033 - llvm-mc ignores lines after an invalid instruction mnemonic errors

llvm-svn: 113688
 2010-09-11 16:18:25 +00:00
Chris Lattner
0e0f9094e9 change the MC "ParseInstruction" interface to make it the 
implementation's job to check for and lex the EndOfStatement
marker.

llvm-svn: 113347
 2010-09-08 05:10:46 +00:00
Chris Lattner
6bfa0d9988 in the case where an instruction only has one implementation 
of a mneumonic, report operand errors with better location
info.  For example, we now report:

t.s:6:14: error: invalid operand for instruction
        cwtl $1
             ^

but we fail for common cases like:

t.s:11:4: error: invalid operand for instruction
   addl $1, $1
   ^

because we don't know if this is supposed to be the reg/imm or imm/reg
form.

llvm-svn: 113178
 2010-09-06 22:11:18 +00:00
Chris Lattner
22bb9cb511 change MatchInstructionImpl to return an enum instead of bool. 
llvm-svn: 113165
 2010-09-06 19:22:17 +00:00
Chris Lattner
45a204be76 have AsmMatcherEmitter.cpp produce the hunk of code that gets included 
into the middle of the class, and rework how the different sections of
the generated file are conditionally included for simplicity.

llvm-svn: 113163
 2010-09-06 19:11:01 +00:00
Chris Lattner
b911e51b26 zap dead code. 
llvm-svn: 112712
 2010-09-01 16:04:34 +00:00
Daniel Dunbar
f2b4982344 MC/AsmParser: Push the burdon of emitting diagnostics about unmatched 
instructions onto the target specific parser, which can do a better job.

llvm-svn: 110889
 2010-08-12 00:55:38 +00:00
Daniel Dunbar
0a98bc5619 tblgen/AsmMatcher: Always emit the match function as 'MatchInstructionImpl', 
target specific parsers can adapt the TargetAsmParser to this.

llvm-svn: 110888
 2010-08-12 00:55:32 +00:00
Daniel Dunbar
bc7c0a60da MC/ARM: Add basic support for handling predication by parsing it out of the mnemonic into a separate operand form. 
llvm-svn: 110794
 2010-08-11 06:37:20 +00:00
Daniel Dunbar
63628f1443 MC/ARM: Split mnemonic on '.' characters. 
llvm-svn: 110793
 2010-08-11 06:37:16 +00:00
Daniel Dunbar
bbaa88a848 MC/ARM: Fill in ARMOperand::dump a bit. 
llvm-svn: 110792
 2010-08-11 06:37:12 +00:00
Daniel Dunbar
ee80a239ed MCAsmParser: Add dump() hook to MCParsedAsmOperand. 
llvm-svn: 110790
 2010-08-11 06:37:04 +00:00
Daniel Dunbar
74ed9321a3 MC/ARM: Add an ARMOperand class for condition codes. 
llvm-svn: 110788
 2010-08-11 06:36:53 +00:00
Daniel Dunbar
89a64ee590 MC/ARM: Switch to using the generated match functions instead of stub implementations. 
llvm-svn: 110783
 2010-08-11 05:24:50 +00:00
Daniel Dunbar
150021561c Target: Give the TargetAsmParser access to the TargetMachine. 
- Unfortunate, but necessary for now to handle subtarget instruction matching. Eventually we should factor out the lower level target machine information so we don't need to do this.

llvm-svn: 108664
 2010-07-19 00:33:49 +00:00
Benjamin Kramer
da3e6cdb26 Don't pass StringRef by reference. 
llvm-svn: 108366
 2010-07-14 22:38:02 +00:00
Duncan Sands
f7b98e2b1e Convert some tab stops into spaces. 
llvm-svn: 108130
 2010-07-12 08:16:59 +00:00
Duncan Sands
9eff796264 Remove unused variable Loc and pointless variables unified_syntax 
and thumb_mode.

llvm-svn: 107133
 2010-06-29 13:04:35 +00:00
Sean Callanan
8ac8cf3f10 Added an AsmLexer for the ARM target, which uses 
a simple mapping of register names to IDs to
identify register tokens.

llvm-svn: 100685
 2010-04-07 20:29:34 +00:00