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e5d0064a9d
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130 Commits

Author SHA1 Message Date
Chris Lattner
e5d0064a9d Rename SwitchSection -> switchSection to avoid conflicting with a future 
change.

llvm-svn: 24443
 2005-11-21 06:55:27 +00:00
Chris Lattner
07ea769304 Start using PrivateGlobalPrefix correctly 
llvm-svn: 24442
 2005-11-21 06:51:52 +00:00
Duraid Madina
a60348b6b2 add FP select. next up - divide! 
llvm-svn: 24346
 2005-11-14 01:17:30 +00:00
Chris Lattner
3fdc97d460 Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build. 
llvm-svn: 24233
 2005-11-08 02:11:51 +00:00
Duraid Madina
fb806bb309 add support for storing and returning bools 
llvm-svn: 24228
 2005-11-07 03:11:02 +00:00
Duraid Madina
f0469f0376 just some random hacking - calls (particularly indirect) need a lot of 
love (especially with -sched=simple)

llvm-svn: 24225
 2005-11-06 13:43:30 +00:00
Duraid Madina
cf11aefc91 ask for 16-byte aligned jmpbufs. This should unbreak C++ on IA64 (and 
a bunch of other things) but is currently ignored by the code
generator.

llvm-svn: 24206
 2005-11-06 04:29:30 +00:00
Duraid Madina
c2c2e353ee oops, forgot to load GP for indirect calls, though the old code now commented 
out failed (e.g. methcall) - now the code compiles, though it's not quite
right just yet (tm) ;)

would fix this but it's 3am! :O

llvm-svn: 24186
 2005-11-04 17:55:53 +00:00
Duraid Madina
e8456a9175 kill redundant SP/GP/RP save/restores across calls 
llvm-svn: 24183
 2005-11-04 10:01:10 +00:00
Duraid Madina
1c632094d4 add support for loading bools 
llvm-svn: 24182
 2005-11-04 09:59:06 +00:00
Duraid Madina
f5824e4fa3 fun with predicates! (add TRUNC i64->i1, AND i1 i1, fix XOR i1 i1) 
llvm-svn: 24175
 2005-11-04 00:57:56 +00:00
Duraid Madina
4adb8143ce add pattern to load constant 0 into a predicate reg 
llvm-svn: 24164
 2005-11-03 10:09:32 +00:00
Chris Lattner
cfb7edb4ed Fix a bug that prevented this pattern from matching 
llvm-svn: 24161
 2005-11-03 05:45:34 +00:00
Duraid Madina
7975eea64d "fix" support for FP constants (this code asserts in the scheduler, 
though)

llvm-svn: 24152
 2005-11-02 07:32:59 +00:00
Duraid Madina
e89d6f5197 add F0 and F1 to the FP register class 
llvm-svn: 24151
 2005-11-02 07:30:39 +00:00
Chris Lattner
04749a46a0 This works now 
llvm-svn: 24150
 2005-11-02 06:49:37 +00:00
Duraid Madina
94dd783c92 add support for SELECT to TargetSelectionDAG.td, add support for 
selecting ints to IA64, and a few other ia64 bits and pieces

llvm-svn: 24147
 2005-11-02 02:37:18 +00:00
Duraid Madina
b743794294 add support for loading FP constants +0.0 and +1.0 to the dag isel, 
stop pretending -0.0 and -1.0 are machine constants

llvm-svn: 24146
 2005-11-02 02:35:04 +00:00
Duraid Madina
28dbc1f9d0 heh, scheduling was easy? 
need to send chris, jim and sampo a box of fish each

llvm-svn: 24135
 2005-11-01 05:49:08 +00:00
Duraid Madina
6314b5fc35 FORTRAN!!! :( and other similarly unfortunate things mean that on ia64 
one sometimes needs to pass FP args in both FP *and* integer registers.

llvm-svn: 24134
 2005-11-01 05:46:16 +00:00
Duraid Madina
7f2a0b1290 so tablegen was thinking I might want to convert FPs to predicates. 
clever little tablegen!

llvm-svn: 24133
 2005-11-01 03:32:15 +00:00
Duraid Madina
c754478fbe add support for int->FP and FP->int ops, and add ia64 patterns for these 
llvm-svn: 24132
 2005-11-01 03:07:25 +00:00
Duraid Madina
ba4b2d2a1b add zeroextend predicate->integer 
llvm-svn: 24131
 2005-11-01 01:29:55 +00:00
Duraid Madina
76abe0f46c add FP compares and implicit register defs to the dag isel 
llvm-svn: 24118
 2005-10-31 01:42:11 +00:00
Duraid Madina
5168a7dea5 fix some broken comparisons, this affected the Pattern isel too. 
llvm-svn: 24109
 2005-10-30 10:14:19 +00:00
Duraid Madina
9c1cbbe5d1 add some FP stuff, some mix.* stuff, and constant pool support to the 
DAG instruction selector, which should be destroyed one day (in the pattern
isel also) since ia64 can pack any constant in the instruction stream

llvm-svn: 24094
 2005-10-29 16:08:30 +00:00
Duraid Madina
6280da9a88 add shladd 
llvm-svn: 24080
 2005-10-29 04:13:40 +00:00
Chris Lattner
0a69a4a837 These are autogenerated 
llvm-svn: 24063
 2005-10-28 18:26:52 +00:00
Duraid Madina
251185e626 DAG->DAG instruction selection for ia64! "hello world" works, not much else. 
use -enable-ia64-dag-isel to turn this on

TODO: delete lowering stuff from the pattern isel
    : get operations on predicate bits working
    : get other bits of pseudocode going
    : use sampo's mulh/mull-using divide-by-constant magic
    : *so* many patterns ("extr", "tbit" and "dep" will be fun :)
    : add FP
    : add a JIT!
    : get it working 100%

in short: this'll be happier in a couple of weeks, but it's here now so
the tester can make me feel guilty sooner.

OTHER: there are a couple of fixes to the pattern isel, in particular
making the linker happy with big blobs of fun like pypy.

llvm-svn: 24058
 2005-10-28 17:46:35 +00:00
Chris Lattner
110c713ccc remove dead stuff 
llvm-svn: 24054
 2005-10-28 04:58:24 +00:00
Chris Lattner
77b4595a7b Eliminate getClass, it is not needed 
llvm-svn: 24053
 2005-10-28 04:57:11 +00:00
Nate Begeman
5a915709c3 Don't generate operations that aren't yet supported 
llvm-svn: 23858
 2005-10-21 01:52:45 +00:00
Chris Lattner
9be9eb2f7f Fix CodeGen/Generic/bool-to-double.ll 
llvm-svn: 23652
 2005-10-07 04:50:48 +00:00
Chris Lattner
49117a5dcc these registers don't belong to any register classes, so don't mark them 
as callee save.  They can never be generated by the compiler.

llvm-svn: 23551
 2005-09-30 06:42:24 +00:00
Chris Lattner
3c59b33016 these methods get extra args 
llvm-svn: 23538
 2005-09-30 01:30:55 +00:00
Chris Lattner
d3b3d07c41 Add FP versions of the binary operators, keeping the int and fp worlds seperate. 
Though I have done extensive testing, it is possible that this will break
things in configs I can't test.  Please let me know if this causes a problem
and I'll fix it ASAP.

llvm-svn: 23505
 2005-09-28 22:29:17 +00:00
Chris Lattner
cd5eeef9ee Give all operands names 
llvm-svn: 23357
 2005-09-14 21:11:13 +00:00
Chris Lattner
1f7f2544fc ignore generated files 
llvm-svn: 23263
 2005-09-07 23:47:44 +00:00
Chris Lattner
eb4736b128 Handle ANY_EXTEND like ZERO_EXTEND. Simplify the extend/truncate code on 
the observation that it only has to handle i1 -> i64 and i64 -> i1.

llvm-svn: 23201
 2005-09-02 00:15:30 +00:00
Jim Laskey
f32ef9a37f 1. Use SubtargetFeatures in llc/lli. 
2. Propagate feature "string" to all targets.

3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.

llvm-svn: 23192
 2005-09-01 21:38:21 +00:00
Chris Lattner
439ef36320 Fix a bug in my previous checkin 
llvm-svn: 23082
 2005-08-26 17:18:44 +00:00
Chris Lattner
a31708e6b3 Change ConstantPoolSDNode to actually hold the Constant itself instead of 
putting it into the constant pool.  This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.

llvm-svn: 23081
 2005-08-26 17:15:30 +00:00
Chris Lattner
4349a69f74 fix a warning in optimized build 
llvm-svn: 23030
 2005-08-25 00:03:21 +00:00
Chris Lattner
ef8f06856f Fix a crash I introduced into the IA64 backend with my copyfromreg change. 
It used to crash on any function that took float arguments.

llvm-svn: 22973
 2005-08-22 21:33:11 +00:00
Chris Lattner
36b8efcedd Add a pass name for -time-passes output 
llvm-svn: 22970
 2005-08-22 18:28:09 +00:00
Duraid Madina
06affa0edd reenable collapse of loadimm+AND -> dep.z (thanks guys) 
llvm-svn: 22944
 2005-08-21 15:43:53 +00:00
Jim Laskey
43192e173f Repair an out by one error for IA64. 
llvm-svn: 22942
 2005-08-20 11:05:23 +00:00
Chris Lattner
2ac3fd08d2 Split RegisterClass 'Methods' into MethodProtos and MethodBodies 
llvm-svn: 22929
 2005-08-19 19:13:20 +00:00
Chris Lattner
9d61d4a3e4 Put register classes in namespaces 
llvm-svn: 22924
 2005-08-19 18:50:46 +00:00
Chris Lattner
f0b42a6f29 This code has always been dead on itanium 
llvm-svn: 22916
 2005-08-19 18:34:37 +00:00