Chris Lattner
f022962081
Remove what little AIX support we have. It has never been tested and isn't
...
complete.
llvm-svn: 29156
2006-07-15 01:24:23 +00:00
Chris Lattner
ff8ee5486f
Add missing PPC64 extload/truncstores
...
llvm-svn: 29140
2006-07-14 04:42:02 +00:00
Chris Lattner
9aafd2b441
Add a note
...
llvm-svn: 29139
2006-07-14 04:07:29 +00:00
Chris Lattner
5c489bce2c
Another fix in the rotate encodings, needed when the first two operands are not
...
the same.
llvm-svn: 29136
2006-07-13 21:52:41 +00:00
Chris Lattner
753e4f5984
Print negative immediates as negative values instead of large constants
...
when using the immshifted addressing mode.
llvm-svn: 29130
2006-07-12 23:24:02 +00:00
Chris Lattner
726ca018c0
Fix encoding of rotates, such as rldicl
...
llvm-svn: 29128
2006-07-12 22:08:13 +00:00
Chris Lattner
024af03a3c
Implement PPC64 relocations types
...
llvm-svn: 29125
2006-07-12 21:23:20 +00:00
Chris Lattner
c9be3277e7
An overaggressive #ifdef allows a function to fall off the bottom of the
...
function instead of returning a value. This sometimes allowed the ppc32 jit
to be used in 64-bit mode.
llvm-svn: 29123
2006-07-12 20:42:10 +00:00
Chris Lattner
fd9cbcab4a
The PPC64 JIT needs register numbers to encode instructions.
...
llvm-svn: 29114
2006-07-11 20:53:55 +00:00
Jim Laskey
4c0d841280
Ensure that dump calls that are associated with asserts are removed from
...
non-debug build.
llvm-svn: 29105
2006-07-11 17:58:07 +00:00
Chris Lattner
2db97248f8
In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones.
...
llvm-svn: 29096
2006-07-11 00:48:23 +00:00
Chris Lattner
abaaddc214
Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswaps
...
into i16/i32 load/stores.
llvm-svn: 29089
2006-07-10 20:56:58 +00:00
Chris Lattner
da960e218f
Undisable ppc64 jit
...
llvm-svn: 29011
2006-07-06 17:10:42 +00:00
Chris Lattner
496bd3fbf6
Use hidden visibility to make symbols in an anonymous namespace get
...
dropped. This shrinks libllvmgcc.dylib another 67K
llvm-svn: 28975
2006-06-28 23:17:24 +00:00
Chris Lattner
26f1985fdc
shrink libllvmgcc.dylib another 25K
...
llvm-svn: 28971
2006-06-28 22:00:36 +00:00
Chris Lattner
852423b469
Don't match 64-bit bitfield inserts into rlwimi's. todo add rldimi. :)
...
llvm-svn: 28944
2006-06-27 21:08:52 +00:00
Chris Lattner
d7b1f61e72
Fix ppc64 jump tables
...
llvm-svn: 28941
2006-06-27 20:46:17 +00:00
Chris Lattner
01965c2fd8
Print stubs for external globals right.
...
llvm-svn: 28936
2006-06-27 20:20:53 +00:00
Chris Lattner
2c3f67f6a7
Implement 64-bit select, bswap, etc.
...
llvm-svn: 28935
2006-06-27 20:14:52 +00:00
Chris Lattner
86c7ca4fd4
Add a pattern for i64 sra. Print 8-byte units with a space between the .quad
...
and the data
llvm-svn: 28934
2006-06-27 20:07:26 +00:00
Chris Lattner
3422f47382
Fix rewriting frame offsets with ixaddr instructions, which implicitly shift
...
the offset two bits to the left.
llvm-svn: 28933
2006-06-27 18:55:49 +00:00
Chris Lattner
8569f4042d
PPC doesn't have bit converts to/from i64
...
llvm-svn: 28932
2006-06-27 18:40:08 +00:00
Chris Lattner
da08df5d8a
Add 64-bit MTCTR so that indirect calls work.
...
llvm-svn: 28931
2006-06-27 18:36:44 +00:00
Chris Lattner
20959f59cd
Fix an incorrect store pattern. This fixes em3d.
...
llvm-svn: 28930
2006-06-27 18:22:50 +00:00
Chris Lattner
26f2bd4d4b
Implement 64-bit undef, sub, shl/shr, srem/urem
...
llvm-svn: 28929
2006-06-27 18:18:41 +00:00
Chris Lattner
b4a636f966
Use i32 for shift amounts instead of i64. This gets bisort working.
...
llvm-svn: 28927
2006-06-27 17:34:57 +00:00
Chris Lattner
01182783c4
Add zextload from i32 -> i64, with this, perimeter works.
...
llvm-svn: 28926
2006-06-27 17:30:08 +00:00
Chris Lattner
10e71f60df
Print darwin stub stuff correctly in 64-bit mode. With this, treeadd works in
...
ppc64 mode!
llvm-svn: 28923
2006-06-27 01:02:25 +00:00
Chris Lattner
a572f110b4
Fix variable shadowing issue
...
llvm-svn: 28922
2006-06-27 00:10:13 +00:00
Chris Lattner
494f476ca7
Implement a bunch of 64-bit cleanliness work. With this, treeadd builds (but
...
doesn't work right).
llvm-svn: 28921
2006-06-27 00:04:13 +00:00
Chris Lattner
c8a47e0bb0
Rearrange compares, add ADDI8, add sext from 32-to-64 bit register
...
llvm-svn: 28920
2006-06-26 23:53:10 +00:00
Chris Lattner
cbd4d14b24
Improve PPC64 calling convention support
...
llvm-svn: 28919
2006-06-26 22:48:35 +00:00
Chris Lattner
5d0654b832
Remove two more definitions
...
llvm-svn: 28918
2006-06-26 22:47:37 +00:00
Chris Lattner
209c2db6b9
remove two unused instructions.
...
llvm-svn: 28917
2006-06-26 22:44:13 +00:00
Jim Laskey
a8284f65e1
Add and sort "sections" in debug lines. This always stepping through
...
code in sections other than ".text", including weak sections like ctors and
dtors.
llvm-svn: 28909
2006-06-23 12:51:53 +00:00
Chris Lattner
5fa6e47534
Correct returns of 64-bit values, though they seemed to work before...
...
llvm-svn: 28892
2006-06-21 00:34:03 +00:00
Chris Lattner
10d22c274e
Make these predicates correct in 64-bit mode too.
...
llvm-svn: 28890
2006-06-20 23:21:20 +00:00
Chris Lattner
75e6449a0f
Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file
...
llvm-svn: 28889
2006-06-20 23:18:58 +00:00
Chris Lattner
2e1d3158f1
remove unused flag
...
llvm-svn: 28888
2006-06-20 23:15:07 +00:00
Chris Lattner
c74ef80a95
add some logical ops
...
llvm-svn: 28887
2006-06-20 23:11:59 +00:00
Chris Lattner
19df1fcd72
remove some unused patterns
...
llvm-svn: 28886
2006-06-20 23:11:36 +00:00
Chris Lattner
40a0a6c400
Add some more immediate patterns. This allows us to compile:
...
void test6() {
Y = 0xABCD0123BCDE4567;
}
into:
_test6:
lis r2, -21555
lis r3, ha16(_Y)
ori r2, r2, 291
rldicr r2, r2, 32, 31
oris r2, r2, 48350
ori r2, r2, 17767
std r2, lo16(_Y)(r3)
blr
llvm-svn: 28885
2006-06-20 23:03:01 +00:00
Chris Lattner
690b03fb44
Instead of li/xoris use li/oris. Note that this doesn't work if bit 15 is
...
set, so disable the pattern in that case.
llvm-svn: 28884
2006-06-20 22:38:59 +00:00
Chris Lattner
eede1e2c00
Add some 64-bit logical ops.
...
Split imm16Shifted into a sext/zext form for 64-bit support.
Add some patterns for immediate formation. For example, we now compile this:
static unsigned long long Y;
void test3() {
Y = 0xF0F00F00;
}
into:
_test3:
li r2, 3840
lis r3, ha16(_Y)
xoris r2, r2, 61680
std r2, lo16(_Y)(r3)
blr
GCC produces:
_test3:
li r0,0
lis r2,ha16(_Y)
ori r0,r0,61680
sldi r0,r0,16
ori r0,r0,3840
std r0,lo16(_Y)(r2)
blr
llvm-svn: 28883
2006-06-20 22:34:10 +00:00
Chris Lattner
4ff5f3d852
64-bit bugfix: 0xFFFF0000 cannot be formed with a single lis.
...
llvm-svn: 28880
2006-06-20 21:39:30 +00:00
Chris Lattner
c97820b17c
Add some patterns for globals, so we can now compile this:
...
static unsigned long long X, Y;
void test1() {
X = Y;
}
into:
_test1:
lis r2, ha16(_Y)
lis r3, ha16(_X)
ld r2, lo16(_Y)(r2)
std r2, lo16(_X)(r3)
blr
llvm-svn: 28879
2006-06-20 21:23:06 +00:00
Chris Lattner
3ae4156dd7
Remove some now-unneeded casts from instruction patterns. With the casts
...
removed, tblgen produces identical output to with them in.
llvm-svn: 28867
2006-06-20 00:39:56 +00:00
Chris Lattner
19339e7a96
Add some patterns for ppc64
...
llvm-svn: 28866
2006-06-20 00:38:36 +00:00
Chris Lattner
d817b32a8e
Implement the getPointerRegClass method, which is required for the ptr_rc
...
magic to work.
llvm-svn: 28847
2006-06-17 00:01:04 +00:00
Chris Lattner
89a0d10812
Upgrade some load/store instructions to use the proper addressing mode stuff.
...
llvm-svn: 28841
2006-06-16 21:29:41 +00:00