28231 Commits

Author SHA1 Message Date
Filipe Cabecinhas
46568690d0 Check bit widths before trying to get a type.
Added a test case for it.
Also added run lines for the test case in r227566.

Bugs found with afl-fuzz

llvm-svn: 227589
2015-01-30 18:13:50 +00:00
Colin LeMahieu
9b74e87575 [Hexagon] Adding a number of vector load variants and organizing tests.
llvm-svn: 227588
2015-01-30 18:09:44 +00:00
Saleem Abdulrasool
adcde70583 ARM: correct handling of .fpu directive
The FPU directive permits the user to switch the target FPU, enabling
instructions that would be otherwise unavailable.  However, when configuring the
new subtarget features, we would not enable the implied functions for newer
FPUs.  This would result in invalid rejection of valid input.  Ensure that we
inherit the implied FPU functionality when enabling newer versions of the FPU.
Fortunately, these are mostly hierarchical, unlike the CPUs.

Addresses PR22395.

llvm-svn: 227584
2015-01-30 17:58:25 +00:00
Toma Tabacu
7777da929b [mips] Manually replace JAL pseudo-instructions with their JALR equivalent, instead of using InstAlias.
Summary:
This is needed by the .cprestore assembler directive.

This directive needs to be able to insert an LW instruction after every JALR replacement of a JAL pseudo-instruction
(and never after a JALR which has NOT been a result of a pseudo-instruction replacement).

The problem with using InstAlias for these is that after it replaces the pseudo-instruction, we can't find out if the resulting JALR instruction
was generated by an InstAlias or not, so we don't know whether or not to insert our LW instruction.

By replacing it manually, we know when the pseudo-instruction replacement happens and we can insert the LW instruction correctly.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D5601

llvm-svn: 227568
2015-01-30 11:18:50 +00:00
Filipe Cabecinhas
011d7f7e9b [bitcode reader] Fix an assert on invalid type tables
Bug found with afl-fuzz

llvm-svn: 227566
2015-01-30 10:57:58 +00:00
NAKAMURA Takumi
736644cefb Introduce llvm/test/LTO/X86. LTO tests may be assumed as target-specific.
llvm-svn: 227564
2015-01-30 10:09:26 +00:00
NAKAMURA Takumi
4186708d4d Introduce llvm/test/LTO/ARM for arm-specific LTO test(s).
llvm-svn: 227563
2015-01-30 09:53:37 +00:00
Hao Liu
7f59f4df87 Move the target specific test case arbitrary-induction-step.ll to test/Transforms/LoopVectorize/AArch64 folder.
llvm-svn: 227561
2015-01-30 07:33:31 +00:00
Hao Liu
dd2f874770 [LoopVectorize] Induction variables: support arbitrary constant step.
Previously, only -1 and +1 step values are supported for induction variables. This patch extends LV to support
arbitrary constant steps.
Initial patch by Alexey Volkov. Some bug fixes are added in the following version.

Differential Revision: http://reviews.llvm.org/D6051 and http://reviews.llvm.org/D7193

llvm-svn: 227557
2015-01-30 05:02:21 +00:00
Hao Liu
89352e7534 [AArch64]Fix PR21675, a bug about lowering llvm.ctpop.i32. We should noot use "DAG.getUNDEF(MVT::v8i8)" to get all zero vector.
Patch by Wei-cheng Wang.

llvm-svn: 227550
2015-01-30 02:13:53 +00:00
Adrian Prantl
4ac268c18b Fix PR22386. The inliner moves static allocas to the entry basic block
so we need to move the dbg.declare intrinsics that describe them, too.

llvm-svn: 227544
2015-01-30 01:55:25 +00:00
Akira Hatanaka
426900172c [LTO] Scan all per-function subtargets when collecting runtime library names.
accumulateAndSortLibcalls in LTOCodeGenerator.cpp collects names of runtime
library functions which are used to identify user-defined functions that should
be protected. Previously, this function would only scan the TargetLowering
object belonging to the "main" subtarget for the library function names. This
commit changes it to scan all per-function subtargets.

Differential Revision: http://reviews.llvm.org/D7275

llvm-svn: 227533
2015-01-30 01:16:24 +00:00
Reid Kleckner
9f52049132 x86: Fix large model calls to __chkstk for dynamic allocas
In the large code model, we now put __chkstk in %r11 before calling it.

Refactor the code so that we only do this once. Simplify things by using
__chkstk_ms instead of __chkstk on cygming. We already use that symbol
in the prolog emission, and it simplifies our logic.

Second half of PR18582.

llvm-svn: 227519
2015-01-29 23:58:04 +00:00
Reid Kleckner
d9129cb1d5 Update comments to use unreachable instead of llvm.trap, as implemented now
win64: Call __chkstk through a register with the large code model

Fixes half of PR18582. True dynamic allocas will still have a
CALL64pcrel32 which will fail.

Reviewers: majnemer

Differential Revision: http://reviews.llvm.org/D7267

llvm-svn: 227503
2015-01-29 22:33:00 +00:00
Colin LeMahieu
54b41eed7b [Hexagon] Organizing tests and adding a few missing jump instruction encodings.
llvm-svn: 227498
2015-01-29 21:47:15 +00:00
Colin LeMahieu
13519e2bd4 [Hexagon] Adding missing instruction encodings and tests.
llvm-svn: 227495
2015-01-29 21:30:22 +00:00
Colin LeMahieu
d1253ac69a [Hexagon] Adding alu vector instructions
llvm-svn: 227493
2015-01-29 21:09:30 +00:00
Sanjay Patel
1040ef834a [GVN] don't propagate equality comparisons of FP zero (PR22376)
In http://reviews.llvm.org/D6911, we allowed GVN to propagate FP equalities
to allow some simple value range optimizations. But that introduced a bug
when comparing to -0.0 or 0.0: these compare equal even though they are not
bitwise identical.

This patch disallows propagating zero constants in equality comparisons. 
Fixes: http://llvm.org/bugs/show_bug.cgi?id=22376

Differential Revision: http://reviews.llvm.org/D7257

llvm-svn: 227491
2015-01-29 20:51:49 +00:00
David Blaikie
9f28e1deb4 Add missing test from r227488
llvm-svn: 227489
2015-01-29 20:25:46 +00:00
David Blaikie
2724e63b8d Refactor test to be reused across architectures
llvm-svn: 227487
2015-01-29 20:21:24 +00:00
David Blaikie
3fa3d9be17 Remove erroneous REQUIRES: object-emission for asm test.
llvm-svn: 227486
2015-01-29 20:17:15 +00:00
David Blaikie
6d7dae9457 Missing test case for r227481
llvm-svn: 227485
2015-01-29 19:40:02 +00:00
Matt Arsenault
97c228de40 R600/SI: Implement enableAggressiveFMAFusion
Add tests for the various combines. This should
always be at least cycle neutral on all subtargets for f64,
and faster on some. For f32 we should prefer selecting
v_mad_f32 over v_fma_f32.

llvm-svn: 227484
2015-01-29 19:34:32 +00:00
Colin LeMahieu
60586de39c [Hexagon] Deleting old variants of intrinsics and adding missing tests.
llvm-svn: 227474
2015-01-29 17:26:56 +00:00
Colin LeMahieu
f319d92955 [Hexagon] Adding CR intrinsic tests.
llvm-svn: 227463
2015-01-29 16:55:37 +00:00
Tom Stellard
33ad0a78c5 R600/SI: Define a schedule model and enable the generic machine scheduler
The schedule model is not complete yet, and could be improved.

llvm-svn: 227461
2015-01-29 16:55:25 +00:00
Robert Lougher
f135e638ae [X86] Use single add/sub for large stack offsets
For large stack offsets the compiler generates multiple immediate mode
sub/add instructions in the prologue/epilogue.  This patch makes the
compiler place the final amount to be added/subtracted into a register,
which is then added/substracted with a single operation.

Differential Revision: http://reviews.llvm.org/D7226

llvm-svn: 227458
2015-01-29 16:18:29 +00:00
Colin LeMahieu
332a5243a2 [Hexagon] Adding XTYPE/PRED intrinsic tests. Converting predicate types to i32 instead of i1.
llvm-svn: 227457
2015-01-29 16:08:43 +00:00
Bill Schmidt
f10debced6 [PowerPC] Complete setting the baseline for ppc64le
Patch by Nemanja Ivanovic.

As was uncovered by the failing test case (when run on non-PPC
platforms), the feature set when compiling with -march=ppc64le was not
being picked up. This change ensures that if the -mcpu option is not
specified, the correct feature set is picked up regardless of whether
we are on PPC or not.

llvm-svn: 227455
2015-01-29 15:59:09 +00:00
Alex Rosenberg
8a41666e76 Make the test actually test what it's supposed to test. Add a test for the from memory variant of vcvtph2ps for 256-bit.
llvm-svn: 227446
2015-01-29 15:19:54 +00:00
Alex Rosenberg
5e1a11c597 Cleanup a few tests on sse4a machines and FileCheckize along the way.
llvm-svn: 227437
2015-01-29 13:31:32 +00:00
Rafael Espindola
8c74e872e9 Don't create multiple mergeable sections with -fdata-sections.
ELF has support for sections that can be split into fixed size or
null terminated entities.

Since these sections can be split by the linker, it is not necessary
to split them in codegen.

This reduces the combined .o size in a llvm+clang build from
202,394,570 to 173,819,098 bytes.

The time for linking clang with gold (on a VM, on a laptop) goes
from 2.250089985 to 1.383001792 seconds.

The flip side is the size of rodata in clang goes from 10,926,785
to 10,929,345 bytes.

The increase seems to be because of http://sourceware.org/bugzilla/show_bug.cgi?id=17902.

llvm-svn: 227431
2015-01-29 12:43:28 +00:00
Vladimir Medic
96ce968d89 [Mips][Disassembler] When disassembler meets cache/pref instructions for r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method for R6 CACHE_HINT_DESC class that properly handles decoding of these instructions.
llvm-svn: 227430
2015-01-29 11:33:41 +00:00
Charlie Turner
3dc8422d9a Add a missing Tag_DIV_use test for Cortex-M7.
llvm-svn: 227429
2015-01-29 11:19:54 +00:00
Simon Atanasyan
245e4f120f [ELFYAML] Provide default value 0 for YAML relocation addendum field
Follow up to r227318.

llvm-svn: 227422
2015-01-29 06:56:24 +00:00
Reid Kleckner
a789af4162 Add a Windows EH preparation pass that zaps resumes
If the personality is not a recognized MSVC personality function, this
pass delegates to the dwarf EH preparation pass. This chaining supports
people on *-windows-itanium or *-windows-gnu targets.

Currently this recognizes some personalities used by MSVC and turns
resume instructions into traps to avoid link errors.  Even if cleanups
are not used in the source program, LLVM requires the frontend to emit a
code path that resumes unwinding after an exception.  Clang does this,
and we get unreachable resume instructions. PR20300 covers cleaning up
these unreachable calls to resume.

Reviewers: majnemer

Differential Revision: http://reviews.llvm.org/D7216

llvm-svn: 227405
2015-01-29 00:41:44 +00:00
Philip Reames
fe460d2612 Teach SplitBlockPredecessors how to handle landingpad blocks.
Patch by: Igor Laevsky <igor@azulsystems.com>

"Currently SplitBlockPredecessors generates incorrect code in case if basic block we are going to split has a landingpad. Also seems like it is fairly common case among it's users to conditionally call either SplitBlockPredecessors or SplitLandingPadPredecessors. Because of this I think it is reasonable to add this condition directly into SplitBlockPredecessors."

Differential Revision: http://reviews.llvm.org/D7157

llvm-svn: 227390
2015-01-28 23:06:47 +00:00
Colin LeMahieu
f323a70677 [Hexagon] Updating several V5 intrinsics and adding FP tests.
llvm-svn: 227379
2015-01-28 22:08:16 +00:00
Zoran Jovanovic
9b40c3c637 [mips][microMIPS] Implement SWM and LWM aliases
Differential Revision: http://reviews.llvm.org/D5820

llvm-svn: 227373
2015-01-28 21:52:27 +00:00
Colin LeMahieu
e461a384f0 [Hexagon] Updating many V4 intrinsic patterns. Adding missing instruction and deleting unused classes.
llvm-svn: 227353
2015-01-28 19:39:09 +00:00
Colin LeMahieu
629196ef3e [Hexagon] Adding XTYPE/MPY intrinsic tests and some missing multiply instructions.
llvm-svn: 227347
2015-01-28 19:16:17 +00:00
Colin LeMahieu
159f2e1618 [Hexagon] Deleting a lot of old variants of intrinsics and updating references.
llvm-svn: 227338
2015-01-28 18:29:11 +00:00
Frederic Riss
f503042ce6 [dsymutil] Add DwarfLinker class.
It's an empty shell for now. It's main method just opens the debug
map objects and parses their Dwarf info. Test that we at least do
that correctly.

llvm-svn: 227337
2015-01-28 18:27:01 +00:00
Colin LeMahieu
123b7d1e5a [Hexagon] Converting XTYPE/BIT intrinsic patterns and adding tests.
llvm-svn: 227335
2015-01-28 18:06:23 +00:00
Colin LeMahieu
13e9276fa8 [Hexagon] Replacing XTYPE/SHIFT intrinsic patternss. Adding tests and missing instructions with tests.
llvm-svn: 227330
2015-01-28 17:37:59 +00:00
Jozef Kolek
e6b6be169a [mips][microMIPS] Implement LWGP instruction
Differential Revision: http://reviews.llvm.org/D6650

llvm-svn: 227325
2015-01-28 17:27:26 +00:00
Colin LeMahieu
ae285bcca7 [Hexagon] Replacing old intrinsic tests with organized versions that match the reference manual.
llvm-svn: 227321
2015-01-28 16:58:05 +00:00
Bjorn Steinbrink
6cbebb1e6a Fix LLVMSetMetadata and LLVMAddNamedMetadataOperand for single value MDNodes
Summary:
MetadataAsValue uses a canonical format that strips the MDNode if it
contains only a single constant value. This triggers an assertion when
trying to cast the value to a MDNode.

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7165

llvm-svn: 227319
2015-01-28 16:35:59 +00:00
Simon Atanasyan
5615f79e74 [ELFYAML] Provide explicit value for relocation addendums in the test
The `Addend` is an optional field of the `Relocation` YAML record. But
we do not provide its default value while reading it from a YAML file
and so it might keep uninitialized.

I am going to fix the code by a separate commit. We might either make
this field mandatory (at least for .rela sections) or specify 0 as
a default value explicitly.

llvm-svn: 227318
2015-01-28 16:22:50 +00:00
Tom Stellard
4758e65ded R600: Move DataLayout to AMDGPUTargetMachine
This is a follow up to r227113.

It is now required to use the amdgcn target for SI and newer GPUs.

llvm-svn: 227316
2015-01-28 16:04:26 +00:00