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Author SHA1 Message Date
Chris Lattner
5afb55e172 resolve fixme: we now infer the instruction-level 'isvariadic' bit 
from the pattern if present, and we use it instead of the bit.

llvm-svn: 98938
 2010-03-19 05:34:15 +00:00
Chris Lattner
896b393fab set SDNPVariadic on nodes throughout the rest of the targets that 
need them.

llvm-svn: 98937
 2010-03-19 05:33:51 +00:00
Jeffrey Yasskin
df8ee9a65b Remove a memory leak from ThumbTargetMachine. 
llvm-svn: 98936
 2010-03-19 05:25:28 +00:00
Chris Lattner
6b395fca87 add a new SDNPVariadic SDNP node flag, and use it in 
dag isel gen instead of instruction properties.  This
allows the oh-so-useful behavior of matching a variadic
non-root node.

llvm-svn: 98934
 2010-03-19 05:07:09 +00:00
Chris Lattner
0f1c18d7e6 rewrite EnforceSmallerThan to be less bone headed. 
llvm-svn: 98933
 2010-03-19 04:54:36 +00:00
Chris Lattner
fe2e2b9e57 remove some damaged sign extend patterns that can never match. 
llvm-svn: 98932
 2010-03-19 04:53:47 +00:00
Chris Lattner
72e94856ab disable some illegal blackfin patterns. sext from i32 to i32 can never 
match.  Jakob, please take a look when you get a chance.

llvm-svn: 98931
 2010-03-19 04:53:21 +00:00
Chris Lattner
9ae31faad2 comment out a bunch of parallel store patterns that apparently 
can't match or just have no testcases.  Will remove after 
confirmation from dan that they really are dead.

llvm-svn: 98930
 2010-03-19 04:14:21 +00:00
Daniel Dunbar
12aef7c1a8 Fix -Asserts warnings. 
llvm-svn: 98928
 2010-03-19 03:18:23 +00:00
Daniel Dunbar
cc34ff9e80 Fix -Asserts warning. 
llvm-svn: 98927
 2010-03-19 03:18:20 +00:00
Daniel Dunbar
d2393ccdad MC/Mach-O: Add isScatteredFixupFullyResolved, which implements the correct algorithm (used on x86_64) for determining whether an evaluated fixup is fully resolved (doesn't need relocation). 
- Test cases will follow, once we have x86_64 relocation support.

llvm-svn: 98926
 2010-03-19 03:18:18 +00:00
Daniel Dunbar
0a3b893a3e MC/Mach-O/x86_64: Add getAtom[ForAddress]. 
- These find the defining symbol which identifies the containing atom for a symbol or address. They are currently very slow, but will be eliminated eventually.

llvm-svn: 98925
 2010-03-19 03:18:15 +00:00
Daniel Dunbar
f8e4be91ff MC/Mach-O: Factor out isScatteredFixupFullyResolvedSimple predicate, and fix some corner cases. 
llvm-svn: 98924
 2010-03-19 03:18:12 +00:00
Daniel Dunbar
377fb36813 MC/Mach-O: Factor out isSymbolLinkerVisible method; "linker visible" is a made up term to refer to non-temporary labels + temporary labels in sections-which-require symbols. For Darwin, it corresponds to symbols which effectively define an atom. 
llvm-svn: 98923
 2010-03-19 03:18:09 +00:00
Daniel Dunbar
31954e0f7e Drop KLEE blurb, we don't have anything new. 
llvm-svn: 98922
 2010-03-19 03:18:05 +00:00
Mon P Wang
005a544af8 Fixed a widening bug where we were not using the correct size for the load 
llvm-svn: 98920
 2010-03-19 01:19:52 +00:00
Daniel Dunbar
3ef39d497f X86: Fix encoding for TEST64rr. 
llvm-svn: 98919
 2010-03-19 01:15:03 +00:00
Chris Lattner
68762f16c5 eliminate the last use of EEVT::isUnknown 
llvm-svn: 98918
 2010-03-19 01:14:27 +00:00
Jeffrey Yasskin
f68530e26e Remove ignore from LLVMC/TestWarnings.td. This avoids 
https://bugs.kde.org/show_bug.cgi?id=231257 and seems not to have been
needed in the first place.

llvm-svn: 98917
 2010-03-19 01:10:41 +00:00
Chris Lattner
4950930fa7 Finally change the instruction looking map to be a densemap from 
record* -> instrinfo instead of std::string -> instrinfo.

This speeds up tblgen on cellcpu from 7.28 -> 5.98s with a debug
build (20%).

llvm-svn: 98916
 2010-03-19 01:07:44 +00:00
Chris Lattner
3f22bdc032 make inst_begin/inst_end iterate over InstructionsByEnumValue. 
Use CodeGenTarget::getInstNamespace in one place and fix it.

llvm-svn: 98915
 2010-03-19 01:00:55 +00:00
Chris Lattner
42d67226c5 revert 98912 
llvm-svn: 98914
 2010-03-19 00:50:47 +00:00
Chris Lattner
f0beb5287b make inst_begin/inst_end iterate over InstructionsByEnumValue. 
llvm-svn: 98912
 2010-03-19 00:40:22 +00:00
Anton Korobeynikov
457d759666 FP16 constfolding 
llvm-svn: 98911
 2010-03-19 00:36:35 +00:00
Chris Lattner
b929ca1352 change Target.getInstructionsByEnumValue to return a reference 
to a vector that CGT stores instead of synthesizing it on every 
call.

llvm-svn: 98910
 2010-03-19 00:34:35 +00:00
Jeffrey Yasskin
273182310c Revert r98892. BSD systems may not have bash installed at all. 
llvm-svn: 98909
 2010-03-19 00:32:11 +00:00
Chris Lattner
cef8991a14 factor copy and paste code. 
llvm-svn: 98908
 2010-03-19 00:23:20 +00:00
Chris Lattner
1acf5e4a8d don't go through getInstructions(). 
llvm-svn: 98906
 2010-03-19 00:18:23 +00:00
Jeffrey Yasskin
16289314f6 Bugpoint's default memory limit (100MB) was too low for valgrind, so 
this patch raises the default to 800MB when valgrind's active.  800
was chosen semi-arbitrarily.

llvm-svn: 98905
 2010-03-19 00:09:28 +00:00
Chris Lattner
3e5af02a79 look up instructions by record, not by name. 
llvm-svn: 98904
 2010-03-19 00:07:20 +00:00
Chris Lattner
938747fc7f Now that tblgen can handle matching implicit defs of instructions 
to input patterns, we can fix X86ISD::CMP and X86ISD::BT as taking
two inputs (which have to be the same type) and *returning an i32*.
This is how the SDNodes get made in the graph, but we weren't able
to model it this way due to deficiencies in the pattern language.

Now we can change things like this:

 def UCOM_FpIr80: FpI_<(outs), (ins RFP80:$lhs, RFP80:$rhs), CompareFP,
-                  [(X86cmp RFP80:$lhs, RFP80:$rhs),
-                   (implicit EFLAGS)]>; // CC = ST(0) cmp ST(i)
+                  [(set EFLAGS, (X86cmp RFP80:$lhs, RFP80:$rhs))]>;

and fix terrible crimes like this:

-def : Pat<(parallel (X86cmp GR8:$src1, 0), (implicit EFLAGS)),
+def : Pat<(X86cmp GR8:$src1, 0),
           (TEST8rr GR8:$src1, GR8:$src1)>;

This relies on matching the result of TEST8rr (which is EFLAGS, which is
an implicit def) to the result of X86cmp, an i32.

llvm-svn: 98903
 2010-03-19 00:01:11 +00:00
Bob Wilson
5c35e064e5 Update comment to refer to the right filename. 
llvm-svn: 98902
 2010-03-18 23:57:57 +00:00
Chris Lattner
09704dc656 tidy up 
llvm-svn: 98901
 2010-03-18 23:57:57 +00:00
Chris Lattner
0ed7a372d6 expand tblgen's support for instructions with implicit defs. 
llvm-svn: 98900
 2010-03-18 23:57:40 +00:00
Chris Lattner
5becdf478d infer results of a pattern from implicit defs. This allows you to do something 
like this:

 def : Pat<(add ...),
           (FOOINST)>;

When fooinst only has a single implicit def (e.g. to R1).  This will be handled
as if written as (set R1, (FOOINST ...))

llvm-svn: 98897
 2010-03-18 23:15:10 +00:00
Jeffrey Yasskin
f8dd45b2f1 Work around a valgrind oddity where it doesn't pass the full path of a 
script to the #! command by using bash instead of /bin/sh.  Bash
searches $PATH for its script argument, but dash, which /bin/sh
resolves to on some systems, does not.
https://bugs.kde.org/show_bug.cgi?id=231257 tracks the valgrind
problem.

llvm-svn: 98892
 2010-03-18 22:56:02 +00:00
Anton Korobeynikov
eeae840ed7 Get rid of target-specific fp <-> int nodes when still I'm here. 
llvm-svn: 98889
 2010-03-18 22:35:45 +00:00
Anton Korobeynikov
23c07f492e Get rid of target-specific nodes for fp16 <-> fp32 conversion. 
llvm-svn: 98888
 2010-03-18 22:35:37 +00:00
Anton Korobeynikov
f07111ada7 Refactor Reg-Reg copy emission routine for ARM. This makes cross-regclass copies weirdness more straightforward. Also, add GPR <-> SPR copy support. 
llvm-svn: 98887
 2010-03-18 22:35:02 +00:00
Eric Christopher
eb546c4d7d Couple of changes that Dan mentioned for llvm.stackprotector fast-isel. 
llvm-svn: 98881
 2010-03-18 21:58:33 +00:00
Daniel Dunbar
1a50b05aff X86MCCodeEmitter: Fix two minor issues with reloc_riprel_4byte_movq_load, we 
were missing it on some movq instructions and were not including the appropriate
PCrel bias.

llvm-svn: 98880
 2010-03-18 21:53:54 +00:00
Chris Lattner
1bc6faaac4 capture implicit uses and defs in CodeGenInstruction 
llvm-svn: 98879
 2010-03-18 21:42:03 +00:00
Chris Lattner
fa01855463 simplify this code, the # of sets in the pattern for an instruction 
shouldn't change this.

llvm-svn: 98872
 2010-03-18 21:15:05 +00:00
Chris Lattner
918789d239 disallow concatenation of two dags with different operators. 
llvm-svn: 98871
 2010-03-18 21:07:51 +00:00
Chris Lattner
ee0d794686 rewrite this to not artificially force concat the ins/outs list. 
llvm-svn: 98870
 2010-03-18 21:07:39 +00:00
Chris Lattner
87af55dfd6 fix some buggy ops concatentation 
llvm-svn: 98869
 2010-03-18 21:06:54 +00:00
Chris Lattner
48330afb2d eliminate support for "ops" in the input/output list of an 
instruction.  Instructions must use 'ins' and 'outs' now.

llvm-svn: 98868
 2010-03-18 20:56:35 +00:00
Chris Lattner
d678e362d2 use ins/outs 
llvm-svn: 98867
 2010-03-18 20:55:31 +00:00
Chris Lattner
09143aa2b0 use ins/outs. 
llvm-svn: 98866
 2010-03-18 20:55:18 +00:00
Chris Lattner
3f7819560f remove some code that was working around old sparc v9 backend bugs. 
Add checking that the input/output operand list in spelled right.

llvm-svn: 98865
 2010-03-18 20:50:52 +00:00