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13502 Commits

Author SHA1 Message Date
Chris Lattner
4b0fc38fe7 Fix the JIT encoding of VSEL 
llvm-svn: 27160
 2006-03-27 03:34:17 +00:00
Chris Lattner
b5efa3e0f5 Fix the JIT encoding of VSPLTI* 
llvm-svn: 27159
 2006-03-27 03:28:57 +00:00
Jim Laskey
c195040bcf Pass llvm/test/Regression/CodeGen/Generic/debug-info.ll. 
llvm-svn: 27158
 2006-03-27 01:51:47 +00:00
Nate Begeman
3d518334b9 SelectionDAGISel can now natively handle Switch instructions, in the same 
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.

This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.

llvm-svn: 27156
 2006-03-27 01:32:24 +00:00
Jim Laskey
fb55c2c6a7 Bullet proof against undefined args produced by upgrading ols-style debug info. 
llvm-svn: 27155
 2006-03-26 22:46:27 +00:00
Jim Laskey
278ca1e735 How to be dumb on $5/day. Need a tri-state to track valid debug descriptors. 
llvm-svn: 27154
 2006-03-26 22:45:20 +00:00
Chris Lattner
03ad35fd49 add vsel 
llvm-svn: 27153
 2006-03-26 22:38:43 +00:00
Nate Begeman
507e293848 Readme note 
llvm-svn: 27152
 2006-03-26 19:19:27 +00:00
Chris Lattner
65a455b060 Codegen vector predicate compares. 
llvm-svn: 27151
 2006-03-26 10:06:40 +00:00
Evan Cheng
1dfbede1d1 Remove X86:isZeroVector, use ISD::isBuildVectorAllZeros instead; some fixes / cleanups 
llvm-svn: 27150
 2006-03-26 09:53:12 +00:00
Evan Cheng
b17bbf8ccb Remove PPC:isZeroVector, use ISD::isBuildVectorAllZeros instead 
llvm-svn: 27149
 2006-03-26 09:52:32 +00:00
Evan Cheng
5809827989 Add immAllZerosV helper 
llvm-svn: 27148
 2006-03-26 09:51:39 +00:00
Evan Cheng
ef3b33b847 Add ISD::isBuildVectorAllZeros predicate 
llvm-svn: 27147
 2006-03-26 09:50:58 +00:00
Chris Lattner
aef813a8cf Allow targets to custom lower their own intrinsics if desired. 
llvm-svn: 27146
 2006-03-26 09:12:51 +00:00
Chris Lattner
dc8250447f Update dependencies to reflect split of the Intrinsics.td file 
llvm-svn: 27144
 2006-03-26 07:45:48 +00:00
Chris Lattner
f0c36b99e6 Add all of the altivec comparison instructions. Add patterns for the 
non-predicate altivec compare intrinsics.

llvm-svn: 27143
 2006-03-26 04:57:17 +00:00
Chris Lattner
4e0a78ea30 Add and 8/16-bit adds, add all integer subtracts, add saturating subtract 
intrinsics.

llvm-svn: 27142
 2006-03-26 02:39:02 +00:00
Chris Lattner
d33ef7a1bc implement the vsldoi intrinsic. 
llvm-svn: 27139
 2006-03-26 00:41:48 +00:00
Chris Lattner
7d557e00f3 fix the pattern for vandc, it's NOT vnand 
llvm-svn: 27136
 2006-03-25 23:10:40 +00:00
Chris Lattner
88a0c65463 add patterns for VANDC/VNOR, implementing 
CodeGen/PowerPC/eqv-andc-orc-nor.ll:VNOR/VANDC

llvm-svn: 27135
 2006-03-25 23:05:29 +00:00
Chris Lattner
8b6f0daaae Add some comments. 
llvm-svn: 27133
 2006-03-25 23:00:56 +00:00
Chris Lattner
f83db1efe6 add a vnot helper node for matching 'not' on vectors 
llvm-svn: 27132
 2006-03-25 23:00:08 +00:00
Chris Lattner
f9c8e9646d Fix a bug in ISD::isBuildVectorAllOnesInteger that caused it to always return 
false

llvm-svn: 27131
 2006-03-25 22:59:28 +00:00
Chris Lattner
d89668e503 Implement the ISD::isBuildVectorAllOnesInteger predicate 
llvm-svn: 27130
 2006-03-25 22:57:01 +00:00
Chris Lattner
62185c0496 Don't call SimplifyDemandedBits on vectors 
llvm-svn: 27128
 2006-03-25 22:19:00 +00:00
Chris Lattner
f80b39f9b1 Add some logical operations 
llvm-svn: 27127
 2006-03-25 22:16:05 +00:00
Chris Lattner
bc48efc7fa Don't crash on packed logical ops 
llvm-svn: 27125
 2006-03-25 21:58:26 +00:00
Chris Lattner
a458878f87 Teach BinaryOperator::createNot to work with packed integer types 
llvm-svn: 27124
 2006-03-25 21:54:21 +00:00
Jim Laskey
5a27f03274 Cast instruction not inserted into basic block. 
llvm-svn: 27122
 2006-03-25 18:40:47 +00:00
Evan Cheng
875c895b0f Added missing (any_extend (load ...)) patterns. 
llvm-svn: 27120
 2006-03-25 09:45:48 +00:00
Evan Cheng
e5807f6b47 Build arbitrary vector with more than 2 distinct scalar elements with a 
series of unpack and interleave ops.

llvm-svn: 27119
 2006-03-25 09:37:23 +00:00
Chris Lattner
d2823658b4 implement a bunch of intrinsics 
llvm-svn: 27118
 2006-03-25 08:01:02 +00:00
Chris Lattner
cb5f9269a9 Move all Altivec stuff out into a new PPCInstrAltivec.td file. 
Add a bunch of patterns for different datatypes, e.g. bit_convert, undef and
zero vector support.

llvm-svn: 27117
 2006-03-25 07:51:43 +00:00
Chris Lattner
57064915a6 Add some basic patterns for other datatypes 
llvm-svn: 27116
 2006-03-25 07:39:07 +00:00
Chris Lattner
7f5fba9c67 add all supported formats to the vector register file 
llvm-svn: 27115
 2006-03-25 07:36:56 +00:00
Chris Lattner
2fa3a6c436 Add support for __builtin_altivec_vnmsubfp /vmaddfp 
llvm-svn: 27112
 2006-03-25 07:05:55 +00:00
Chris Lattner
e199d55073 #include Intrinsics.h into all dag isels 
llvm-svn: 27109
 2006-03-25 06:47:10 +00:00
Chris Lattner
b014b3c7ab Implement Intrinsic::getName 
llvm-svn: 27108
 2006-03-25 06:32:47 +00:00
Chris Lattner
0899b16b2d Codegen things like: 
<int -1, int -1, int -1, int -1>
and
 <int 65537, int 65537, int 65537, int 65537>

Using things like:
  vspltisb v0, -1
and:
  vspltish v0, 1

instead of using constant pool loads.

This implements CodeGen/PowerPC/vec_splat.ll:splat_imm_i{32|16}.

llvm-svn: 27106
 2006-03-25 06:12:06 +00:00
Evan Cheng
8601147e68 Added SSE cachebility ops 
llvm-svn: 27103
 2006-03-25 06:03:26 +00:00
Evan Cheng
cad90504fe Instruction encoding bug 
llvm-svn: 27102
 2006-03-25 06:00:03 +00:00
Chris Lattner
b0e8c6dd7f Add new intrinsic node definitions for tblgen use 
llvm-svn: 27100
 2006-03-25 02:29:35 +00:00
Evan Cheng
234090b386 Added 128-bit packed integer subtraction. 
llvm-svn: 27096
 2006-03-25 01:33:37 +00:00
Evan Cheng
b280b34497 Added CVTTPS2PI. 
llvm-svn: 27095
 2006-03-25 01:31:59 +00:00
Evan Cheng
041c9c534b Added CVTSS2SI. 
llvm-svn: 27094
 2006-03-25 01:00:18 +00:00
Evan Cheng
bdb85b387f Support for scalar to vector with zero extension. 
llvm-svn: 27091
 2006-03-24 23:15:12 +00:00
Chris Lattner
1e4694ed84 fix inverted conditional 
llvm-svn: 27089
 2006-03-24 22:49:42 +00:00
Jim Laskey
37a8c245ce D'oh - should be even numbered. 
llvm-svn: 27088
 2006-03-24 22:48:02 +00:00
Evan Cheng
33dad39b46 Added LDMXCSR 
llvm-svn: 27087
 2006-03-24 22:28:37 +00:00
Chris Lattner
2d08e8aee1 plug the intrinsics into the patterns for movmsk* 
llvm-svn: 27083
 2006-03-24 21:49:18 +00:00