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https://github.com/RPCS3/llvm-mirror.git
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398751cee1
Follow-up for rL334200, rL334206. llvm-svn: 334235
213 lines
5.8 KiB
LLVM
213 lines
5.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instsimplify -S | FileCheck %s
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; %r = shl nuw i8 C, %x
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; As per langref: If the nuw keyword is present, then the shift produces
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; a poison value if it shifts out any non-zero bits.
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; Thus, if the sign bit is set on C, then %x can only be 0, which means that
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; %r can only be C.
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define i8 @shl_nuw (i8 %x) {
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; CHECK-LABEL: @shl_nuw(
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; CHECK-NEXT: ret i8 -1
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;
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%ret = shl nuw i8 -1, %x
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; nuw here means that %x can only be 0
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ret i8 %ret
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}
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define i8 @shl_nuw_nsw (i8 %x) {
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; CHECK-LABEL: @shl_nuw_nsw(
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; CHECK-NEXT: ret i8 -1
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;
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%ret = shl nuw nsw i8 -1, %x
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; nuw here means that %x can only be 0
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ret i8 %ret
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}
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define i8 @shl_128 (i8 %x) {
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; CHECK-LABEL: @shl_128(
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; CHECK-NEXT: ret i8 -128
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;
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%ret = shl nuw i8 128, %x
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; 128 == 1<<7 == just the sign bit is set
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ret i8 %ret
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}
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; ============================================================================ ;
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; Positive tests with value range known
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; ============================================================================ ;
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declare void @llvm.assume(i1 %cond);
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define i8 @knownbits_negative(i8 %x, i8 %y) {
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; CHECK-LABEL: @knownbits_negative(
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: [[RET:%.*]] = shl nuw i8 [[X]], [[Y:%.*]]
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; CHECK-NEXT: ret i8 [[RET]]
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;
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%cmp = icmp slt i8 %x, 0
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tail call void @llvm.assume(i1 %cmp)
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%ret = shl nuw i8 %x, %y
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ret i8 %ret
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}
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define i8 @knownbits_negativeorzero(i8 %x, i8 %y) {
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; CHECK-LABEL: @knownbits_negativeorzero(
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 1
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: [[RET:%.*]] = shl nuw i8 [[X]], [[Y:%.*]]
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; CHECK-NEXT: ret i8 [[RET]]
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;
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%cmp = icmp slt i8 %x, 1
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tail call void @llvm.assume(i1 %cmp)
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%ret = shl nuw i8 %x, %y
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ret i8 %ret
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}
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; ============================================================================ ;
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; Vectors
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; ============================================================================ ;
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define <2 x i8> @shl_vec(<2 x i8> %x) {
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; CHECK-LABEL: @shl_vec(
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; CHECK-NEXT: ret <2 x i8> <i8 -1, i8 -1>
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;
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%ret = shl nuw <2 x i8> <i8 -1, i8 -1>, %x
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ret <2 x i8> %ret
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}
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define <3 x i8> @shl_vec_undef(<3 x i8> %x) {
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; CHECK-LABEL: @shl_vec_undef(
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; CHECK-NEXT: ret <3 x i8> <i8 -1, i8 undef, i8 -1>
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;
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%ret = shl nuw <3 x i8> <i8 -1, i8 undef, i8 -1>, %x
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ret <3 x i8> %ret
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}
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define <2 x i8> @shl_vec_nonsplat(<2 x i8> %x) {
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; CHECK-LABEL: @shl_vec_nonsplat(
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; CHECK-NEXT: ret <2 x i8> <i8 -1, i8 -2>
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;
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%ret = shl nuw <2 x i8> <i8 -1, i8 -2>, %x
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ret <2 x i8> %ret
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}
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; ============================================================================ ;
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; Negative tests. Should not be folded.
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; ============================================================================ ;
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define i8 @shl_127 (i8 %x) {
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; CHECK-LABEL: @shl_127(
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; CHECK-NEXT: [[RET:%.*]] = shl nuw i8 127, [[X:%.*]]
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; CHECK-NEXT: ret i8 [[RET]]
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;
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%ret = shl nuw i8 127, %x
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; 127 == (1<<7)-1 == all bits except the sign bit are set.
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ret i8 %ret
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}
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define i8 @bad_shl (i8 %x) {
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; CHECK-LABEL: @bad_shl(
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; CHECK-NEXT: [[RET:%.*]] = shl i8 -1, [[X:%.*]]
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; CHECK-NEXT: ret i8 [[RET]]
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;
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%ret = shl i8 -1, %x ; need nuw
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ret i8 %ret
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}
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define i8 @bad_nsw (i8 %x) {
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; CHECK-LABEL: @bad_nsw(
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; CHECK-NEXT: [[RET:%.*]] = shl nsw i8 -1, [[X:%.*]]
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; CHECK-NEXT: ret i8 [[RET]]
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;
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%ret = shl nsw i8 -1, %x ; need nuw
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ret i8 %ret
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}
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; First `shl` operand is not `-1` constant
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define i8 @bad_shl0(i8 %shlop1, i8 %x) {
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; CHECK-LABEL: @bad_shl0(
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; CHECK-NEXT: [[RET:%.*]] = shl nuw i8 [[SHLOP1:%.*]], [[X:%.*]]
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; CHECK-NEXT: ret i8 [[RET]]
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;
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%ret = shl nuw i8 %shlop1, %x
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ret i8 %ret
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}
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; Bad shl nuw constant
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define i8 @bad_shl1(i8 %x) {
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; CHECK-LABEL: @bad_shl1(
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; CHECK-NEXT: [[RET:%.*]] = shl nuw i8 1, [[X:%.*]]
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; CHECK-NEXT: ret i8 [[RET]]
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;
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%ret = shl nuw i8 1, %x ; not -1
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ret i8 %ret
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}
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define <2 x i8> @bad_shl_vec_nonsplat(<2 x i8> %x) {
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; CHECK-LABEL: @bad_shl_vec_nonsplat(
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; CHECK-NEXT: [[RET:%.*]] = shl nuw <2 x i8> <i8 -1, i8 1>, [[X:%.*]]
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; CHECK-NEXT: ret <2 x i8> [[RET]]
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;
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%ret = shl nuw <2 x i8> <i8 -1, i8 1>, %x
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ret <2 x i8> %ret
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}
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; Bad known bits
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define i8 @bad_knownbits(i8 %x, i8 %y) {
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; CHECK-LABEL: @bad_knownbits(
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 2
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: [[RET:%.*]] = shl nuw i8 [[X]], [[Y:%.*]]
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; CHECK-NEXT: ret i8 [[RET]]
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;
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%cmp = icmp slt i8 %x, 2
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tail call void @llvm.assume(i1 %cmp)
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%ret = shl nuw i8 %x, %y
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ret i8 %ret
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}
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define i8 @bad_knownbits_minusoneormore(i8 %x, i8 %y) {
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; CHECK-LABEL: @bad_knownbits_minusoneormore(
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[X:%.*]], -2
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: [[RET:%.*]] = shl nuw i8 [[X]], [[Y:%.*]]
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; CHECK-NEXT: ret i8 [[RET]]
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;
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%cmp = icmp sgt i8 %x, -2
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tail call void @llvm.assume(i1 %cmp)
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%ret = shl nuw i8 %x, %y
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ret i8 %ret
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}
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define i8 @bad_knownbits_zeroorpositive(i8 %x, i8 %y) {
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; CHECK-LABEL: @bad_knownbits_zeroorpositive(
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[X:%.*]], -1
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: [[RET:%.*]] = shl nuw i8 [[X]], [[Y:%.*]]
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; CHECK-NEXT: ret i8 [[RET]]
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;
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%cmp = icmp sgt i8 %x, -1
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tail call void @llvm.assume(i1 %cmp)
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%ret = shl nuw i8 %x, %y
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ret i8 %ret
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}
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define i8 @bad_knownbits_positive(i8 %x, i8 %y) {
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; CHECK-LABEL: @bad_knownbits_positive(
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[X:%.*]], 0
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: [[RET:%.*]] = shl nuw i8 [[X]], [[Y:%.*]]
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; CHECK-NEXT: ret i8 [[RET]]
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;
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%cmp = icmp sgt i8 %x, 0
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tail call void @llvm.assume(i1 %cmp)
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%ret = shl nuw i8 %x, %y
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ret i8 %ret
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}
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