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f0b56ac100
A future change in clang necessitates access of this information from the driver, so move this into a common place. Try to mimic something resembling the API the other targets are using here. One thing I'm uncertain about is how to split amdgcn and r600 handling. Here I've mostly duplicated the functions for each, while keeping the same enums. I think this is a bit awkward for the features which don't matter for amdgcn. It's also a bit messy that this isn't a complete set of subtarget features. This is just the minimum set needed for the driver code. For example building the list of subtarget feature names is still in clang. llvm-svn: 340291
354 lines
9.8 KiB
C++
354 lines
9.8 KiB
C++
//===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a target parser to recognise hardware features such as
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// FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_SUPPORT_TARGETPARSER_H
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#define LLVM_SUPPORT_TARGETPARSER_H
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// FIXME: vector is used because that's what clang uses for subtarget feature
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// lists, but SmallVector would probably be better
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#include "llvm/ADT/Triple.h"
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#include <vector>
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namespace llvm {
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class StringRef;
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// Target specific information into their own namespaces. These should be
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// generated from TableGen because the information is already there, and there
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// is where new information about targets will be added.
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// FIXME: To TableGen this we need to make some table generated files available
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// even if the back-end is not compiled with LLVM, plus we need to create a new
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// back-end to TableGen to create these clean tables.
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namespace ARM {
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// FPU Version
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enum class FPUVersion {
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NONE,
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VFPV2,
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VFPV3,
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VFPV3_FP16,
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VFPV4,
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VFPV5
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};
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// An FPU name restricts the FPU in one of three ways:
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enum class FPURestriction {
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None = 0, ///< No restriction
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D16, ///< Only 16 D registers
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SP_D16 ///< Only single-precision instructions, with 16 D registers
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};
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// An FPU name implies one of three levels of Neon support:
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enum class NeonSupportLevel {
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None = 0, ///< No Neon
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Neon, ///< Neon
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Crypto ///< Neon with Crypto
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};
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// FPU names.
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enum FPUKind {
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#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND,
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#include "ARMTargetParser.def"
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FK_LAST
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};
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// Arch names.
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enum class ArchKind {
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#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID,
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#include "ARMTargetParser.def"
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};
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// Arch extension modifiers for CPUs.
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enum ArchExtKind : unsigned {
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AEK_INVALID = 0,
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AEK_NONE = 1,
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AEK_CRC = 1 << 1,
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AEK_CRYPTO = 1 << 2,
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AEK_FP = 1 << 3,
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AEK_HWDIVTHUMB = 1 << 4,
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AEK_HWDIVARM = 1 << 5,
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AEK_MP = 1 << 6,
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AEK_SIMD = 1 << 7,
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AEK_SEC = 1 << 8,
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AEK_VIRT = 1 << 9,
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AEK_DSP = 1 << 10,
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AEK_FP16 = 1 << 11,
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AEK_RAS = 1 << 12,
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AEK_SVE = 1 << 13,
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AEK_DOTPROD = 1 << 14,
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AEK_SHA2 = 1 << 15,
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AEK_AES = 1 << 16,
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AEK_FP16FML = 1 << 17,
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// Unsupported extensions.
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AEK_OS = 0x8000000,
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AEK_IWMMXT = 0x10000000,
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AEK_IWMMXT2 = 0x20000000,
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AEK_MAVERICK = 0x40000000,
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AEK_XSCALE = 0x80000000,
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};
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// ISA kinds.
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enum class ISAKind { INVALID = 0, ARM, THUMB, AARCH64 };
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// Endianness
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// FIXME: BE8 vs. BE32?
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enum class EndianKind { INVALID = 0, LITTLE, BIG };
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// v6/v7/v8 Profile
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enum class ProfileKind { INVALID = 0, A, R, M };
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StringRef getCanonicalArchName(StringRef Arch);
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// Information by ID
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StringRef getFPUName(unsigned FPUKind);
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FPUVersion getFPUVersion(unsigned FPUKind);
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NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind);
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FPURestriction getFPURestriction(unsigned FPUKind);
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// FIXME: These should be moved to TargetTuple once it exists
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bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
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bool getHWDivFeatures(unsigned HWDivKind, std::vector<StringRef> &Features);
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bool getExtensionFeatures(unsigned Extensions,
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std::vector<StringRef> &Features);
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StringRef getArchName(ArchKind AK);
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unsigned getArchAttr(ArchKind AK);
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StringRef getCPUAttr(ArchKind AK);
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StringRef getSubArch(ArchKind AK);
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StringRef getArchExtName(unsigned ArchExtKind);
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StringRef getArchExtFeature(StringRef ArchExt);
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StringRef getHWDivName(unsigned HWDivKind);
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// Information by Name
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unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
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unsigned getDefaultExtensions(StringRef CPU, ArchKind AK);
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StringRef getDefaultCPU(StringRef Arch);
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// Parser
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unsigned parseHWDiv(StringRef HWDiv);
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unsigned parseFPU(StringRef FPU);
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ArchKind parseArch(StringRef Arch);
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unsigned parseArchExt(StringRef ArchExt);
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ArchKind parseCPUArch(StringRef CPU);
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void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
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ISAKind parseArchISA(StringRef Arch);
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EndianKind parseArchEndian(StringRef Arch);
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ProfileKind parseArchProfile(StringRef Arch);
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unsigned parseArchVersion(StringRef Arch);
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StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU);
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} // namespace ARM
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// FIXME:This should be made into class design,to avoid dupplication.
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namespace AArch64 {
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// Arch names.
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enum class ArchKind {
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#define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID,
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#include "AArch64TargetParser.def"
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};
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// Arch extension modifiers for CPUs.
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enum ArchExtKind : unsigned {
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AEK_INVALID = 0,
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AEK_NONE = 1,
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AEK_CRC = 1 << 1,
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AEK_CRYPTO = 1 << 2,
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AEK_FP = 1 << 3,
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AEK_SIMD = 1 << 4,
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AEK_FP16 = 1 << 5,
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AEK_PROFILE = 1 << 6,
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AEK_RAS = 1 << 7,
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AEK_LSE = 1 << 8,
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AEK_SVE = 1 << 9,
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AEK_DOTPROD = 1 << 10,
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AEK_RCPC = 1 << 11,
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AEK_RDM = 1 << 12,
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AEK_SM4 = 1 << 13,
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AEK_SHA3 = 1 << 14,
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AEK_SHA2 = 1 << 15,
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AEK_AES = 1 << 16,
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AEK_FP16FML = 1 << 17,
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};
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StringRef getCanonicalArchName(StringRef Arch);
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// Information by ID
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StringRef getFPUName(unsigned FPUKind);
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ARM::FPUVersion getFPUVersion(unsigned FPUKind);
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ARM::NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind);
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ARM::FPURestriction getFPURestriction(unsigned FPUKind);
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// FIXME: These should be moved to TargetTuple once it exists
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bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
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bool getExtensionFeatures(unsigned Extensions,
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std::vector<StringRef> &Features);
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bool getArchFeatures(ArchKind AK, std::vector<StringRef> &Features);
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StringRef getArchName(ArchKind AK);
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unsigned getArchAttr(ArchKind AK);
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StringRef getCPUAttr(ArchKind AK);
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StringRef getSubArch(ArchKind AK);
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StringRef getArchExtName(unsigned ArchExtKind);
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StringRef getArchExtFeature(StringRef ArchExt);
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unsigned checkArchVersion(StringRef Arch);
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// Information by Name
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unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
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unsigned getDefaultExtensions(StringRef CPU, ArchKind AK);
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StringRef getDefaultCPU(StringRef Arch);
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AArch64::ArchKind getCPUArchKind(StringRef CPU);
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// Parser
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unsigned parseFPU(StringRef FPU);
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AArch64::ArchKind parseArch(StringRef Arch);
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ArchExtKind parseArchExt(StringRef ArchExt);
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ArchKind parseCPUArch(StringRef CPU);
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void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
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ARM::ISAKind parseArchISA(StringRef Arch);
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ARM::EndianKind parseArchEndian(StringRef Arch);
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ARM::ProfileKind parseArchProfile(StringRef Arch);
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unsigned parseArchVersion(StringRef Arch);
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bool isX18ReservedByDefault(const Triple &TT);
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} // namespace AArch64
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namespace X86 {
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// This should be kept in sync with libcc/compiler-rt as its included by clang
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// as a proxy for what's in libgcc/compiler-rt.
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enum ProcessorVendors : unsigned {
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VENDOR_DUMMY,
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#define X86_VENDOR(ENUM, STRING) \
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ENUM,
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#include "llvm/Support/X86TargetParser.def"
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VENDOR_OTHER
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};
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// This should be kept in sync with libcc/compiler-rt as its included by clang
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// as a proxy for what's in libgcc/compiler-rt.
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enum ProcessorTypes : unsigned {
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CPU_TYPE_DUMMY,
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#define X86_CPU_TYPE(ARCHNAME, ENUM) \
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ENUM,
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#include "llvm/Support/X86TargetParser.def"
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CPU_TYPE_MAX
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};
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// This should be kept in sync with libcc/compiler-rt as its included by clang
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// as a proxy for what's in libgcc/compiler-rt.
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enum ProcessorSubtypes : unsigned {
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CPU_SUBTYPE_DUMMY,
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#define X86_CPU_SUBTYPE(ARCHNAME, ENUM) \
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ENUM,
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#include "llvm/Support/X86TargetParser.def"
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CPU_SUBTYPE_MAX
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};
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// This should be kept in sync with libcc/compiler-rt as it should be used
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// by clang as a proxy for what's in libgcc/compiler-rt.
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enum ProcessorFeatures {
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#define X86_FEATURE(VAL, ENUM) \
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ENUM = VAL,
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#include "llvm/Support/X86TargetParser.def"
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};
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} // namespace X86
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namespace AMDGPU {
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/// GPU kinds supported by the AMDGPU target.
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enum GPUKind : uint32_t {
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// Not specified processor.
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GK_NONE = 0,
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// R600-based processors.
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GK_R600 = 1,
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GK_R630 = 2,
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GK_RS880 = 3,
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GK_RV670 = 4,
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GK_RV710 = 5,
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GK_RV730 = 6,
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GK_RV770 = 7,
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GK_CEDAR = 8,
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GK_CYPRESS = 9,
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GK_JUNIPER = 10,
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GK_REDWOOD = 11,
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GK_SUMO = 12,
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GK_BARTS = 13,
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GK_CAICOS = 14,
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GK_CAYMAN = 15,
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GK_TURKS = 16,
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GK_R600_FIRST = GK_R600,
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GK_R600_LAST = GK_TURKS,
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// AMDGCN-based processors.
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GK_GFX600 = 32,
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GK_GFX601 = 33,
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GK_GFX700 = 40,
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GK_GFX701 = 41,
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GK_GFX702 = 42,
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GK_GFX703 = 43,
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GK_GFX704 = 44,
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GK_GFX801 = 50,
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GK_GFX802 = 51,
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GK_GFX803 = 52,
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GK_GFX810 = 53,
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GK_GFX900 = 60,
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GK_GFX902 = 61,
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GK_GFX904 = 62,
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GK_GFX906 = 63,
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GK_AMDGCN_FIRST = GK_GFX600,
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GK_AMDGCN_LAST = GK_GFX906,
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};
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// This isn't comprehensive for now, just things that are needed from the
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// frontend driver.
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enum ArchFeatureKind : uint32_t {
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FEATURE_NONE = 0,
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// These features only exist for r600, and are implied true for amdgcn.
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FEATURE_FMA = 1 << 1,
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FEATURE_LDEXP = 1 << 2,
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FEATURE_FP64 = 1 << 3,
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// Common features.
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FEATURE_FAST_FMA_F32 = 1 << 4,
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FEATURE_FAST_DENORMAL_F32 = 1 << 5
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};
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GPUKind parseArchAMDGCN(StringRef CPU);
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GPUKind parseArchR600(StringRef CPU);
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StringRef getArchNameAMDGCN(GPUKind AK);
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StringRef getArchNameR600(GPUKind AK);
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StringRef getCanonicalArchName(StringRef Arch);
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unsigned getArchAttrAMDGCN(GPUKind AK);
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unsigned getArchAttrR600(GPUKind AK);
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void fillValidArchListAMDGCN(SmallVectorImpl<StringRef> &Values);
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void fillValidArchListR600(SmallVectorImpl<StringRef> &Values);
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}
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} // namespace llvm
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#endif
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